Lines Matching defs:Outs

670     const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context,
674   return CCInfo.CheckReturn(Outs, RetCC_X86);
745                                const SmallVectorImpl<ISD::OutputArg> &Outs,
758   if (CallConv == CallingConv::X86_INTR && !Outs.empty())
763   CCInfo.AnalyzeReturn(Outs, RetCC_X86);
2004   SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
2020   bool IsCalleePopSRet = !IsGuaranteeTCO && hasCalleePopSRet(Outs, Subtarget);
2042   CCInfo.AnalyzeArguments(Outs, CC_X86);
2047     CCInfo.AnalyzeArgumentsSecondPass(Outs, CC_X86);
2114   if (!Outs.empty() && Outs.back().Flags.isInAlloca()) {
2163     assert(OutIndex < Outs.size() && "Invalid Out index");
2165     ISD::ArgFlagsTy Flags = Outs[OutIndex].Flags;
2357       ISD::ArgFlagsTy Flags = Outs[OutsIndex].Flags;
2590     for (unsigned I = 0, E = Outs.size(); I != E; ++I) {
2591       if (Outs[I].Flags.isSwiftSelf() || Outs[I].Flags.isSwiftAsync() ||
2592           Outs[I].Flags.isSwiftError()) {
2753   const SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
2817   if (isVarArg && !Outs.empty()) {
2872   if (!Outs.empty()) {
2882         ISD::ArgFlagsTy Flags = Outs[I].Flags;