/llvm-project/llvm/lib/Analysis/ |
H A D | OverflowInstAnalysis.cpp | 21 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd, in isCheckForZeroAndMulWithOverflow() argument 67 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, in isCheckForZeroAndMulWithOverflow() argument
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H A D | InstructionSimplify.cpp | 300 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); simplifyAssociativeBinOp() local 608 foldOrCommuteConstant(Instruction::BinaryOps Opcode,Value * & Op0,Value * & Op1,const SimplifyQuery & Q) foldOrCommuteConstant() argument 635 simplifyAddInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAddInst() argument 702 simplifyAddInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Query) simplifyAddInst() argument 753 simplifyByDomEq(unsigned Opcode,Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyByDomEq() argument 787 simplifySubInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifySubInst() argument 923 simplifySubInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q) simplifySubInst() argument 930 simplifyMulInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyMulInst() argument 995 simplifyMulInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q) simplifyMulInst() argument 1078 simplifyDivRem(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyDivRem() argument 1185 simplifyDiv(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyDiv() argument 1220 simplifyRem(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyRem() argument 1257 simplifySDivInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifySDivInst() argument 1266 simplifySDivInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q) simplifySDivInst() argument 1273 simplifyUDivInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyUDivInst() argument 1278 simplifyUDivInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q) simplifyUDivInst() argument 1285 simplifySRemInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifySRemInst() argument 1300 simplifySRemInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifySRemInst() argument 1306 simplifyURemInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyURemInst() argument 1311 simplifyURemInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifyURemInst() argument 1347 simplifyShift(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,bool IsNSW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyShift() argument 1417 simplifyRightShift(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyRightShift() argument 1446 simplifyShlInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyShlInst() argument 1480 simplifyShlInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q) simplifyShlInst() argument 1487 simplifyLShrInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyLShrInst() argument 1517 simplifyLShrInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q) simplifyLShrInst() argument 1524 simplifyAShrInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAShrInst() argument 1550 simplifyAShrInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q) simplifyAShrInst() argument 1703 simplifyAndOfICmpsWithAdd(ICmpInst * Op0,ICmpInst * Op1,const InstrInfoQuery & IIQ) simplifyAndOfICmpsWithAdd() argument 1771 simplifyAndOfICmps(ICmpInst * Op0,ICmpInst * Op1,const SimplifyQuery & Q) simplifyAndOfICmps() argument 1794 simplifyOrOfICmpsWithAdd(ICmpInst * Op0,ICmpInst * Op1,const InstrInfoQuery & IIQ) simplifyOrOfICmpsWithAdd() argument 1841 simplifyOrOfICmps(ICmpInst * Op0,ICmpInst * Op1,const SimplifyQuery & Q) simplifyOrOfICmps() argument 1907 simplifyAndOrOfCmps(const SimplifyQuery & Q,Value * Op0,Value * Op1,bool IsAnd) simplifyAndOrOfCmps() argument 1950 simplifyAndOrWithICmpEq(unsigned Opcode,Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAndOrWithICmpEq() argument 1998 simplifyLogicOfAddSub(Value * Op0,Value * Op1,Instruction::BinaryOps Opcode) simplifyLogicOfAddSub() argument 2021 simplifyAndCommutative(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAndCommutative() argument 2074 simplifyAndInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAndInst() argument 2253 simplifyAndInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifyAndInst() argument 2349 simplifyOrInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyOrInst() argument 2527 simplifyOrInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifyOrInst() argument 2533 simplifyXorInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyXorInst() argument 2604 simplifyXorInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifyXorInst() argument 5345 foldIdentityShuffles(int DestElt,Value * Op0,Value * Op1,int MaskVal,Value * RootVec,unsigned MaxRecurse) foldIdentityShuffles() argument 5390 simplifyShuffleVectorInst(Value * Op0,Value * Op1,ArrayRef<int> Mask,Type * RetTy,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyShuffleVectorInst() argument 5506 simplifyShuffleVectorInst(Value * Op0,Value * Op1,ArrayRef<int> Mask,Type * RetTy,const SimplifyQuery & Q) simplifyShuffleVectorInst() argument 5625 simplifyFAddInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned MaxRecurse,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFAddInst() argument 5691 simplifyFSubInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned MaxRecurse,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFSubInst() argument 5757 simplifyFMAFMul(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned MaxRecurse,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFMAFMul() argument 5806 simplifyFMulInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned MaxRecurse,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFMulInst() argument 5818 simplifyFAddInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFAddInst() argument 5826 simplifyFSubInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFSubInst() argument 5834 simplifyFMulInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFMulInst() argument 5842 simplifyFMAFMul(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFMAFMul() argument 5851 simplifyFDivInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFDivInst() argument 5901 simplifyFDivInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFDivInst() argument 5910 simplifyFRemInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFRemInst() argument 5939 simplifyFRemInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFRemInst() argument 6168 simplifyLdexp(Value * Op0,Value * Op1,const SimplifyQuery & Q,bool IsStrict) simplifyLdexp() argument 6217 simplifyUnaryIntrinsic(Function * F,Value * Op0,const SimplifyQuery & Q,const CallBase * Call) simplifyUnaryIntrinsic() argument 6336 foldMinMaxSharedOp(Intrinsic::ID IID,Value * Op0,Value * Op1) foldMinMaxSharedOp() argument 6361 foldMinimumMaximumSharedOp(Intrinsic::ID IID,Value * Op0,Value * Op1) foldMinimumMaximumSharedOp() argument 6404 simplifyBinaryIntrinsic(Intrinsic::ID IID,Type * ReturnType,Value * Op0,Value * Op1,const SimplifyQuery & Q,const CallBase * Call) simplifyBinaryIntrinsic() argument 6773 Value *Op0 = Args[0], *Op1 = Args[1], *ShAmtArg = Args[2]; simplifyIntrinsic() local 6817 Value *Op0 = Args[0]; simplifyIntrinsic() local 6980 simplifyFreezeInst(Value * Op0,const SimplifyQuery & Q) simplifyFreezeInst() argument 6988 simplifyFreezeInst(Value * Op0,const SimplifyQuery & Q) simplifyFreezeInst() argument [all...] |
/llvm-project/llvm/unittests/CodeGen/ |
H A D | SelectionDAGPatternMatchTest.cpp | 107 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); in TEST_F() local 127 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); TEST_F() local 184 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); TEST_F() local 251 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); TEST_F() local 300 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT); TEST_F() local 358 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); TEST_F() local [all...] |
/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTDC.cpp | 127 Value *Op0 = I.getOperand(0); convertFCmp() local 237 Value *Op0 = I.getOperand(0); convertICmp() local 292 Value *Op0, *Op1; convertLogicOp() local [all...] |
/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineMulDivRem.cpp | 192 simplifyMulInst(Op0, Op1, I.hasNoSignedWrap(), I.hasNoUnsignedWrap(), in visitMul() local 570 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldFPSignBitOps() local 627 Value *Op0 = I.getOperand(0); foldPowiReassoc() local 670 Value *Op0 = I.getOperand(0); foldFMulReassoc() local 878 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitFMul() local 1081 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldIDivShl() local 1163 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); commonIDivTransforms() local 1518 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitUDiv() local 1587 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitSDiv() local 1797 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldFDivPowDivisor() local 1846 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldFDivSqrtDivisor() local 1890 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitFDiv() local 2001 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *X = nullptr; simplifyIRemMulShl() local 2106 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); commonIRemTransforms() local 2171 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitURem() local 2234 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitSRem() local [all...] |
H A D | InstCombineAndOrXor.cpp | 1571 Value *Op0, Value *Op1) { in reassociateFCmps() local 1707 if (match(Op0, m_OneUs in foldCastedBitwiseLogic() argument 1480 foldLogicOfIsFPClass(BinaryOperator & BO,Value * Op0,Value * Op1) foldLogicOfIsFPClass() argument 1618 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); matchDeMorgansLaws() local 1700 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldCastedBitwiseLogic() local 1797 Value *Op0 = I.getOperand(0); foldAndToXor() local 1823 Value *Op0 = I.getOperand(0); foldOrToXor() local 1869 Value *Op0 = And.getOperand(0), *Op1 = And.getOperand(1); narrowMaskedBinOp() local 1913 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldComplexAndOrPatterns() local 2084 Value *Op0 = I.getOperand(0); canonicalizeLogicFirst() local 2297 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitAnd() local 2995 Value *Op0 = Or.getOperand(0), *Op1 = Or.getOperand(1); matchOrConcat() local 3481 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitOr() local 4000 Value *Op0 = I.getOperand(0); foldXorToXor() local 4260 Value *Op0 = Xor.getOperand(0), *Op1 = Xor.getOperand(1); canonicalizeAbs() local 4308 Value *Op0, *Op1; sinkNotIntoLogicalOp() local 4354 Value *Op0, *Op1; sinkNotIntoOtherHandOfLogicalOp() local 4616 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitXor() local [all...] |
H A D | InstCombineCompares.cpp | 1297 Value *Op0 = Cmp.getOperand(0), *Op1 = Cmp.getOperand(1); foldICmpWithConstant() local 2969 createLogicFromTable(const std::bitset<4> & Table,Value * Op0,Value * Op1,IRBuilderBase & Builder,bool HasOneUse) createLogicFromTable() argument 3026 Value *Op0, *Op1; foldICmpAddConstant() local 3721 Value *Op0 = Cmp.getOperand(0); foldICmpIntrinsicWithIntrinsic() local 3873 Value *Op0 = II->getOperand(0); foldICmpUSubSatOrUAddSatWithConstant() local 4092 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpInstWithConstantNotInt() local 4289 foldICmpWithLowBitMaskedVal(ICmpInst::Predicate Pred,Value * Op0,Value * Op1,const SimplifyQuery & Q,InstCombiner & IC) foldICmpWithLowBitMaskedVal() argument 4771 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *A; foldICmpAndXX() local 4833 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *A; foldICmpOrXX() local 4868 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *A; foldICmpXorXX() local 4896 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpBinOp() local 5518 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpPow2Test() local 5572 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpEquality() local 5822 Value *Op0 = ICmp.getOperand(0), *Op1 = ICmp.getOperand(1); foldICmpWithTrunc() local 6435 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpUsingKnownBits() local 6862 Value *Op0 = I.getOperand(0); canonicalizeCmpWithConstant() local 7094 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpOfUAddOv() local 7188 foldICmpCommutative(ICmpInst::Predicate Pred,Value * Op0,Value * Op1,ICmpInst & CxtI) foldICmpCommutative() argument 7302 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitICmpInst() local 7988 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldFCmpFNegCommonOp() local 8064 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitFCmpInst() local [all...] |
/llvm-project/llvm/lib/CodeGen/ |
H A D | ExpandVectorPredication.cpp | 261 Value *NewBinOp = Builder.CreateBinOp(OC, Op0, Op1, VPI.getName()); in expandPredicationInBinaryOperator() local 297 Value *Op0 = VPI.getOperand(0); expandPredicationToIntCall() local 326 Value *Op0 = VPI.getOperand(0); expandPredicationToFPCall() local 335 Value *Op0 = VPI.getOperand(0); expandPredicationToFPCall() local 347 Value *Op0 = VPI.getOperand(0); expandPredicationToFPCall() local 642 Value *Op0 = VPI.getOperand(0); expandPredicationInComparison() local
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H A D | CodeGenCommonISel.cpp | 278 auto Op0 = salvageDebugInfoImpl(MRI, MI, Ops); salvageDebugInfoForDbgValue() local
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FastISel.cpp | 482 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. in selectBinaryOp() local 1538 Register Op0 = getRegForValue(I->getOperand(0)); selectBitCast() local 1776 const Value *Op0 = EVI->getOperand(0); selectExtractValue() local 1981 fastEmit_ri_(MVT VT,unsigned Opcode,unsigned Op0,uint64_t Imm,MVT ImmType) fastEmit_ri_() argument 2047 fastEmitInst_r(unsigned MachineInstOpcode,const TargetRegisterClass * RC,unsigned Op0) fastEmitInst_r() argument 2068 fastEmitInst_rr(unsigned MachineInstOpcode,const TargetRegisterClass * RC,unsigned Op0,unsigned Op1) fastEmitInst_rr() argument 2092 fastEmitInst_rrr(unsigned MachineInstOpcode,const TargetRegisterClass * RC,unsigned Op0,unsigned Op1,unsigned Op2) fastEmitInst_rrr() argument 2119 fastEmitInst_ri(unsigned MachineInstOpcode,const TargetRegisterClass * RC,unsigned Op0,uint64_t Imm) fastEmitInst_ri() argument 2142 fastEmitInst_rii(unsigned MachineInstOpcode,const TargetRegisterClass * RC,unsigned Op0,uint64_t Imm1,uint64_t Imm2) fastEmitInst_rii() argument 2187 fastEmitInst_rri(unsigned MachineInstOpcode,const TargetRegisterClass * RC,unsigned Op0,unsigned Op1,uint64_t Imm) fastEmitInst_rri() argument 2229 fastEmitInst_extractsubreg(MVT RetVT,unsigned Op0,uint32_t Idx) fastEmitInst_extractsubreg() argument 2243 fastEmitZExtFromI1(MVT VT,unsigned Op0) fastEmitZExtFromI1() argument [all...] |
H A D | LegalizeFloatTypes.cpp | 1000 SDValue Op0 = GetSoftenedFloat(N->getOperand(0)); SoftenFloatOp_BITCAST() local 1154 SDValue Op0 = N->getOperand(IsStrict ? 1 : 0); SoftenFloatOp_SETCC() local 2406 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); PromoteFloatOp_SETCC() local 2661 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); PromoteFloatRes_FCOPYSIGN() local 2685 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); PromoteFloatRes_BinOp() local 2693 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); PromoteFloatRes_FMAD() local 2704 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); PromoteFloatRes_ExpOp() local 3064 SDValue Op0 = GetSoftPromotedHalf(N->getOperand(0)); SoftPromoteHalfRes_FMAD() local 3084 SDValue Op0 = GetSoftPromotedHalf(N->getOperand(0)); SoftPromoteHalfRes_ExpOp() local 3216 SDValue Op0 = GetSoftPromotedHalf(N->getOperand(0)); SoftPromoteHalfRes_BinOp() local 3307 SDValue Op0 = GetSoftPromotedHalf(N->getOperand(0)); SoftPromoteHalfOp_BITCAST() local 3388 SDValue Op0 = N->getOperand(0); SoftPromoteHalfOp_SELECT_CC() local 3408 SDValue Op0 = N->getOperand(0); SoftPromoteHalfOp_SETCC() local [all...] |
/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 531 buildPtrMask(const DstOp & Res,const SrcOp & Op0,const SrcOp & Op1) buildPtrMask() argument 593 buildUAddo(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1) buildUAddo() argument 599 buildUSubo(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1) buildUSubo() argument 605 buildSAddo(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1) buildSAddo() argument 611 buildSSubo(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1) buildSSubo() argument 630 buildUAdde(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1,const SrcOp & CarryIn) buildUAdde() argument 638 buildUSube(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1,const SrcOp & CarryIn) buildUSube() argument 646 buildSAdde(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1,const SrcOp & CarryIn) buildSAdde() argument 654 buildSSube(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1,const SrcOp & CarryIn) buildSSube() argument [all...] |
/llvm-project/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.cpp | 158 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; parseGenericRegister() local 172 uint32_t Op0 = (Bits >> 14) & 0x3; genericRegisterString() local
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/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | Scalarizer.cpp | 645 Value *Op0 = VOp0[Frag]; splitBinary() local 776 Value *Op0 = VOp0[I]; visitSelectInst() local 783 Value *Op0 = SI.getOperand(0); visitSelectInst() local 869 Scatterer Op0 = scatter(&CI, CI.getOperand(0), *SrcVS); visitCastInst() local 893 Scatterer Op0 = scatter(&BCI, BCI.getOperand(0), *SrcVS); visitBitCastInst() local 968 Scatterer Op0 = scatter(&IEI, IEI.getOperand(0), *VS); visitInsertElementInst() local 1019 Scatterer Op0 = scatter(&EEI, EEI.getOperand(0), *VS); visitExtractElementInst() local 1060 Scatterer Op0 = scatter(&SVI, SVI.getOperand(0), *VSOp); visitShuffleVectorInst() local [all...] |
/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFAdjustOpt.cpp | 107 if (!isa<TruncInst>(Op0)) in adjustICmpToBuiltin() local 163 // Use LogicalOr (accept `or i1` as well as `select i1 Op0, true, Op1`) in serializeICMPInBB() local
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/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.cpp | 184 void MachineIRBuilder::validateUnaryOp(const LLT Res, const LLT Op0) { in validateUnaryOp() argument 189 void MachineIRBuilder::validateBinaryOp(const LLT Res, const LLT Op0, in validateBinaryOp() argument 195 void MachineIRBuilder::validateShiftOp(const LLT Res, const LLT Op0, in validateShiftOp() argument 202 MachineIRBuilder::buildPtrAdd(const DstOp &Res, const SrcOp &Op0, in buildPtrAdd() argument 212 MachineIRBuilder::materializePtrAdd(Register &Res, Register Op0, in materializePtrAdd() argument 228 buildMaskLowPtrBits(const DstOp & Res,const SrcOp & Op0,uint32_t NumBits) buildMaskLowPtrBits() argument 239 buildPadVectorWithUndefElements(const DstOp & Res,const SrcOp & Op0) buildPadVectorWithUndefElements() argument 270 buildDeleteTrailingVectorElements(const DstOp & Res,const SrcOp & Op0) buildDeleteTrailingVectorElements() argument 900 buildICmp(CmpInst::Predicate Pred,const DstOp & Res,const SrcOp & Op0,const SrcOp & Op1) buildICmp() argument 907 buildFCmp(CmpInst::Predicate Pred,const DstOp & Res,const SrcOp & Op0,const SrcOp & Op1,std::optional<unsigned> Flags) buildFCmp() argument 916 buildSelect(const DstOp & Res,const SrcOp & Tst,const SrcOp & Op0,const SrcOp & Op1,std::optional<unsigned> Flags) buildSelect() argument [all...] |
/llvm-project/llvm/lib/IR/ |
H A D | AutoUpgrade.cpp | 1579 emitX86Select(IRBuilder<> & Builder,Value * Mask,Value * Op0,Value * Op1) emitX86Select() argument 1591 emitX86ScalarSelect(IRBuilder<> & Builder,Value * Mask,Value * Op0,Value * Op1) emitX86ScalarSelect() argument 1608 upgradeX86ALIGNIntrinsics(IRBuilder<> & Builder,Value * Op0,Value * Op1,Value * Shift,Value * Passthru,Value * Mask,bool IsVALIGN) upgradeX86ALIGNIntrinsics() argument 1717 Value *Op0 = CI.getOperand(0); upgradeX86BinaryIntrinsics() local 1799 Value *Op0 = CI.getArgOperand(0); upgradeX86ConcatShift() local 1876 Value *Op0 = CI.getArgOperand(0); upgradeAbs() local 1938 Value *Op0 = CI.getArgOperand(0); upgradeMaskedCompare() local 2366 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 2929 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 2943 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 2989 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 3013 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 3065 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 3087 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 3106 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 3124 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 3151 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 3172 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local 3188 Value *Op0 = CI->getArgOperand(0); upgradeX86IntrinsicCall() local [all...] |
/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyTargetTransformInfo.cpp | 86 Opcode, Val, CostKind, Index, Op0, Op1); in getVectorInstrCost() argument
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/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86RegisterBankInfo.cpp | 329 auto &Op0 = MI.getOperand(0); getInstrMapping() local 358 auto &Op0 = MI.getOperand(0); getInstrMapping() local
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/llvm-project/llvm/include/llvm/IR/ |
H A D | GetElementPtrTypeIterator.h | 197 gep_type_begin(Type *Op0, ArrayRef<T> A) { in gep_type_begin()
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/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonSplitDouble.cpp | 697 MachineOperand &Op0 = MI->getOperand(0); in splitImmediate() local 724 MachineOperand &Op0 = MI->getOperand(0); in splitCombine() local 754 MachineOperand &Op0 = MI->getOperand(0); in splitExt() local 776 MachineOperand &Op0 in splitShift() local 900 MachineOperand &Op0 = MI->getOperand(0); splitAslOr() local [all...] |
/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600TargetTransformInfo.cpp | 112 unsigned Index, Value *Op0, in getVectorInstrCost()
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/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYISelDAGToDAG.cpp | 307 auto Op0 = N->getOperand(0); in selectAddCarry() local 350 auto Op0 = N->getOperand(0); in selectSubCarry() local
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/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstCombineIntrinsic.cpp | 1800 simplifyX86extrq(IntrinsicInst & II,Value * Op0,ConstantInt * CILength,ConstantInt * CIIndex,InstCombiner::BuilderTy & Builder) simplifyX86extrq() argument 1891 simplifyX86insertq(IntrinsicInst & II,Value * Op0,Value * Op1,APInt APLength,APInt APIndex,InstCombiner::BuilderTy & Builder) simplifyX86insertq() argument 2720 Value *Op0 = II.getArgOperand(0); instCombineIntrinsic() local 2762 Value *Op0 = II.getArgOperand(0); instCombineIntrinsic() local 2785 Value *Op0 = II.getArgOperand(0); instCombineIntrinsic() local 2821 Value *Op0 = II.getArgOperand(0); instCombineIntrinsic() local 2866 Value *Op0 = II.getArgOperand(0); instCombineIntrinsic() local [all...] |
/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 3786 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitBuiltinExpr() local 3804 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitBuiltinExpr() local 3820 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitBuiltinExpr() local 11758 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); EmitAArch64BuiltinExpr() local 11770 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); EmitAArch64BuiltinExpr() local 11782 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); EmitAArch64BuiltinExpr() local 13632 EmitX86FunnelShift(CodeGenFunction & CGF,Value * Op0,Value * Op1,Value * Amt,bool IsRight) EmitX86FunnelShift() argument 13652 Value *Op0 = Ops[0]; EmitX86vpcom() local 13691 EmitX86Select(CodeGenFunction & CGF,Value * Mask,Value * Op0,Value * Op1) EmitX86Select() argument 13705 EmitX86ScalarSelect(CodeGenFunction & CGF,Value * Mask,Value * Op0,Value * Op1) EmitX86ScalarSelect() argument 16847 Value *Op0 = llvm::ConstantInt::get(Int32Ty, PPC_FAWORD_CPUID); EmitPPCBuiltinExpr() local 16887 Value *Op0 = llvm::ConstantInt::get(Int32Ty, FeatureWord); EmitPPCBuiltinExpr() local 17039 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17092 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17212 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17278 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17291 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17307 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17335 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17356 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17364 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17377 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17500 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17513 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17524 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17587 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17627 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17660 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17684 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17722 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17735 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17750 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17895 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17903 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17920 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17929 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17973 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17980 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17988 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 17996 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 18004 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 18012 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 18020 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 18029 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitPPCBuiltinExpr() local 18261 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitHLSLBuiltinExpr() local 18268 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitHLSLBuiltinExpr() local 18290 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitHLSLBuiltinExpr() local 18337 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitHLSLBuiltinExpr() local 18345 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitHLSLBuiltinExpr() local 18386 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitHLSLBuiltinExpr() local 18401 Value *Op0 = EmitScalarExpr(E->getArg(0)); EmitHLSLBuiltinExpr() local [all...] |