/llvm-project/llvm/tools/llvm-reduce/deltas/ |
H A D | ReduceOpcodes.cpp | 231 if (Value *NewOp = tryReplaceCallWithLoadStore(O, M, CB)) in reduceInstruction() local 234 if (Value *NewOp = tryReplaceCallWithLoadStore(O, M, CB)) reduceInstruction() local
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/llvm-project/llvm/lib/CodeGen/ |
H A D | ExpandVectorPredication.cpp | 115 replaceOperation(Value & NewOp,VPIntrinsic & OldOp) replaceOperation() argument 301 Value *NewOp = Builder.CreateCall(Fn, {Op0, Op1}, VPI.getName()); expandPredicationToIntCall() local 310 Value *NewOp = Builder.CreateCall(Fn, {Op}, VPI.getName()); expandPredicationToIntCall() local 329 Value *NewOp = Builder.CreateCall(Fn, {Op0}, VPI.getName()); expandPredicationToFPCall() local 339 Value *NewOp = Builder.CreateCall(Fn, {Op0, Op1}, VPI.getName()); expandPredicationToFPCall() local 352 Value *NewOp; expandPredicationToFPCall() local [all...] |
/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 244 int NewOp = QII->getInvertedPredicatedOpcode(MI.getOpcode()); runOnMachineFunction() local 255 unsigned NewOp = 0; runOnMachineFunction() local
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/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelDAGToDAG.cpp | 268 SDValue NewOp = Op->getOperand(0); Select() local
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 159 SDValue NewOp = Ops[i]; makeLibCall() local 548 SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC, ShrinkDemandedConstant() local 1291 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc, NewSub, SimplifyDemandedBits() local 1318 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, SimplifyDemandedBits() local 1382 SDValue NewOp = TLO.DAG.getVectorShuffle(VT, dl, Op0, Op1, ShuffleMask); SimplifyDemandedBits() local 1478 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1); SimplifyDemandedBits() local 1530 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1); SimplifyDemandedBits() local 1655 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1); SimplifyDemandedBits() local 1830 SDValue NewOp = TLO.DAG.getNode(ISD::SHL, dl, VT, DemandedOp0, Op1); SimplifyDemandedBits() local 1882 SDValue NewOp = TLO.DAG.getNode(ISD::TRUNCATE, dl, HalfVT, Op0); SimplifyDemandedBits() local 1979 SDValue NewOp = TLO.DAG.getNode(ISD::TRUNCATE, dl, HalfVT, Op0); SimplifyDemandedBits() local 2003 SDValue NewOp = TLO.DAG.getNode(ISD::SRL, dl, VT, DemandedOp0, Op1); SimplifyDemandedBits() local 2118 SDValue NewOp = TLO.DAG.getNode(ISD::SRA, dl, VT, DemandedOp0, Op1); SimplifyDemandedBits() local 2177 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedOp0, SimplifyDemandedBits() local 2324 SDValue NewOp = TLO.DAG.getNode(ShiftOpcode, dl, VT, Src, ShAmt); SimplifyDemandedBits() local 2658 SDValue NewOp = SimplifyDemandedBits() local 2757 SDValue NewOp = TLO.DAG.getBitcast(VT, DemandedSrc); SimplifyDemandedBits() local 2840 SDValue NewOp = SimplifyDemandedBits() local 2860 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Neg1, Flags); SimplifyDemandedBits() local 3086 SDValue NewOp = SimplifyDemandedVectorElts() local 3290 SDValue NewOp = SimplifyDemandedVectorElts() local 3334 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, NewSrc, SimplifyDemandedVectorElts() local 3362 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, NewSrc, SimplifyDemandedVectorElts() local 8352 unsigned NewOp = Node->getOpcode() == ISD::FMINNUM ? expandFMINNUM_FMAXNUM() local [all...] |
H A D | LegalizeFloatTypes.cpp | 274 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0)); SoftenFloatRes_EXTRACT_VECTOR_ELT() local 2642 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0)); PromoteFloatRes_EXTRACT_VECTOR_ELT() local 3007 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0)); SoftPromoteHalfRes_EXTRACT_VECTOR_ELT() local
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H A D | FastISel.cpp | 2028 Register NewOp = createResultReg(RegClass); in constrainOperandRegClass() local
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/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 3306 if (Value *NewOp = visitCallInst() local 3344 if (Value *NewOp = visitCallInst() local 3379 if (Value *NewOp = visitCallInst() local 3409 if (Value *NewOp = visitCallInst() local 3440 if (Value *NewOp = visitCallInst() local 3482 if (Value *NewOp = visitCallInst() local 3518 if (Value *NewOp = simplifyReductionOperand(Arg, CanReorderLanes)) { visitCallInst() local [all...] |
H A D | InstCombineShifts.cpp | 887 return SelectInst::Create(Cond, NewOp, NewShift); in FoldShiftByConstant() local 870 Value *NewOp = Builder.CreateBinOp(TBO->getOpcode(), NewShift, NewRHS); FoldShiftByConstant() local 1189 auto *NewOp = BinaryOperator::Create(Op0BO->getOpcode(), M, YS); visitShl() local
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H A D | InstCombinePHI.cpp | 317 if (auto *NewOp = foldPHIArgIntToPtrToPHI() local
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H A D | InstCombineAndOrXor.cpp | 1679 Value *NewOp = IC.Builder.CreateBinOp(LogicOpc, X, TruncC); foldLogicCastConstant() local 1687 Value *NewOp = IC.Builder.CreateBinOp(LogicOpc, X, TruncC); foldLogicCastConstant() local 1786 Value *NewOp = Builder.CreateBinOp(LogicOpc, Cast0Src, Cast1Src, foldCastedBitwiseLogic() local
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H A D | InstCombineMulDivRem.cpp | 223 Value *NewOp; visitMul() local
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/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VPlanSLP.cpp | 425 VPInstruction *NewOp = buildGraph(Ops.second); in buildGraph() local
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H A D | VPlanTransforms.cpp | 1182 VPWidenCastRecipe *NewOp = truncateToMinimalBitwidths() local
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H A D | VPlan.cpp | 1164 VPValue *NewOp = Old2NewVPValues.lookup(NewR.getOperand(I)); remapOperands() local
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/llvm-project/llvm/tools/obj2yaml/ |
H A D | dwarf2yaml.cpp | 416 DWARFYAML::LineTableOpcode NewOp = {}; in dumpDebugLines() local [all...] |
/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFCheckAndAdjustIR.cpp | 470 Value *NewOp = aspaceWrapValue(Cache, I->getFunction(), OldOp); aspaceWrapOperand() local
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/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVEmitIntrinsics.cpp | 1280 auto *NewOp = processInstrAfterVisit() local 1303 auto *NewOp = buildIntrWithMD(Intrinsic::spv_track_constant, processInstrAfterVisit() local
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/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | SeparateConstOffsetFromGEP.cpp | 753 BinaryOperator::BinaryOps NewOp = BO->getOpcode(); in removeConstOffset() local
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H A D | CorrelatedValuePropagation.cpp | 614 Value *NewOp = processOverflowIntrinsic() local
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H A D | Reassociate.cpp | 698 BinaryOperator *NewOp; in RewriteExprTree() local
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/llvm-project/clang-tools-extra/clang-tidy/readability/ |
H A D | SimplifyBooleanExprCheck.cpp | 847 auto NewOp = getDemorganFlippedOperator(BinOp->getOpcode()); in flipDemorganBinaryOperator() local
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/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 820 Value *NewOp = NewLoad; foldConsecutiveLoads() local
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULowerBufferFatPointers.cpp | 641 auto *NewOp = dyn_cast_or_null<Constant>(InternalMapper.mapValue(*Op)); materializeBufferFatPtrConst() local
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/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 13209 tryAdvSIMDModImm64(unsigned NewOp,SDValue Op,SelectionDAG & DAG,const APInt & Bits) tryAdvSIMDModImm64() argument 13230 tryAdvSIMDModImm32(unsigned NewOp,SDValue Op,SelectionDAG & DAG,const APInt & Bits,const SDValue * LHS=nullptr) tryAdvSIMDModImm32() argument 13283 tryAdvSIMDModImm16(unsigned NewOp,SDValue Op,SelectionDAG & DAG,const APInt & Bits,const SDValue * LHS=nullptr) tryAdvSIMDModImm16() argument 13328 tryAdvSIMDModImm321s(unsigned NewOp,SDValue Op,SelectionDAG & DAG,const APInt & Bits) tryAdvSIMDModImm321s() argument 13359 tryAdvSIMDModImm8(unsigned NewOp,SDValue Op,SelectionDAG & DAG,const APInt & Bits) tryAdvSIMDModImm8() argument 13380 tryAdvSIMDModImmFP(unsigned NewOp,SDValue Op,SelectionDAG & DAG,const APInt & Bits) tryAdvSIMDModImmFP() argument 13612 SDValue NewOp; LowerVectorOR() local 13675 SDValue NewOp; ConstantBuildVector() local 13717 if (SDValue NewOp = TryMOVIWithBits(NegBits)) { ConstantBuildVector() local 18021 SDValue NewOp = DAG.getNode(N->getOpcode(), DL, HalfVT, NewN0, NewN1); performVectorExtCombine() local 18857 SDValue NewOp; performANDCombine() local 20493 SDValue NewOp = GenCombinedTree(Op0, Op1, DAG); performExtBinopLoadFold() local 22307 unsigned NewOp = IsLaneOp ? AArch64ISD::LD1LANEpost : AArch64ISD::LD1DUPpost; performPostLD1Combine() local [all...] |