N1 (definition) in projects: freebsd-src

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Searched defs:N1 (Results 1 – 25 of 40) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A D	DAGCombiner.cpp	975 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2) getNode() argument 984 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2,SDValue N3) getNode() argument 1002 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2,SDNodeFlags Flags) getNode() argument 1011 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2,SDValue N3,SDNodeFlags Flags) getNode() argument 1131 SDValue N0, N1, N2; isOneUseSetCC() local 1204 reassociationCanBreakAddressingModePattern(unsigned Opc,const SDLoc & DL,SDNode * N,SDValue N0,SDValue N1) reassociationCanBreakAddressingModePattern() argument 1285 reassociateOpsCommutative(unsigned Opc,const SDLoc & DL,SDValue N0,SDValue N1,SDNodeFlags Flags) reassociateOpsCommutative() argument 1383 reassociateOps(unsigned Opc,const SDLoc & DL,SDValue N0,SDValue N1,SDNodeFlags Flags) reassociateOps() argument 1404 reassociateReduction(unsigned RedOpc,unsigned Opc,const SDLoc & DL,EVT VT,SDValue N0,SDValue N1,SDNodeFlags Flags) reassociateReduction() argument 1615 SDValue N1 = Op.getOperand(1); PromoteIntBinOp() local 1691 SDValue N1 = Op.getOperand(1); PromoteIntShiftOp() local 2139 SDValue N1 = N->getOperand(1); combine() local 2484 SDValue N1 = N->getOperand(1); foldSelectWithIdentityConstant() local 2716 SDValue N1 = N->getOperand(1); visitADDLike() local 2806 __anon29909ce20302(SDValue N0, SDValue N1) visitADDLike() argument 2964 SDValue N1 = N->getOperand(1); visitADD() local 3025 SDValue N1 = N->getOperand(1); visitADDSAT() local 3116 foldAddSubMasked1(bool IsAdd,SDValue N0,SDValue N1,SelectionDAG & DAG,const SDLoc & DL) foldAddSubMasked1() argument 3141 visitADDLikeCommutative(SDValue N0,SDValue N1,SDNode * LocReference) visitADDLikeCommutative() argument 3234 SDValue N1 = N->getOperand(1); visitADDC() local 3306 SDValue N1 = N->getOperand(1); visitADDO() local 3356 visitUADDOLike(SDValue N0,SDValue N1,SDNode * N) visitUADDOLike() argument 3382 SDValue N1 = N->getOperand(1); visitADDE() local 3401 SDValue N1 = N->getOperand(1); visitUADDO_CARRY() local 3565 combineCarryDiamond(SelectionDAG & DAG,const TargetLowering & TLI,SDValue N0,SDValue N1,SDNode * N) combineCarryDiamond() argument 3634 visitUADDO_CARRYLike(SDValue N0,SDValue N1,SDValue CarryIn,SDNode * N) visitUADDO_CARRYLike() argument 3674 visitSADDO_CARRYLike(SDValue N0,SDValue N1,SDValue CarryIn,SDNode * N) visitSADDO_CARRYLike() argument 3688 SDValue N1 = N->getOperand(1); visitSADDO_CARRY() local 3803 SDValue N1 = N->getOperand(1); visitSUB() local 4184 SDValue N1 = N->getOperand(1); visitSUBSAT() local 4224 SDValue N1 = N->getOperand(1); visitSUBC() local 4252 SDValue N1 = N->getOperand(1); visitSUBO() local 4296 SDValue N1 = N->getOperand(1); visitSUBE() local 4308 SDValue N1 = N->getOperand(1); visitUSUBO_CARRY() local 4323 SDValue N1 = N->getOperand(1); visitSSUBO_CARRY() local 4340 SDValue N1 = N->getOperand(1); visitMULFIX() local 4362 SDValue N1 = N->getOperand(1); visitMUL() local 4692 SDValue N1 = N->getOperand(1); simplifyDivRem() local 4738 SDValue N1 = N->getOperand(1); visitSDIV() local 4815 visitSDIVLike(SDValue N0,SDValue N1,SDNode * N) visitSDIVLike() argument 4886 SDValue N1 = N->getOperand(1); visitUDIV() local 4939 visitUDIVLike(SDValue N0,SDValue N1,SDNode * N) visitUDIVLike() argument 4982 buildOptimizedSREM(SDValue N0,SDValue N1,SDNode * N) buildOptimizedSREM() argument 4996 SDValue N1 = N->getOperand(1); visitREM() local 5089 SDValue N1 = N->getOperand(1); visitMULHS() local 5149 SDValue N1 = N->getOperand(1); visitMULHU() local 5227 SDValue N1 = N->getOperand(1); visitAVG() local 5271 SDValue N1 = N->getOperand(1); visitABD() local 5364 SDValue N1 = N->getOperand(1); visitSMUL_LOHI() local 5406 SDValue N1 = N->getOperand(1); visitUMUL_LOHI() local 5457 SDValue N1 = N->getOperand(1); visitMULO() local 5517 isSaturatingMinMax(SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC,unsigned & BW,bool & Unsigned,SelectionDAG & DAG) isSaturatingMinMax() argument 5521 __anon29909ce20a02(SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC) isSaturatingMinMax() argument 5620 PerformMinMaxFpToSatCombine(SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC,SelectionDAG & DAG) PerformMinMaxFpToSatCombine() argument 5642 PerformUMinFpToSatCombine(SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC,SelectionDAG & DAG) PerformUMinFpToSatCombine() argument 5680 SDValue N1 = N->getOperand(1); visitIMINMAX() local 5757 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); hoistLogicOpWithSameOpcodeHands() local 5937 foldLogicOfSetCCs(bool IsAnd,SDValue N0,SDValue N1,const SDLoc & DL) foldLogicOfSetCCs() argument 6362 visitANDLike(SDValue N0,SDValue N1,SDNode * N) visitANDLike() argument 6709 SDValue N1 = N->getOperand(1); unfoldExtremeBitClearingToShifts() local 6833 SDValue N1 = N->getOperand(1); foldAndToUsubsat() local 6947 SDValue N1 = N->getOperand(1); visitAND() local 7365 MatchBSwapHWordLow(SDNode * N,SDValue N0,SDValue N1,bool DemandHighBits) MatchBSwapHWordLow() argument 7594 matchBSwapHWordOrAndAnd(const TargetLowering & TLI,SelectionDAG & DAG,SDNode * N,SDValue N0,SDValue N1,EVT VT,EVT ShiftAmountTy) matchBSwapHWordOrAndAnd() argument 7636 MatchBSwapHWord(SDNode * N,SDValue N0,SDValue N1) MatchBSwapHWord() argument 7701 visitORLike(SDValue N0,SDValue N1,SDNode * N) visitORLike() argument 7753 visitORCommutative(SelectionDAG & DAG,SDValue N0,SDValue N1,SDNode * N) visitORCommutative() argument 7835 SDValue N1 = N->getOperand(1); visitOR() local 8327 MatchFunnelPosNeg(SDValue N0,SDValue N1,SDValue Pos,SDValue Neg,SDValue InnerPos,SDValue InnerNeg,bool HasPos,unsigned PosOpcode,unsigned NegOpcode,const SDLoc & DL) MatchFunnelPosNeg() argument 9325 SDValue N1 = N->getOperand(1); unfoldMaskedMerge() local 9376 SDValue N1 = N->getOperand(1); visitXOR() local 9768 SDValue N1 = N->getOperand(1); visitRotate() local 9847 SDValue N1 = N->getOperand(1); visitSHL() local 10297 SDValue N1 = N->getOperand(1); visitSRA() local 10501 SDValue N1 = N->getOperand(1); visitSRL() local 10766 SDValue N1 = N->getOperand(1); visitFunnelShift() local 10879 SDValue N1 = N->getOperand(1); visitSHLSAT() local 11318 SDValue N1 = N->getOperand(1); foldSelectOfConstants() local 11471 SDValue N1 = N->getOperand(1); foldVSelectToSignBitSplatMask() local 11529 SDValue N1 = N->getOperand(1); visitSELECT() local 12092 SDValue N1 = N->getOperand(1); foldVSelectOfConstants() local 12155 SDValue N1 = N->getOperand(1); visitVSELECT() local 12443 SDValue N1 = N->getOperand(1); visitSELECT_CC() local 12500 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); visitSETCC() local 13002 SDValue N1 = N0->getOperand(0); CombineZExtLogicopShiftLoad() local 14089 SDValue N1 = N->getOperand(1); visitAssertExt() local 14413 SDValue N1 = N->getOperand(1); visitSIGN_EXTEND_INREG() local 15563 SDValue N1 = N->getOperand(1); visitFADDForFMACombine() local 15800 SDValue N1 = N->getOperand(1); visitFSUBForFMACombine() local 16129 SDValue N1 = N->getOperand(1); visitFMULForFMADistributiveCombine() local 16233 SDValue N1 = N->getOperand(1); visitFADD() local 16427 SDValue N1 = N->getOperand(2); visitSTRICT_FADD() local 16453 SDValue N1 = N->getOperand(1); visitFSUB() local 16643 SDValue N1 = N->getOperand(1); visitFMUL() local 16791 SDValue N1 = N->getOperand(1); visitFMA() local 16918 SDValue N1 = N->getOperand(1); visitFMAD() local 16948 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); combineRepeatedFPDivisors() local 17013 SDValue N1 = N->getOperand(1); visitFDIV() local 17160 SDValue N1 = N->getOperand(1); visitFREM() local 17219 SDValue N1 = N->getOperand(1); CanCombineFCOPYSIGN_EXTEND_ROUND() local 17230 SDValue N1 = N->getOperand(1); visitFCOPYSIGN() local 17559 SDValue N1 = N->getOperand(1); visitFP_ROUND() local 17769 SDValue N1 = N->getOperand(1); visitFMinMax() local 17850 SDValue N1 = N->getOperand(1); visitBRCOND() local 19599 SDValue N1 = Value.getOperand(1); ReduceLoadOpStoreWidth() local 24602 SDValue N0 = Shuf->getOperand(0), N1 = Shuf->getOperand(1); foldShuffleOfConcatUndefs() local 24653 SDValue N1 = N->getOperand(1); partitionShuffleOfConcats() local 24733 SDValue N1 = SVN->getOperand(1); combineShuffleOfScalars() local 25379 SDValue N1 = N->getOperand(1); visitVECTOR_SHUFFLE() local 25766 __anon29909ce26702(bool Commute, ShuffleVectorSDNode SVN, ShuffleVectorSDNode OtherSVN, SDValue N1, const TargetLowering &TLI, SDValue &SV0, SDValue &SV1, SmallVectorImpl<int> &Mask) visitVECTOR_SHUFFLE() argument 26124 SDValue N1 = N->getOperand(1); visitINSERT_SUBVECTOR() local 26624 SDValue N1 = N->getOperand(1); scalarizeBinOpOfSplats() local 26816 SimplifySelect(const SDLoc & DL,SDValue N0,SDValue N1,SDValue N2) SimplifySelect() argument 27043 foldSelectCCToShiftAnd(const SDLoc & DL,SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC) foldSelectCCToShiftAnd() argument 27116 SDValue N1 = N->getOperand(1); foldSelectOfBinops() local 27213 convertSelectOfFPConstantsToLoadOffset(const SDLoc & DL,SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC) convertSelectOfFPConstantsToLoadOffset() argument 27267 SimplifySelectCC(const SDLoc & DL,SDValue N0,SDValue N1,SDValue N2,SDValue N3,ISD::CondCode CC,bool NotExtCompare) SimplifySelectCC() argument 27432 SimplifySetCC(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & DL,bool foldBooleans) SimplifySetCC() argument [all...]
H A D	SelectionDAG.cpp	2043 commuteShuffle(SDValue & N1,SDValue & N2,MutableArrayRef<int> M) commuteShuffle() argument 2048 getVectorShuffle(EVT VT,const SDLoc & dl,SDValue N1,SDValue N2,ArrayRef<int> Mask) getVectorShuffle() argument 2486 FoldSetCC(EVT VT,SDValue N1,SDValue N2,ISD::CondCode Cond,const SDLoc & dl) FoldSetCC() argument 5575 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1) getNode() argument 5583 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,const SDNodeFlags Flags) getNode() argument 6071 SDValue N1 = Ops[0]; FoldConstantArithmetic() local 6275 SDValue N1 = peekThroughBitcasts(Ops[0]); FoldConstantArithmetic() local 6438 SDValue N1 = Ops[0]; foldConstantFPMath() local 6536 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2) getNode() argument 6543 canonicalizeCommutativeBinop(unsigned Opcode,SDValue & N1,SDValue & N2) const canonicalizeCommutativeBinop() argument 6565 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2,const SDNodeFlags Flags) getNode() argument 7059 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2,SDValue N3) getNode() argument 7067 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2,SDValue N3,const SDNodeFlags Flags) getNode() argument 7241 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2,SDValue N3,SDValue N4) getNode() argument 7247 getNode(unsigned Opcode,const SDLoc & DL,EVT VT,SDValue N1,SDValue N2,SDValue N3,SDValue N4,SDValue N5) getNode() argument 9859 SDValue N1 = Ops[0], N2 = Ops[1]; getNode() local 10023 getNode(unsigned Opcode,const SDLoc & DL,SDVTList VTList,SDValue N1) getNode() argument 10029 getNode(unsigned Opcode,const SDLoc & DL,SDVTList VTList,SDValue N1,SDValue N2) getNode() argument 10035 getNode(unsigned Opcode,const SDLoc & DL,SDVTList VTList,SDValue N1,SDValue N2,SDValue N3) getNode() argument 10041 getNode(unsigned Opcode,const SDLoc & DL,SDVTList VTList,SDValue N1,SDValue N2,SDValue N3,SDValue N4) getNode() argument 10047 getNode(unsigned Opcode,const SDLoc & DL,SDVTList VTList,SDValue N1,SDValue N2,SDValue N3,SDValue N4,SDValue N5) getNode() argument 10837 SDValue N1 = N.getOperand(1); salvageDebugInfo() local [all...]
H A D	TargetLowering.cpp	3763 buildLegalVectorShuffle(EVT VT,const SDLoc & DL,SDValue N0,SDValue N1,MutableArrayRef<int> Mask,SelectionDAG & DAG) const buildLegalVectorShuffle() argument 3912 foldSetCCWithAnd(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & DL,DAGCombinerInfo & DCI) const foldSetCCWithAnd() argument 4016 optimizeSetCCOfSignedTruncationCheck(EVT SCCVT,SDValue N0,SDValue N1,ISD::CondCode Cond,DAGCombinerInfo & DCI,const SDLoc & DL) const optimizeSetCCOfSignedTruncationCheck() argument 4176 foldSetCCWithBinOp(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & DL,DAGCombinerInfo & DCI) const foldSetCCWithBinOp() argument 4290 foldSetCCWithRotate(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & dl,SelectionDAG & DAG) foldSetCCWithRotate() argument 4333 foldSetCCWithFunnelShift(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,const SDLoc & dl,SelectionDAG & DAG) foldSetCCWithFunnelShift() argument 4401 SimplifySetCC(EVT VT,SDValue N0,SDValue N1,ISD::CondCode Cond,bool foldBooleans,DAGCombinerInfo & DCI,const SDLoc & dl) const SimplifySetCC() argument 5374 SDValue N1 = N->getOperand(0); isGAPlusOffset() local 6220 SDValue N1 = N->getOperand(1); BuildSDIV() local 6346 SDValue N1 = N->getOperand(1); BuildUDIV() local [all...]
H A D	InstrEmitter.cpp	`552 SDValue N1 = Node->getOperand(1); EmitSubregNode() local`
/freebsd-src/sys/contrib/libsodium/test/default/
H A D	pwhash_scrypt_ll.c	`7 static const uint64_t N1 = 16U; variable`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A D	X86ISelDAGToDAG.cpp	3876 SDValue N1 = Node->getOperand(1); matchBitExtract() local 4034 SDValue N1 = Node->getOperand(1); matchBEXTRFromAndImm() local 4158 SDValue N1 = Node->getOperand(1); emitPCMPISTR() local 4353 SDValue N1 = N->getOperand(1); tryShrinkShlLogicImm() local 4596 SDValue N1 = N->getOperand(1); tryVPTERNLOG() local 4978 SDValue N1 = N->getOperand(1); tryMatchBitSelect() local 5259 SDValue N1 = Node->getOperand(1); Select() local 5308 SDValue N1 = Node->getOperand(1); Select() local 5405 SDValue N1 = Node->getOperand(1); Select() local 5483 SDValue N1 = Node->getOperand(1); Select() local 5608 SDValue N1 = Node->getOperand(1); Select() local 5790 SDValue N1 = Node->getOperand(IsStrictCmp ? 2 : 1); Select() local 5853 SDValue N1 = Node->getOperand(1); Select() local [all...]
H A D	X86OptimizeLEAs.cpp	`398 unsigned N1, in getAddrDispShift()`
H A D	X86ISelLowering.cpp	5716 SDValue N1 = N.getOperand(1); getFauxShuffleMask() local 5738 SDValue N1 = peekThroughBitcasts(N.getOperand(1)); getFauxShuffleMask() local 5939 SDValue N1 = N.getOperand(1); getFauxShuffleMask() local 10230 __anon973982072202(SDValue N1, SDValue N2, MVT PackVT) matchShuffleWithPACK() argument 12299 lowerShuffleOfExtractsAsVperm(const SDLoc & DL,SDValue N0,SDValue N1,ArrayRef<int> Mask,SelectionDAG & DAG) lowerShuffleOfExtractsAsVperm() argument 18067 SDValue N1 = Op.getOperand(1); LowerINSERT_VECTOR_ELT() local 26435 SDNode N1 = DAG.getMachineNode( expandIntrinsicWChainHelper() local 31479 SDValue N1 = InOp.getOperand(1); ExtendToType() local 32190 SDValue N1 = DAG.getConstant(SplatVal, dl, ResVT); ReplaceNodeResults() local 39580 SDValue N1 = V.getOperand(1); combineCommutableSHUFP() local 39601 SDValue N1 = N.getOperand(1); combineCommutableSHUFP() local 39728 SDValue N1 = peekThroughOneUseBitcasts(N.getOperand(1)); canonicalizeShuffleWithOp() local 40188 SDValue N1 = N.getOperand(1); combineTargetShuffle() local 40248 SDValue N1 = N.getOperand(1); combineTargetShuffle() local 40338 SDValue N1 = N.getOperand(1); combineTargetShuffle() local 40371 SDValue N1 = N.getOperand(1); combineTargetShuffle() local 40785 SDValue N1 = N->getOperand(1); combineShuffleOfConcatUndef() local 41273 SDValue N1 = Op.getOperand(1); SimplifyDemandedVectorEltsForTargetNode() local 41310 SDValue N1 = Op.getOperand(1); SimplifyDemandedVectorEltsForTargetNode() local 42849 if (SDValue N1 = combineBitcastToBoolVector(VT, Src1, DL, DAG, Subtarget)) combineBitcastToBoolVector() local 46456 SDValue N1 = N->getOperand(1); reduceVMULWidth() local 46619 SDValue N1 = N->getOperand(1); combineMulToPMADDWD() local 46720 SDValue N1 = N->getOperand(1); combineMulToPMULDQ() local 46990 SDValue N1 = N->getOperand(1); combineShiftLeft() local 47036 SDValue N1 = N->getOperand(1); combineShiftRightArithmetic() local 47096 SDValue N1 = N->getOperand(1); combineShiftRightLogical() local 47153 SDValue N1 = N->getOperand(1); combineHorizOpWithShuffle() local 47298 SDValue N1 = N->getOperand(1); combineVectorPack() local 47496 SDValue N1 = N->getOperand(1); combineVectorShiftVar() local 47529 SDValue N1 = N->getOperand(1); combineVectorShiftImm() local 47718 SDValue N1 = N->getOperand(1); combineCompareEqual() local 47825 SDValue N1 = N->getOperand(1); combineAndNotIntoANDNP() local 47888 SDValue N1 = N->getOperand(1); combineAndShuffleNot() local 47944 SDValue N1 = N->getOperand(1); PromoteMaskArithmetic() local 48037 SDValue N1 = N->getOperand(1); convertIntLogicToFPLogic() local 48102 SDValue N1 = N->getOperand(1); combineBitOpWithMOVMSK() local 48137 SDValue N1 = N->getOperand(1); combineBitOpWithShift() local 48180 SDValue N1 = N->getOperand(1); combineBitOpWithPACK() local 48548 SDValue N1 = N->getOperand(1); combineAnd() local 48818 SDValue N1 = peekThroughBitcasts(N->getOperand(1)); canonicalizeBitSelect() local 48876 SDValue N1 = N->getOperand(1); matchLogicBlend() local 49094 SDValue N1 = Node->getOperand(1); foldMaskedMerge() local 49323 combineOrXorWithSETCC(SDNode N,SDValue N0,SDValue N1,SelectionDAG & DAG) combineOrXorWithSETCC() argument 49355 SDValue N1 = N->getOperand(1); combineOr() local 49518 SDValue N1 = N->getOperand(1); foldXorTruncShiftIntoCmp() local 50720 __anon97398207be02(SDValue Op, SDValue &N0, SDValue &N1, SmallVectorImpl<int> &ShuffleMask) isHorizontalBinOp() argument 51112 __anon97398207c902(SDValue N0, SDValue N1) combineTruncatedArithmetic() argument 51265 SDValue N1 = SSatVal.getOperand(1); detectPMADDUBSW() local 51743 SDValue N1 = N->getOperand(1); combineXorSubCTLZ() local 51791 SDValue N1 = N->getOperand(1); combineXor() local 51945 SDValue N1 = N->getOperand(1); combineFAndFNotToFAndn() local 52186 SDValue N1 = N->getOperand(1); combineAndnp() local 52298 SDValue N1 = N->getOperand(1); combineBT() local 52359 SDValue N1 = N->getOperand(1); combineSextInRegCmov() local 52423 SDValue N1 = N->getOperand(1); combineSignExtendInReg() local 52946 __anon97398207d102(SDValue N0, SDValue N1) combineSetCC() argument 52964 __anon97398207d202(SDValue N0, SDValue N1) combineSetCC() argument 53963 __anon97398207d302(SDValue N0, SDValue N1, bool Negate) combineX86AddSub() argument 54154 SDValue N1 = DAG.getNode(ISD::TRUNCATE, DL, TruncVT, Mul.getOperand(1)); matchPMADDWD() local 54170 matchPMADDWD_2(SelectionDAG & DAG,SDValue N0,SDValue N1,const SDLoc & DL,EVT VT,const X86Subtarget & Subtarget) matchPMADDWD_2() argument 54310 combineAddOfPMADDWD(SelectionDAG & DAG,SDValue N0,SDValue N1,const SDLoc & DL,EVT VT) combineAddOfPMADDWD() argument 54480 SDValue N1 = N->getOperand(1); combineSubABS() local 56501 SDValue N1 = Op.getOperand(1); IsDesirableToPromoteOp() local [all...]
/freebsd-src/contrib/llvm-project/clang/lib/Tooling/ASTDiff/
H A D	ASTDiff.cpp	`757 const Node &N1 = T1.getNode(Id1); in identical() local 799 const Node &N1 = T1.getNode(Id1); in getJaccardSimilarity() local 844 const Node &N1 = T1.getNode(Id1); in matchBottomUp() local 944 Node &N1 = T1.getMutableNode(Id1); in computeChangeKinds() local`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/
H A D	MSP430ISelDAGToDAG.cpp	`352 tryIndexedBinOp(SDNode * Op,SDValue N1,SDValue N2,unsigned Opc8,unsigned Opc16) tryIndexedBinOp() argument`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/
H A D	XCoreISelLowering.cpp	`576 SDValue N1 = Op.getOperand(1); in isADDADDMUL() local 1539 SDValue N1 = N->getOperand(1); PerformDAGCombine() local 1575 SDValue N1 = N->getOperand(1); PerformDAGCombine() local 1612 SDValue N1 = N->getOperand(1); PerformDAGCombine() local [all...]`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A D	AMDGPUISelDAGToDAG.cpp	727 getBaseWithOffsetUsingSplitOR(SelectionDAG & DAG,SDValue Addr,SDValue & N0,SDValue & N1) getBaseWithOffsetUsingSplitOR() argument 1062 SDValue N1 = Addr.getOperand(1); SelectDS1Addr1Offset() local 1241 SDValue N1 = Addr.getOperand(1); SelectDSReadWrite2() local 1477 SDValue N1 = Addr.getOperand(1); SelectMUBUFScratchOffen() local 1628 SDValue N0, N1; SelectFlatOffsetImpl() local 2090 SDValue N0, N1; SelectSMRDBaseOffset() local 2180 SDValue N1 = Index.getOperand(1); SelectMOVRELOffset() local [all...]
H A D	AMDGPUISelLowering.cpp	3864 SDValue N1 = N->getOperand(1); performAssertSZExtCombine() local 4184 getMul24(SelectionDAG & DAG,const SDLoc & SL,SDValue N0,SDValue N1,unsigned Size,bool Signed) getMul24() argument 4227 SDValue N1 = N->getOperand(1); performMulCombine() local 4305 SDValue N1 = N->getOperand(1); performMulLoHiCombine() local 4359 SDValue N1 = N->getOperand(1); performMulhsCombine() local 4392 SDValue N1 = N->getOperand(1); performMulhuCombine() local 4470 distributeOpThroughSelect(TargetLowering::DAGCombinerInfo & DCI,unsigned Op,const SDLoc & SL,SDValue Cond,SDValue N1,SDValue N2) distributeOpThroughSelect() argument 5201 SDValue N1 = N->getOperand(1); PerformDAGCombine() local [all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/
H A D	LanaiISelLowering.cpp	`1357 SDValue N1 = N->getOperand(1); isConditionalZeroOrAllOnes() local 1447 SDValue N1 = N->getOperand(1); combineSelectAndUseCommutative() local 1461 SDValue N1 = N->getOperand(1); PerformSUBCombine() local [all...]`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/
H A D	BPFISelDAGToDAG.cpp	`203 SDValue N1 = Node->getOperand(1); Select() local`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A D	ARMISelLowering.cpp	7692 SDValue N1 = DAG.getNode(ARMISD::VCVTN, dl, VT, DAG.getUNDEF(VT), Op0, LowerBuildVectorOfFPTrunc() local 9591 SDNode N1 = N->getOperand(1).getNode(); isAddSubSExt() local 9602 SDNode N1 = N->getOperand(1).getNode(); isAddSubZExt() local 9616 SDNode N1 = Op.getOperand(1).getNode(); LowerMUL() local 9715 LowerSDIV_v4i16(SDValue N0,SDValue N1,const SDLoc & dl,SelectionDAG & DAG) LowerSDIV_v4i16() argument 9762 SDValue N1 = Op.getOperand(1); LowerSDIV() local 9799 SDValue N1 = Op.getOperand(1); LowerUDIV() local 12509 SDValue N1 = N->getOperand(1); isConditionalZeroOrAllOnes() local 12603 SDValue N1 = N->getOperand(1); combineSelectAndUseCommutative() local 12625 AddCombineToVPADD(SDNode N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineToVPADD() argument 12653 AddCombineVUZPToVPADDL(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineVUZPToVPADDL() argument 12706 AddCombineBUILD_VECTORToVPADDL(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) AddCombineBUILD_VECTORToVPADDL() argument 13350 ConstantSDNode N1 = isConstOrConstSplat(Shft.getOperand(1)); PerformVQDMULHCombine() local 13540 PerformADDCombineWithOperands(SDNode N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const ARMSubtarget * Subtarget) PerformADDCombineWithOperands() argument 13564 SDValue N1 = N->getOperand(1); TryDistrubutionADDVecReduce() local 13579 __anon0445ea3b1302(SDValue N0, SDValue N1) TryDistrubutionADDVecReduce() argument 13623 __anon0445ea3b1402(SDValue N0, SDValue N1, bool IsForward) TryDistrubutionADDVecReduce() argument 13627 __anon0445ea3b1502(SDValue N0, SDValue N1) TryDistrubutionADDVecReduce() argument 13716 SDValue N1 = N->getOperand(1); PerformADDVecReduce() local 13813 SDValue N1 = N->getOperand(0); isDesirableToCommuteWithShift() local 14021 SDValue N1 = N->getOperand(1); PerformADDCombine() local 14064 SDValue N1 = N->getOperand(1); PerformSUBCombine() local 14121 SDValue N1 = N->getOperand(1); PerformVMULCombine() local 14151 SDValue N1 = N->getOperand(1); PerformMVEVMULLCombine() local 14518 SDValue N1 = N->getOperand(1); PerformORCombineToBFI() local 14673 SDValue N1 = N->getOperand(1); PerformORCombine_i1() local 14737 SDValue N1 = N->getOperand(1); PerformORCombine() local 14813 SDValue N1 = N->getOperand(1); PerformXORCombine() local 14899 SDValue N1 = N->getOperand(1); PerformBFICombine() local [all...]
H A D	ARMISelDAGToDAG.cpp	`437 SDValue N1 = N.getOperand(1); PreprocessISelDAG() local 1103 SDValue N1 = N.getOperand(1); SelectAddrModePC() local 3900 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); Select() local 4126 SDValue N1 = N->getOperand(1); Select() local [all...]`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A D	HexagonCommonGEP.cpp	`479 static NodePair node_pair(GepNode N1, GepNode N2) { in node_pair() argument 495 static bool node_eq(GepNode N1, GepNode N2, NodePairSet &Eq, in node_eq() argument [all...]`
H A D	HexagonISelDAGToDAG.cpp	`1036 SDValue N0 = I->getOperand(0), N1 = I->getOperand(1); ppSimplifyOrSelect0() local 1447 SDValue N1 = N.getOperand(1); SelectGlobalAddress() local`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	12303 SDValue N1 = N->getOperand(1); transformAddShlImm() local 12415 SDValue N1 = N->getOperand(1); combineSelectAndUseCommutative() local 12493 SDValue N1 = N->getOperand(1); combineAddOfBooleanXor() local 12536 SDValue N1 = N->getOperand(1); combineSubOfBoolean() local 12580 SDValue N1 = N->getOperand(1); performSUBCombine() local 12604 SDValue N1 = N->getOperand(1); combineDeMorganOfBoolean() local 12712 combineOrOfCZERO(SDNode * N,SDValue N0,SDValue N1,SelectionDAG & DAG) combineOrOfCZERO() argument 12762 SDValue N1 = N->getOperand(1); performORCombine() local 12776 SDValue N1 = N->getOperand(1); performXORCombine() local 12835 SDValue N1 = N->getOperand(1); performMULCombine() local 12912 SDValue N1 = N.getOperand(1); narrowIndex() local 12943 SDValue N1 = N->getOperand(1); performSETCCCombine() local 15354 SDValue N1 = Op.getOperand(1); PerformDAGCombine() local [all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A D	NVPTXISelDAGToDAG.cpp	`947 SDValue N1 = N->getOperand(1); tryLoad() local [all...]`
H A D	NVPTXISelLowering.cpp	`5094 PerformADDCombineWithOperands(SDNode * N,SDValue N0,SDValue N1,TargetLowering::DAGCombinerInfo & DCI,const NVPTXSubtarget & Subtarget,CodeGenOptLevel OptLevel) PerformADDCombineWithOperands() argument 5209 SDValue N1 = N->getOperand(1); PerformADDCombine() local [all...]`
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A D	RDFGraph.h	`422 uint32_t N1 = N - 1; in ptr() local`
/freebsd-src/contrib/llvm-project/llvm/lib/Analysis/
H A D	LazyCallGraph.cpp	`1760 Node &N1 = get(*F1); addSplitRefRecursiveFunctions() local`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A D	AArch64ISelLowering.cpp	4559 SDValue N1 = N.getOperand(1); isAddSubSExt() local 4570 SDValue N1 = N.getOperand(1); isAddSubZExt() local 4644 selectUmullSmull(SDValue & N0,SDValue & N1,SelectionDAG & DAG,SDLoc DL,bool & IsMLA) selectUmullSmull() argument 4719 SDValue N1 = Op.getOperand(1); LowerMUL() local 17083 SDValue N1 = N->getOperand(1); performMulCombine() local 17155 __anon5c8f63cd1f02(SDValue N0, unsigned N1) performMulCombine() argument 17159 __anon5c8f63cd2002(SDValue N0, SDValue N1) performMulCombine() argument 17162 __anon5c8f63cd2102(SDValue N0, SDValue N1) performMulCombine() argument 17488 SDValue N1 = N->getOperand(1); tryCombineToBSL() local 18054 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); performExtractVectorEltCombine() local 18119 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); performConcatVectorsCombine() local 18844 SDValue N1 = CSel.getOperand(1); performNegCSelCombine() local 18994 SDValue N1 = N->getOperand(1).getOperand(0); performVectorAddSubExtCombine() local [all...]