Lines Matching defs:N1
424 SDValue visitADDLikeCommutative(SDValue N0, SDValue N1, SDNode *LocReference);
430 SDValue visitUADDOLike(SDValue N0, SDValue N1, SDNode *N);
436 SDValue visitUADDO_CARRYLike(SDValue N0, SDValue N1, SDValue CarryIn,
438 SDValue visitSADDO_CARRYLike(SDValue N0, SDValue N1, SDValue CarryIn,
447 SDValue visitSDIVLike(SDValue N0, SDValue N1, SDNode *N);
449 SDValue visitUDIVLike(SDValue N0, SDValue N1, SDNode *N);
460 SDValue visitANDLike(SDValue N0, SDValue N1, SDNode *N);
462 SDValue visitORLike(SDValue N0, SDValue N1, const SDLoc &DL);
574 SDValue N1);
576 SDValue N1, SDNodeFlags Flags);
578 SDValue N1, SDNodeFlags Flags);
580 EVT VT, SDValue N0, SDValue N1,
590 SDValue SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2);
591 SDValue SimplifySelectCC(const SDLoc &DL, SDValue N0, SDValue N1,
595 const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3,
598 SDValue foldSelectCCToShiftAnd(const SDLoc &DL, SDValue N0, SDValue N1,
602 SDValue foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1,
608 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
637 SDValue buildOptimizedSREM(SDValue N0, SDValue N1, SDNode *N);
650 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
652 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
657 SDValue MatchFunnelPosNeg(SDValue N0, SDValue N1, SDValue Pos, SDValue Neg,
1003 SDValue N0, N1, N2;
1004 if (isSetCCEquivalent(N, N0, N1, N2) && N->hasOneUse())
1076 SDValue N1) {
1093 if ((N1.getOpcode() == ISD::VSCALE ||
1094 ((N1.getOpcode() == ISD::SHL || N1.getOpcode() == ISD::MUL) &&
1095 N1.getOperand(0).getOpcode() == ISD::VSCALE &&
1096 isa<ConstantSDNode>(N1.getOperand(1)))) &&
1097 N1.getValueType().getFixedSizeInBits() <= 64) {
1098 int64_t ScalableOffset = N1.getOpcode() == ISD::VSCALE
1099 ? N1.getConstantOperandVal(0)
1100 : (N1.getOperand(0).getConstantOperandVal(0) *
1101 (N1.getOpcode() == ISD::SHL
1102 ? (1LL << N1.getConstantOperandVal(1))
1103 : N1.getConstantOperandVal(1)));
1126 auto *C2 = dyn_cast<ConstantSDNode>(N1);
1191 /// Helper for DAGCombiner::reassociateOps. Try to reassociate (Opc N0, N1) if
1194 SDValue N0, SDValue N1,
1210 if (DAG.isConstantIntBuildVectorOrConstantInt(peekThroughBitcasts(N1))) {
1212 if (SDValue OpNode = DAG.FoldConstantArithmetic(Opc, DL, VT, {N01, N1}))
1216 if (TLI.isReassocProfitable(DAG, N0, N1)) {
1219 SDValue OpNode = DAG.getNode(Opc, SDLoc(N0), VT, N00, N1, NewFlags);
1230 if (N1 == N00 || N1 == N01)
1235 if (N1 == N00)
1238 if (N1 == N01)
1242 if (TLI.isReassocProfitable(DAG, N0, N1)) {
1243 if (N1 != N01) {
1244 // Reassociate if (op N00, N1) already exist
1245 if (SDNode *NE = DAG.getNodeIfExists(Opc, DAG.getVTList(VT), {N00, N1})) {
1246 // if Op (Op N00, N1), N01 already exist
1253 if (N1 != N00) {
1254 // Reassociate if (op N01, N1) already exist
1255 if (SDNode *NE = DAG.getNodeIfExists(Opc, DAG.getVTList(VT), {N01, N1})) {
1256 // if Op (Op N01, N1), N00 already exist
1263 // Reassociate the operands from (OR/AND (OR/AND(N00, N001)), N1) to (OR/AND
1264 // (OR/AND(N00, N1)), N01) when N00 and N1 are comparisons with the same
1265 // predicate or to (OR/AND (OR/AND(N1, N01)), N00) when N01 and N1 are
1271 if (N1->getOpcode() == ISD::SETCC && N00->getOpcode() == ISD::SETCC &&
1273 ISD::CondCode CC1 = cast<CondCodeSDNode>(N1.getOperand(2))->get();
1277 SDValue OpNode = DAG.getNode(Opc, SDLoc(N0), VT, N00, N1, Flags);
1281 SDValue OpNode = DAG.getNode(Opc, SDLoc(N0), VT, N01, N1, Flags);
1291 /// Try to reassociate commutative (Opc N0, N1) if either \p N0 or \p N1 is the
1294 SDValue N1, SDNodeFlags Flags) {
1299 N1.getValueType().isFloatingPoint())
1303 if (SDValue Combined = reassociateOpsCommutative(Opc, DL, N0, N1, Flags))
1305 if (SDValue Combined = reassociateOpsCommutative(Opc, DL, N1, N0, Flags))
1315 SDValue N1, SDNodeFlags Flags) {
1316 if (N0.getOpcode() == RedOpc && N1.getOpcode() == RedOpc &&
1317 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType() &&
1318 N0->hasOneUse() && N1->hasOneUse() &&
1324 N0.getOperand(0), N1.getOperand(0)));
1526 SDValue N1 = Op.getOperand(1);
1527 SDValue NN1 = PromoteOperand(N1, PVT, Replace1);
1533 // We are always replacing N0/N1's use in N and only need additional
1539 Replace1 &= (N0 != N1) && !N1->hasOneUse();
1546 if (Replace0 && Replace1 && N0->isPredecessorOf(N1.getNode())) {
1547 std::swap(N0, N1);
1557 ReplaceLoadWithPromotedLoad(N1.getNode(), NN1.getNode());
1602 SDValue N1 = Op.getOperand(1);
1604 DAG.getNode(ISD::TRUNCATE, DL, VT, DAG.getNode(Opc, DL, PVT, N0, N1));
2055 SDValue N1 = N->getOperand(1);
2058 if (N0 != N1 && (isa<ConstantSDNode>(N0) || !isa<ConstantSDNode>(N1))) {
2059 SDValue Ops[] = {N1, N0};
2388 SDValue N1 = N->getOperand(1);
2390 std::swap(N0, N1);
2393 if (N1.getOpcode() != ISD::VSELECT || !N1.hasOneUse())
2403 SDValue Cond = N1.getOperand(0);
2404 SDValue TVal = N1.getOperand(1);
2405 SDValue FVal = N1.getOperand(2);
2637 SDValue N1 = N->getOperand(1);
2644 if (N1.isUndef())
2645 return N1;
2648 if (SDValue C = DAG.FoldConstantArithmetic(ISD::ADD, DL, VT, {N0, N1}))
2653 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
2654 return DAG.getNode(ISD::ADD, DL, VT, N1, N0);
2656 if (areBitwiseNotOfEachother(N0, N1))
2665 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
2670 if (isNullConstant(N1))
2678 if (SDValue Sub = DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N1, N01}))
2682 if (SDValue Add = DAG.FoldConstantArithmetic(ISD::ADD, DL, VT, {N1, N00}))
2691 isOneOrOneSplat(N1)) {
2708 if (SDValue Add = DAG.FoldConstantArithmetic(ISD::ADD, DL, VT, {N1, N01}))
2716 if (!reassociationCanBreakAddressingModePattern(ISD::ADD, DL, N, N0, N1)) {
2717 if (SDValue RADD = reassociateOps(ISD::ADD, DL, N0, N1, N->getFlags()))
2726 auto ReassociateAddOr = [&](SDValue N0, SDValue N1) {
2738 DAG.getNode(ISD::ADD, DL, VT, N1, N0.getOperand(0)),
2743 if (SDValue Add = ReassociateAddOr(N0, N1))
2745 if (SDValue Add = ReassociateAddOr(N1, N0))
2750 reassociateReduction(ISD::VECREDUCE_ADD, ISD::ADD, DL, VT, N0, N1))
2758 return DAG.getNode(ISD::SUB, DL, VT, N1, A);
2761 if (sd_match(N1, m_Neg(m_Value(B))))
2765 if (sd_match(N1, m_Sub(m_Value(B), m_Specific(N0))))
2769 if (sd_match(N0, m_Sub(m_Value(B), m_Specific(N1))))
2774 sd_match(N1, m_Sub(m_Value(C), m_Specific(A))))
2779 sd_match(N1, m_Sub(m_Specific(B), m_Value(C))))
2784 if (sd_match(N1, m_Sub(m_Value(B), m_Add(m_Specific(N0), m_Value(C)))))
2788 if (sd_match(N1,
2791 return DAG.getNode(N1.getOpcode(), DL, VT, B, C);
2795 sd_match(N1, m_OneUse(m_Sub(m_Value(C), m_Value(D)))) &&
2799 DAG.getNode(ISD::ADD, SDLoc(N1), VT, B, D));
2807 if (ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchUSUBSAT,
2816 if (isOneOrOneSplat(N1)) {
2854 isAllOnesOrAllOnesSplat(N1, /*AllowUndefs=*/true)) {
2862 if (ConstantSDNode *CB = dyn_cast<ConstantSDNode>(N1)) {
2880 SDValue Mul = DAG.getNode(ISD::MUL, SDLoc(N1), VT, A,
2909 SDValue Mul = DAG.getNode(ISD::MUL, SDLoc(N1), VT, A,
2911 SDValue Add = DAG.getNode(ISD::ADD, SDLoc(N1), VT, Mul, B, Flags);
2919 if (SDValue Combined = visitADDLikeCommutative(N0, N1, N))
2922 if (SDValue Combined = visitADDLikeCommutative(N1, N0, N))
2952 SDValue N1 = N->getOperand(1);
2971 DAG.haveNoCommonBitsSet(N0, N1)) {
2974 return DAG.getNode(ISD::OR, DL, VT, N0, N1, Flags);
2978 if (N0.getOpcode() == ISD::VSCALE && N1.getOpcode() == ISD::VSCALE) {
2980 const APInt &C1 = N1->getConstantOperandAPInt(0);
2987 N1.getOpcode() == ISD::VSCALE) {
2989 const APInt &VS1 = N1->getConstantOperandAPInt(0);
2996 N1.getOpcode() == ISD::STEP_VECTOR) {
2998 const APInt &C1 = N1->getConstantOperandAPInt(0);
3006 N1.getOpcode() == ISD::STEP_VECTOR) {
3008 const APInt &SV1 = N1->getConstantOperandAPInt(0);
3020 SDValue N1 = N->getOperand(1);
3026 if (N0.isUndef() || N1.isUndef())
3030 if (SDValue C = DAG.FoldConstantArithmetic(Opcode, DL, VT, {N0, N1}))
3035 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
3036 return DAG.getNode(Opcode, DL, VT, N1, N0);
3044 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
3049 if (isNullConstant(N1))
3053 if (DAG.willNotOverflowAdd(IsSigned, N0, N1))
3054 return DAG.getNode(ISD::ADD, DL, VT, N0, N1);
3111 static SDValue foldAddSubMasked1(bool IsAdd, SDValue N0, SDValue N1,
3113 if (N1.getOpcode() == ISD::ZERO_EXTEND)
3114 N1 = N1.getOperand(0);
3116 if (N1.getOpcode() != ISD::AND || !isOneOrOneSplat(N1->getOperand(1)))
3120 SDValue N10 = N1.getOperand(0);
3135 /// Helper for doing combines based on N0 and N1 being added to each other.
3136 SDValue DAGCombiner::visitADDLikeCommutative(SDValue N0, SDValue N1,
3143 if (sd_match(N1, m_Shl(m_Neg(m_Value(Y)), m_Value(N))))
3147 if (SDValue V = foldAddSubMasked1(true, N0, N1, DAG, DL))
3160 return DAG.getNode(ISD::SUB, DL, VT, N1, Not);
3168 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), N1);
3174 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N1, N0.getOperand(1));
3180 if (N0.getOpcode() == ISD::MUL && N0.getOperand(0) == N1 &&
3195 return DAG.getNode(ISD::SUB, DL, VT, N1, ZExt);
3199 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
3200 VTSDNode *TN = cast<VTSDNode>(N1.getOperand(1));
3202 SDValue ZExt = DAG.getNode(ISD::AND, DL, VT, N1.getOperand(0),
3209 if (N1.getOpcode() == ISD::UADDO_CARRY && isNullConstant(N1.getOperand(1)) &&
3210 N1.getResNo() == 0)
3211 return DAG.getNode(ISD::UADDO_CARRY, DL, N1->getVTList(),
3212 N0, N1.getOperand(0), N1.getOperand(2));
3216 if (SDValue Carry = getAsCarry(TLI, N1))
3226 SDValue N1 = N->getOperand(1);
3232 return CombineTo(N, DAG.getNode(ISD::ADD, DL, VT, N0, N1),
3237 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3239 return DAG.getNode(ISD::ADDC, DL, N->getVTList(), N1, N0);
3242 if (isNullConstant(N1))
3247 if (DAG.computeOverflowForUnsignedAdd(N0, N1) == SelectionDAG::OFK_Never)
3248 return CombineTo(N, DAG.getNode(ISD::ADD, DL, VT, N0, N1),
3298 SDValue N1 = N->getOperand(1);
3307 return CombineTo(N, DAG.getNode(ISD::ADD, DL, VT, N0, N1),
3312 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
3313 return DAG.getNode(N->getOpcode(), DL, N->getVTList(), N1, N0);
3316 if (isNullOrNullSplat(N1))
3320 if (DAG.willNotOverflowAdd(IsSigned, N0, N1))
3321 return CombineTo(N, DAG.getNode(ISD::ADD, DL, VT, N0, N1),
3326 if (isBitwiseNot(N0) && isOneOrOneSplat(N1))
3331 if (isBitwiseNot(N0) && isOneOrOneSplat(N1)) {
3338 if (SDValue Combined = visitUADDOLike(N0, N1, N))
3341 if (SDValue Combined = visitUADDOLike(N1, N0, N))
3348 SDValue DAGCombiner::visitUADDOLike(SDValue N0, SDValue N1, SDNode *N) {
3355 if (N1.getOpcode() == ISD::UADDO_CARRY && isNullConstant(N1.getOperand(1))) {
3356 SDValue Y = N1.getOperand(0);
3360 N1.getOperand(2));
3365 if (SDValue Carry = getAsCarry(TLI, N1))
3374 SDValue N1 = N->getOperand(1);
3379 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3382 N1, N0, CarryIn);
3386 return DAG.getNode(ISD::ADDC, SDLoc(N), N->getVTList(), N0, N1);
3393 SDValue N1 = N->getOperand(1);
3399 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3401 return DAG.getNode(ISD::UADDO_CARRY, DL, N->getVTList(), N1, N0, CarryIn);
3407 return DAG.getNode(ISD::UADDO, DL, N->getVTList(), N0, N1);
3411 if (isNullConstant(N0) && isNullConstant(N1)) {
3421 if (SDValue Combined = visitUADDO_CARRYLike(N0, N1, CarryIn, N))
3424 if (SDValue Combined = visitUADDO_CARRYLike(N1, N0, CarryIn, N))
3432 SDValue Ops[] = {N1, N0, CarryIn};
3557 SDValue N0, SDValue N1, SDNode *N) {
3561 SDValue Carry1 = getAsCarry(TLI, N1);
3628 SDValue DAGCombiner::visitUADDO_CARRYLike(SDValue N0, SDValue N1,
3635 SDValue Sub = DAG.getNode(ISD::USUBO_CARRY, DL, N->getVTList(), N1,
3648 isNullConstant(N1) && !N->hasAnyUseOfValue(1))
3657 if (auto Y = getAsCarry(TLI, N1)) {
3668 SDValue DAGCombiner::visitSADDO_CARRYLike(SDValue N0, SDValue N1,
3673 return DAG.getNode(ISD::SSUBO_CARRY, SDLoc(N), N->getVTList(), N1,
3682 SDValue N1 = N->getOperand(1);
3688 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3690 return DAG.getNode(ISD::SADDO_CARRY, DL, N->getVTList(), N1, N0, CarryIn);
3696 return DAG.getNode(ISD::SADDO, DL, N->getVTList(), N0, N1);
3699 if (SDValue Combined = visitSADDO_CARRYLike(N0, N1, CarryIn, N))
3702 if (SDValue Combined = visitSADDO_CARRYLike(N1, N0, CarryIn, N))
3797 SDValue N1 = N->getOperand(1);
3810 if (PeekThroughFreeze(N0) == PeekThroughFreeze(N1))
3814 if (SDValue C = DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N0, N1}))
3823 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
3831 if (ConstantSDNode *N1C = getAsNonOpaqueConstant(N1))
3840 if (N1->getOpcode() == ISD::SRA || N1->getOpcode() == ISD::SRL) {
3841 ConstantSDNode *ShiftAmt = isConstOrConstSplat(N1.getOperand(1));
3843 auto NewSh = N1->getOpcode() == ISD::SRA ? ISD::SRL : ISD::SRA;
3845 return DAG.getNode(NewSh, DL, VT, N1.getOperand(0), N1.getOperand(1));
3853 if (DAG.MaskedValueIsZero(N1, ~APInt::getSignMask(BitWidth))) {
3854 // N1 is either 0 or the minimum signed value. If the sub is NSW, then
3855 // N1 must be 0 because negating the minimum signed value is undefined.
3860 return N1;
3864 if (N1.getOpcode() == ISD::ABS && N1.hasOneUse() &&
3866 if (SDValue Result = TLI.expandABS(N1.getNode(), DAG, true))
3871 SDValue N1S = DAG.getSplatValue(N1, true);
3880 return DAG.getNode(ISD::XOR, DL, VT, N1, N0);
3883 if (N1.getOpcode() == ISD::SUB && isNullOrNullSplat(N1.getOperand(0)))
3884 return DAG.getNode(ISD::ADD, DL, VT, N0, N1.getOperand(1));
3887 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(0))
3888 return N1.getOperand(1);
3891 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1)
3895 if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
3901 if (SDValue NewC = DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N01, N1}))
3906 if (N1.getOpcode() == ISD::ADD) {
3907 SDValue N11 = N1.getOperand(1);
3909 return DAG.getNode(ISD::SUB, DL, VT, NewC, N1.getOperand(0));
3915 if (SDValue NewC = DAG.FoldConstantArithmetic(ISD::ADD, DL, VT, {N01, N1}))
3922 if (SDValue NewC = DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N00, N1}))
3929 if (sd_match(N0, m_Add(m_Value(A), m_Add(m_Specific(N1), m_Value(C)))))
3933 if (sd_match(N0, m_Add(m_Value(A), m_Sub(m_Specific(N1), m_Value(C)))))
3937 if (sd_match(N0, m_Sub(m_Value(A), m_Sub(m_Value(B), m_Specific(N1)))))
3941 if (sd_match(N1, m_OneUse(m_Sub(m_Value(B), m_Value(C)))))
3946 if (sd_match(N1, m_And(m_Specific(N0), m_Value(B))) &&
3947 (N1.hasOneUse() || isConstantOrConstantVector(B, /*NoOpaques=*/true)))
3951 if (sd_match(N1, m_OneUse(m_Mul(m_Neg(m_Value(B)), m_Value(C)))))
3958 if (N1.isUndef())
3959 return N1;
3971 if (SDValue V = foldAddSubMasked1(false, N0, N1, DAG, DL))
3985 if (TLI.preferIncOfAddToSubOfNot(VT) && N1.hasOneUse() && isBitwiseNot(N1)) {
3986 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0, N1.getOperand(0));
3992 if (!reassociationCanBreakAddressingModePattern(ISD::SUB, DL, N, N0, N1) &&
3995 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
3999 if (N1.getOpcode() == ISD::ADD && N1.hasOneUse() &&
4000 isConstantOrConstantVector(N1.getOperand(1), /*NoOpaques=*/true)) {
4001 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, N1.getOperand(0));
4002 return DAG.getNode(ISD::SUB, DL, VT, Sub, N1.getOperand(1));
4008 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
4014 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(1), N1);
4021 if (N1.getOpcode() == ISD::ZERO_EXTEND &&
4022 N1.getOperand(0).getScalarValueSizeInBits() == 1 &&
4025 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N1.getOperand(0));
4031 sd_match(N1, m_Sra(m_Value(A), m_SpecificInt(BitWidth - 1))) &&
4032 sd_match(N0, m_Xor(m_Specific(A), m_Specific(N1))))
4039 if (GlobalAddressSDNode *GB = dyn_cast<GlobalAddressSDNode>(N1))
4046 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
4047 VTSDNode *TN = cast<VTSDNode>(N1.getOperand(1));
4049 SDValue ZExt = DAG.getNode(ISD::AND, DL, VT, N1.getOperand(0),
4056 if (N1.getOpcode() == ISD::VSCALE && N1.hasOneUse()) {
4057 const APInt &IntVal = N1.getConstantOperandAPInt(0);
4062 if (N1.getOpcode() == ISD::STEP_VECTOR && N1.hasOneUse()) {
4063 APInt NewStep = -N1.getConstantOperandAPInt(0);
4070 if (!LegalOperations && N1.getOpcode() == ISD::SRL && N1.hasOneUse()) {
4071 SDValue ShAmt = N1.getOperand(1);
4074 SDValue SRA = DAG.getNode(ISD::SRA, DL, VT, N1.getOperand(0), ShAmt);
4082 if (N1.getOpcode() == ISD::SHL) {
4083 ConstantSDNode *ShlC = isConstOrConstSplat(N1.getOperand(1));
4085 return DAG.getNode(ISD::ADD, DL, VT, N1, N0);
4092 N0.getOperand(0), N1, N0.getOperand(2));
4097 SDValue X = N1;
4111 const APInt &MaybeOnes = ~DAG.computeKnownBits(N1).Zero;
4113 return DAG.getNode(ISD::XOR, DL, VT, N1, N0);
4120 sd_match(N1, m_SMin(m_Specific(A), m_Specific(B))))
4126 sd_match(N1, m_UMin(m_Specific(A), m_Specific(B))))
4135 SDValue N1 = N->getOperand(1);
4141 if (N0.isUndef() || N1.isUndef())
4145 if (N0 == N1)
4149 if (SDValue C = DAG.FoldConstantArithmetic(Opcode, DL, VT, {N0, N1}))
4158 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
4163 if (isNullConstant(N1))
4167 if (DAG.willNotOverflowSub(IsSigned, N0, N1))
4168 return DAG.getNode(ISD::SUB, DL, VT, N0, N1);
4175 SDValue N1 = N->getOperand(1);
4181 return CombineTo(N, DAG.getNode(ISD::SUB, DL, VT, N0, N1),
4185 if (N0 == N1)
4190 if (isNullConstant(N1))
4195 return CombineTo(N, DAG.getNode(ISD::XOR, DL, VT, N1, N0),
4203 SDValue N1 = N->getOperand(1);
4212 return CombineTo(N, DAG.getNode(ISD::SUB, DL, VT, N0, N1),
4216 if (N0 == N1)
4221 if (ConstantSDNode *N1C = getAsNonOpaqueConstant(N1))
4227 if (isNullOrNullSplat(N1))
4231 if (DAG.willNotOverflowSub(IsSigned, N0, N1))
4232 return CombineTo(N, DAG.getNode(ISD::SUB, DL, VT, N0, N1),
4237 return CombineTo(N, DAG.getNode(ISD::XOR, DL, VT, N1, N0),
4245 SDValue N1 = N->getOperand(1);
4250 return DAG.getNode(ISD::SUBC, SDLoc(N), N->getVTList(), N0, N1);
4257 SDValue N1 = N->getOperand(1);
4264 return DAG.getNode(ISD::USUBO, SDLoc(N), N->getVTList(), N0, N1);
4272 SDValue N1 = N->getOperand(1);
4279 return DAG.getNode(ISD::SSUBO, SDLoc(N), N->getVTList(), N0, N1);
4289 SDValue N1 = N->getOperand(1);
4294 if (N0.isUndef() || N1.isUndef())
4299 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
4300 return DAG.getNode(N->getOpcode(), SDLoc(N), VT, N1, N0, Scale);
4303 if (isNullConstant(N1))
4311 SDValue N1 = N->getOperand(1);
4319 if (N0.isUndef() || N1.isUndef())
4323 if (SDValue C = DAG.FoldConstantArithmetic(ISD::MUL, DL, VT, {N0, N1}))
4328 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
4329 return Matcher.getNode(ISD::MUL, DL, VT, N1, N0);
4342 N1IsConst = ISD::isConstantSplatVector(N1.getNode(), ConstValue1);
4346 N1IsConst = isa<ConstantSDNode>(N1);
4348 ConstValue1 = N1->getAsAPIntVal();
4349 N1IsOpaqueConst = cast<ConstantSDNode>(N1)->isOpaque();
4355 return N1;
4370 if (isConstantOrConstantVector(N1, /*NoOpaques*/ true) &&
4372 if (SDValue LogBase2 = BuildLogBase2(N1, DL)) {
4398 if (SDNode *LoHi = DAG.getNodeIfExists(LoHiOpc, LoHiVT, {N0, N1}))
4401 if (SDNode *LoHi = DAG.getNodeIfExists(LoHiOpc, LoHiVT, {N1, N0}))
4424 TLI.decomposeMulByConstant(*DAG.getContext(), VT, N1)) {
4460 if (SDValue C3 = DAG.FoldConstantArithmetic(ISD::SHL, DL, VT, {N1, N01}))
4472 Sh = N0; Y = N1;
4473 } else if (sd_context_match(N1, Matcher, m_OneUse(m_Opc(ISD::SHL))) &&
4474 isConstantOrConstantVector(N1.getOperand(1))) {
4475 Sh = N1; Y = N0;
4486 DAG.isConstantIntBuildVectorOrConstantInt(N1) &&
4488 isMulAddWithConstProfitable(N, N0, N1))
4491 Matcher.getNode(ISD::MUL, SDLoc(N0), VT, N0.getOperand(0), N1),
4492 Matcher.getNode(ISD::MUL, SDLoc(N1), VT, N0.getOperand(1), N1));
4495 ConstantSDNode *NC1 = isConstOrConstSplat(N1);
4505 ISD::isConstantSplatVector(N1.getNode(), MulVal)) {
4538 ISD::matchUnaryPredicate(N1, IsClearMask, /*AllowUndefs*/ true)) {
4539 assert(N1.getOpcode() == ISD::BUILD_VECTOR && "Unknown constant vector");
4540 EVT LegalSVT = N1.getOperand(0).getValueType();
4554 if (SDValue RMUL = reassociateOps(ISD::MUL, DL, N0, N1, N->getFlags()))
4561 reassociateReduction(ISD::VECREDUCE_MUL, ISD::MUL, DL, VT, N0, N1))
4661 SDValue N1 = N->getOperand(1);
4667 ConstantSDNode *N1C = isConstOrConstSplat(N1);
4674 if (DAG.isUndef(Opc, {N0, N1}))
4690 if (N0 == N1)
4707 SDValue N1 = N->getOperand(1);
4713 if (SDValue C = DAG.FoldConstantArithmetic(ISD::SDIV, DL, VT, {N0, N1}))
4722 ConstantSDNode *N1C = isConstOrConstSplat(N1);
4728 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ),
4740 if (DAG.SignBitIsZero(N1) && DAG.SignBitIsZero(N0))
4741 return DAG.getNode(ISD::UDIV, DL, N1.getValueType(), N0, N1);
4743 if (SDValue V = visitSDIVLike(N0, N1, N)) {
4747 { N0, N1 })) {
4748 SDValue Mul = DAG.getNode(ISD::MUL, DL, VT, V, N1);
4784 SDValue DAGCombiner::visitSDIVLike(SDValue N0, SDValue N1, SDNode *N) {
4794 if (!N->getFlags().hasExact() && isDivisorPowerOfTwo(N1)) {
4802 SDValue C1 = DAG.getNode(ISD::CTTZ, DL, VT, N1);
4825 SDValue IsOne = DAG.getSetCC(DL, CCVT, N1, One, ISD::SETEQ);
4826 SDValue IsAllOnes = DAG.getSetCC(DL, CCVT, N1, AllOnes, ISD::SETEQ);
4836 SDValue IsNeg = DAG.getSetCC(DL, CCVT, N1, Zero, ISD::SETLT);
4845 if (isConstantOrConstantVector(N1) &&
4855 SDValue N1 = N->getOperand(1);
4861 if (SDValue C = DAG.FoldConstantArithmetic(ISD::UDIV, DL, VT, {N0, N1}))
4870 ConstantSDNode *N1C = isConstOrConstSplat(N1);
4872 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ),
4883 if (SDValue V = visitUDIVLike(N0, N1, N)) {
4887 { N0, N1 })) {
4888 SDValue Mul = DAG.getNode(ISD::MUL, DL, VT, V, N1);
4908 SDValue DAGCombiner::visitUDIVLike(SDValue N0, SDValue N1, SDNode *N) {
4913 if (isConstantOrConstantVector(N1, /*NoOpaques*/ true)) {
4914 if (SDValue LogBase2 = BuildLogBase2(N1, DL)) {
4925 if (N1.getOpcode() == ISD::SHL) {
4926 SDValue N10 = N1.getOperand(0);
4931 EVT ADDVT = N1.getOperand(1).getValueType();
4934 SDValue Add = DAG.getNode(ISD::ADD, DL, ADDVT, N1.getOperand(1), Trunc);
4943 if (isConstantOrConstantVector(N1) &&
4951 SDValue DAGCombiner::buildOptimizedSREM(SDValue N0, SDValue N1, SDNode *N) {
4952 if (!N->getFlags().hasExact() && isDivisorPowerOfTwo(N1) &&
4953 !DAG.doesNodeExist(ISD::SDIV, N->getVTList(), {N0, N1})) {
4965 SDValue N1 = N->getOperand(1);
4973 if (SDValue C = DAG.FoldConstantArithmetic(Opcode, DL, VT, {N0, N1}))
4978 if (!isSigned && llvm::isAllOnesOrAllOnesSplat(N1, /*AllowUndefs*/ false) &&
4981 SDValue EqualsNeg1 = DAG.getSetCC(DL, CCVT, F0, N1, ISD::SETEQ);
4994 if (DAG.SignBitIsZero(N1) && DAG.SignBitIsZero(N0))
4995 return DAG.getNode(ISD::UREM, DL, VT, N0, N1);
4997 if (DAG.isKnownToBeAPowerOfTwo(N1)) {
5000 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N1, NegOne);
5008 if ((N1.getOpcode() == ISD::SHL || N1.getOpcode() == ISD::SRL) &&
5009 DAG.isKnownToBeAPowerOfTwo(N1.getOperand(0))) {
5011 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N1, NegOne);
5026 if (DAG.isKnownNeverZero(N1) && !TLI.isIntDivCheap(VT, Attr)) {
5029 if (SDValue OptimizedRem = buildOptimizedSREM(N0, N1, N))
5034 isSigned ? visitSDIVLike(N0, N1, N) : visitUDIVLike(N0, N1, N);
5039 { N0, N1 }))
5041 SDValue Mul = DAG.getNode(ISD::MUL, DL, VT, OptimizedDiv, N1);
5058 SDValue N1 = N->getOperand(1);
5063 if (SDValue C = DAG.FoldConstantArithmetic(ISD::MULHS, DL, VT, {N0, N1}))
5068 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
5069 return DAG.getNode(ISD::MULHS, DL, N->getVTList(), N1, N0);
5076 // do not return N1, because undef node may exist.
5077 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
5082 if (isNullConstant(N1))
5083 return N1;
5086 if (isOneConstant(N1))
5092 if (N0.isUndef() || N1.isUndef())
5104 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1);
5105 N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1);
5106 N1 = DAG.getNode(ISD::SRL, DL, NewVT, N1,
5108 return DAG.getNode(ISD::TRUNCATE, DL, VT, N1);
5117 SDValue N1 = N->getOperand(1);
5122 if (SDValue C = DAG.FoldConstantArithmetic(ISD::MULHU, DL, VT, {N0, N1}))
5127 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
5128 return DAG.getNode(ISD::MULHU, DL, N->getVTList(), N1, N0);
5135 // do not return N1, because undef node may exist.
5136 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
5141 if (isNullConstant(N1))
5142 return N1;
5145 if (isOneConstant(N1))
5149 if (N0.isUndef() || N1.isUndef())
5153 if (isConstantOrConstantVector(N1, /*NoOpaques*/ true) &&
5155 if (SDValue LogBase2 = BuildLogBase2(N1, DL)) {
5174 N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N1);
5175 N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1);
5176 N1 = DAG.getNode(ISD::SRL, DL, NewVT, N1,
5178 return DAG.getNode(ISD::TRUNCATE, DL, VT, N1);
5194 SDValue N1 = N->getOperand(1);
5200 if (SDValue C = DAG.FoldConstantArithmetic(Opcode, DL, VT, {N0, N1}))
5205 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
5206 return DAG.getNode(Opcode, DL, N->getVTList(), N1, N0);
5214 return N1;
5215 if (N1.isUndef())
5219 if (N0 == N1 && Level >= AfterLegalizeTypes)
5253 if (DAG.isKnownNeverZero(N1))
5256 DAG.getNode(ISD::ADD, DL, VT, N1, DAG.getAllOnesConstant(DL, VT)));
5259 ISD::AVGCEILU, DL, VT, N1,
5269 SDValue N1 = N->getOperand(1);
5274 if (SDValue C = DAG.FoldConstantArithmetic(Opcode, DL, VT, {N0, N1}))
5279 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
5280 return DAG.getNode(Opcode, DL, N->getVTList(), N1, N0);
5287 if (N0.isUndef() || N1.isUndef())
5303 DAG.SignBitIsZero(N0) && DAG.SignBitIsZero(N1))
5304 return DAG.getNode(ISD::ABDU, DL, VT, N1, N0);
5363 SDValue N1 = N->getOperand(1);
5368 if (isa<ConstantSDNode>(N0) && isa<ConstantSDNode>(N1))
5369 return DAG.getNode(ISD::SMUL_LOHI, DL, N->getVTList(), N0, N1);
5373 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
5374 return DAG.getNode(ISD::SMUL_LOHI, DL, N->getVTList(), N1, N0);
5384 SDValue Hi = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1);
5386 // Compute the high part as N1.
5404 SDValue N1 = N->getOperand(1);
5409 if (isa<ConstantSDNode>(N0) && isa<ConstantSDNode>(N1))
5410 return DAG.getNode(ISD::UMUL_LOHI, DL, N->getVTList(), N0, N1);
5414 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
5415 return DAG.getNode(ISD::UMUL_LOHI, DL, N->getVTList(), N1, N0);
5418 if (isNullConstant(N1)) {
5424 if (isOneConstant(N1)) {
5437 SDValue Hi = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N1);
5439 // Compute the high part as N1.
5454 SDValue N1 = N->getOperand(1);
5462 ConstantSDNode *N1C = isConstOrConstSplat(N1);
5478 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
5479 return DAG.getNode(N->getOpcode(), DL, N->getVTList(), N1, N0);
5482 if (isNullOrNullSplat(N1))
5495 SDValue And = DAG.getNode(ISD::AND, DL, VT, N0, N1);
5502 if (DAG.willNotOverflowMul(IsSigned, N0, N1))
5503 return CombineTo(N, DAG.getNode(ISD::MUL, DL, VT, N0, N1),
5513 // same as SimplifySelectCC. N0<N1 ? N2 : N3.
5514 static SDValue isSaturatingMinMax(SDValue N0, SDValue N1, SDValue N2,
5517 auto isSignedMinMax = [&](SDValue N0, SDValue N1, SDValue N2, SDValue N3,
5524 ConstantSDNode *N1C = isConstOrConstSplat(peekThroughTruncates(N1));
5528 const APInt &C1 = N1C->getAPIntValue().trunc(N1.getScalarValueSizeInBits());
5536 unsigned Opcode0 = isSignedMinMax(N0, N1, N2, N3, CC);
5594 ConstantSDNode *MinCOp = isConstOrConstSplat(Opcode0 == ISD::SMIN ? N1 : N01);
5595 ConstantSDNode *MaxCOp = isConstOrConstSplat(Opcode0 == ISD::SMIN ? N01 : N1);
5617 static SDValue PerformMinMaxFpToSatCombine(SDValue N0, SDValue N1, SDValue N2,
5622 SDValue Fp = isSaturatingMinMax(N0, N1, N2, N3, CC, BW, Unsigned, DAG);
5639 static SDValue PerformUMinFpToSatCombine(SDValue N0, SDValue N1, SDValue N2,
5644 // be truncated versions of the setcc (N0/N1).
5649 ConstantSDNode *N1C = isConstOrConstSplat(N1);
5677 SDValue N1 = N->getOperand(1);
5683 if (SDValue C = DAG.FoldConstantArithmetic(Opcode, DL, VT, {N0, N1}))
5687 if (N0 == N1)
5692 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
5693 return DAG.getNode(Opcode, DL, VT, N1, N0);
5701 if (SDValue RMINMAX = reassociateOps(Opcode, DL, N0, N1, N->getFlags()))
5711 (N1.isUndef() || DAG.SignBitIsZero(N1))) {
5721 return DAG.getNode(AltOpcode, DL, VT, N0, N1);
5726 N0, N1, N0, N1, Opcode == ISD::SMIN ? ISD::SETLT : ISD::SETGT, DAG))
5729 if (SDValue S = PerformUMinFpToSatCombine(N0, N1, N0, N1, ISD::SETULT, DAG))
5748 SDLoc(N), VT, N0, N1))
5761 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
5766 assert(HandOpcode == N1.getOpcode() && "Bad input!");
5777 SDValue Y = N1.getOperand(0);
5782 N0.getOperand(1) == N1.getOperand(1))) {
5785 if (!N0.hasOneUse() && !N1.hasOneUse())
5812 if (!N0.hasOneUse() && !N1.hasOneUse())
5834 N0.getOperand(1) == N1.getOperand(1)) {
5836 if (!N0.hasOneUse() || !N1.hasOneUse())
5845 if (!N0.hasOneUse() || !N1.hasOneUse())
5855 N0.getOperand(2) == N1.getOperand(2)) {
5856 if (!N0.hasOneUse() || !N1.hasOneUse())
5859 SDValue Y1 = N1.getOperand(1);
5898 auto *SVN1 = cast<ShuffleVectorSDNode>(N1);
5917 if (N0.getOperand(1) == N1.getOperand(1) && ShOp.getNode()) {
5919 N0.getOperand(0), N1.getOperand(0));
5930 if (N0.getOperand(0) == N1.getOperand(0) && ShOp.getNode()) {
5932 N1.getOperand(1));
5941 SDValue DAGCombiner::foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1,
5945 !isSetCCEquivalent(N1, RL, RR, N1CC))
5948 assert(N0.getValueType() == N1.getValueType() &&
6027 N0.hasOneUse() && N1.hasOneUse()) {
6032 SDValue XorR = DAG.getNode(ISD::XOR, SDLoc(N1), OpVT, RL, RR);
6366 SDValue DAGCombiner::visitANDLike(SDValue N0, SDValue N1, SDNode *N) {
6367 EVT VT = N1.getValueType();
6371 if (N0.isUndef() || N1.isUndef())
6374 if (SDValue V = foldLogicOfSetCCs(true, N0, N1, DL))
6379 if (N1.getOpcode() == ISD::ADD)
6380 std::swap(N0, N1);
6383 if (N0.getOpcode() == ISD::ADD && N1.getOpcode() == ISD::SRL &&
6386 if (ConstantSDNode *SRLI = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
6713 SDValue N1 = N->getOperand(1);
6740 if (matchMask(N1))
6743 X = N1;
6941 SDValue N1 = N->getOperand(1);
6942 EVT VT = N1.getValueType();
6946 if (N0 == N1)
6950 if (SDValue C = DAG.FoldConstantArithmetic(ISD::AND, DL, VT, {N0, N1}))
6955 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
6956 return DAG.getNode(ISD::AND, DL, VT, N1, N0);
6958 if (areBitwiseNotOfEachother(N0, N1))
6967 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
6968 // do not return N1, because undef node may exist in N1
6969 return DAG.getConstant(APInt::getZero(N1.getScalarValueSizeInBits()), DL,
6970 N1.getValueType());
6973 if (ISD::isConstantSplatVectorAllOnes(N1.getNode()))
6978 ConstantSDNode *Splat = isConstOrConstSplat(N1, true, true);
6980 N1.hasOneUse()) {
7006 if (isAllOnesConstant(N1))
7011 ConstantSDNode *N1C = isConstOrConstSplat(N1);
7022 if (SDValue RAND = reassociateOps(ISD::AND, DL, N0, N1, N->getFlags()))
7027 reassociateReduction(ISD::VECREDUCE_AND, ISD::AND, DL, VT, N0, N1))
7035 ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchSubset))
7036 return N1;
7056 DAG.getZExtOrTrunc(N1, DL, SrcVT)));
7065 DAG.isConstantIntBuildVectorOrConstantInt(N1) &&
7069 DAG.getNode(ISD::AND, DL, VT, N1,
7096 N1, /*AllowUndef=*/false, /*AllowTruncation=*/true)) {
7098 } else if (BuildVectorSDNode *Vector = dyn_cast<BuildVectorSDNode>(N1)) {
7184 if (SDValue Combined = combineCarryDiamond(DAG, TLI, N0, N1, N))
7212 isConstantSplatVectorMaskForType(N1.getNode(), ScalarVT) &&
7243 if (SDValue Combined = visitANDLike(N0, N1, N))
7247 if (N0.getOpcode() == N1.getOpcode())
7251 if (SDValue R = foldLogicOfShifts(N, N0, N1, DAG))
7253 if (SDValue R = foldLogicOfShifts(N, N1, N0, DAG))
7289 unsigned ExtBitSize = N1.getScalarValueSizeInBits();
7292 if (DAG.MaskedValueIsZero(N1, ExtBits) &&
7339 if (IsAndZeroExtMask(N0, N1))
7349 if (SDValue R = foldLogicTreeOfShifts(N, N0, N1, DAG))
7356 SDValue DAGCombiner::MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
7371 std::swap(N0, N1);
7372 if (N1.getOpcode() == ISD::AND && N1.getOperand(0).getOpcode() == ISD::SHL)
7373 std::swap(N0, N1);
7387 if (N1.getOpcode() == ISD::AND) {
7388 if (!N1->hasOneUse())
7390 ConstantSDNode *N11C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
7393 N1 = N1.getOperand(0);
7397 if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL)
7398 std::swap(N0, N1);
7399 if (N0.getOpcode() != ISD::SHL || N1.getOpcode() != ISD::SRL)
7401 if (!N0->hasOneUse() || !N1->hasOneUse())
7405 ConstantSDNode *N11C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
7423 SDValue N10 = N1->getOperand(0);
7584 SDValue N1, EVT VT) {
7589 if (N0.getOpcode() != ISD::AND || N1.getOpcode() != ISD::AND)
7592 if (!N0->hasOneUse() || !N1->hasOneUse())
7595 ConstantSDNode *Mask1 = isConstOrConstSplat(N1.getOperand(1));
7602 SDValue Shift1 = N1.getOperand(0);
7626 SDValue DAGCombiner::MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1) {
7636 if (SDValue BSwap = matchBSwapHWordOrAndAnd(TLI, DAG, N, N0, N1, VT))
7640 if (SDValue BSwap = matchBSwapHWordOrAndAnd(TLI, DAG, N, N1, N0, VT))
7652 if (!isBSwapHWordPair(N1, Parts))
7656 if (!isBSwapHWordElement(N1, Parts))
7689 SDValue DAGCombiner::visitORLike(SDValue N0, SDValue N1, const SDLoc &DL) {
7690 EVT VT = N1.getValueType();
7693 if (!LegalOperations && (N0.isUndef() || N1.isUndef()))
7696 if (SDValue V = foldLogicOfSetCCs(false, N0, N1, DL))
7700 if (N0.getOpcode() == ISD::AND && N1.getOpcode() == ISD::AND &&
7702 (N0->hasOneUse() || N1->hasOneUse())) {
7708 getAsNonOpaqueConstant(N1.getOperand(1))) {
7715 DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) {
7717 N0.getOperand(0), N1.getOperand(0));
7727 N1.getOpcode() == ISD::AND &&
7728 N0.getOperand(0) == N1.getOperand(0) &&
7730 (N0->hasOneUse() || N1->hasOneUse())) {
7732 N0.getOperand(1), N1.getOperand(1));
7740 static SDValue visitORCommutative(SelectionDAG &DAG, SDValue N0, SDValue N1,
7754 SDValue N1Resized = peekThroughResize(N1);
7760 return N1;
7768 N1);
7776 N1);
7782 // fold or (xor X, N1), N1 --> or X, N1
7783 if (sd_match(N0, m_Xor(m_Value(X), m_Specific(N1))))
7784 return DAG.getNode(ISD::OR, DL, VT, X, N1);
7788 (sd_match(N1, m_And(m_Specific(X), m_Specific(Y))) ||
7789 sd_match(N1, m_Or(m_Specific(X), m_Specific(Y)))))
7792 if (SDValue R = foldLogicOfShifts(N, N0, N1, DAG))
7802 if (N0.getOpcode() == ISD::FSHL && N1.getOpcode() == ISD::SHL &&
7803 N0.getOperand(0) == N1.getOperand(0) &&
7804 peekThroughZext(N0.getOperand(2)) == peekThroughZext(N1.getOperand(1)))
7808 if (N0.getOpcode() == ISD::FSHR && N1.getOpcode() == ISD::SRL &&
7809 N0.getOperand(1) == N1.getOperand(0) &&
7810 peekThroughZext(N0.getOperand(2)) == peekThroughZext(N1.getOperand(1)))
7818 sd_match(N1, m_ZExt(m_Value(Lo))) &&
7838 SDValue N1 = N->getOperand(1);
7839 EVT VT = N1.getValueType();
7843 if (N0 == N1)
7847 if (SDValue C = DAG.FoldConstantArithmetic(ISD::OR, DL, VT, {N0, N1}))
7852 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
7853 return DAG.getNode(ISD::OR, DL, VT, N1, N0);
7861 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
7865 if (ISD::isConstantSplatVectorAllOnes(N1.getNode()))
7866 // do not return N1, because undef node may exist in N1
7867 return DAG.getAllOnesConstant(DL, N1.getValueType());
7872 auto *SV1 = dyn_cast<ShuffleVectorSDNode>(N1);
7876 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode());
7877 bool ZeroN11 = ISD::isBuildVectorAllZeros(N1.getOperand(1).getNode());
7916 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0);
7927 if (isNullConstant(N1))
7931 if (isAllOnesConstant(N1))
7932 return N1;
7938 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
7940 return N1;
7945 if (SDValue Combined = visitORLike(N0, N1, DL))
7948 if (SDValue Combined = combineCarryDiamond(DAG, TLI, N0, N1, N))
7952 if (SDValue BSwap = MatchBSwapHWord(N, N0, N1))
7954 if (SDValue BSwap = MatchBSwapHWordLow(N, N0, N1))
7958 if (SDValue ROR = reassociateOps(ISD::OR, DL, N0, N1, N->getFlags()))
7963 reassociateReduction(ISD::VECREDUCE_OR, ISD::OR, DL, VT, N0, N1))
7972 ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchIntersect, true)) {
7973 if (SDValue COR = DAG.FoldConstantArithmetic(ISD::OR, SDLoc(N1), VT,
7974 {N1, N0.getOperand(1)})) {
7975 SDValue IOR = DAG.getNode(ISD::OR, SDLoc(N0), VT, N0.getOperand(0), N1);
7981 if (SDValue Combined = visitORCommutative(DAG, N0, N1, N))
7983 if (SDValue Combined = visitORCommutative(DAG, N1, N0, N))
7987 if (N0.getOpcode() == N1.getOpcode())
7992 if (SDValue Rot = MatchRotate(N0, N1, DL))
8011 if (SDValue R = foldLogicTreeOfShifts(N, N0, N1, DAG))
8324 // shifts of N0 + N1. If Neg == <operand size> - Pos then the OR reduces
8325 // to both (PosOpcode N0, N1, Pos) and (NegOpcode N0, N1, Neg), with the
8329 SDValue DAGCombiner::MatchFunnelPosNeg(SDValue N0, SDValue N1, SDValue Pos,
8344 if (matchRotateSub(InnerPos, InnerNeg, EltBits, DAG, /*IsRotate*/ N0 == N1)) {
8345 return DAG.getNode(HasPos ? PosOpcode : NegOpcode, DL, VT, N0, N1,
8362 if (IsBinOpImm(N1, ISD::SRL, 1) &&
8366 return DAG.getNode(ISD::FSHL, DL, VT, N0, N1.getOperand(0), Pos);
8375 return DAG.getNode(ISD::FSHR, DL, VT, N0.getOperand(0), N1, Neg);
8385 return DAG.getNode(ISD::FSHR, DL, VT, N0.getOperand(0), N1, Neg);
9337 SDValue N1 = N->getOperand(1);
9338 if (!matchAndXor(N0, 0, N1) && !matchAndXor(N0, 1, N1) &&
9339 !matchAndXor(N1, 0, N0) && !matchAndXor(N1, 1, N0))
9388 SDValue N1 = N->getOperand(1);
9393 if (N0.isUndef() && N1.isUndef())
9399 if (N1.isUndef())
9400 return N1;
9403 if (SDValue C = DAG.FoldConstantArithmetic(ISD::XOR, DL, VT, {N0, N1}))
9408 !DAG.isConstantIntBuildVectorOrConstantInt(N1))
9409 return DAG.getNode(ISD::XOR, DL, VT, N1, N0);
9417 if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
9422 if (isNullConstant(N1))
9429 if (SDValue RXOR = reassociateOps(ISD::XOR, DL, N0, N1, N->getFlags()))
9434 reassociateReduction(ISD::VECREDUCE_XOR, ISD::XOR, DL, VT, N0, N1))
9439 DAG.haveNoCommonBitsSet(N0, N1)) {
9442 return DAG.getNode(ISD::OR, DL, VT, N0, N1, Flags);
9448 isMinSignedConstant(N1))
9455 if (TLI.isConstTrueVal(N1) &&
9489 if (isOneConstant(N1) && N0Opcode == ISD::ZERO_EXTEND && N0.hasOneUse() &&
9500 if (isOneConstant(N1) && VT == MVT::i1 && N0.hasOneUse() &&
9505 N00 = DAG.getNode(ISD::XOR, SDLoc(N00), VT, N00, N1); // N00 = ~N00
9506 N01 = DAG.getNode(ISD::XOR, SDLoc(N01), VT, N01, N1); // N01 = ~N01
9512 if (isAllOnesConstant(N1) && N0.hasOneUse() &&
9517 N00 = DAG.getNode(ISD::XOR, SDLoc(N00), VT, N00, N1); // N00 = ~N00
9518 N01 = DAG.getNode(ISD::XOR, SDLoc(N01), VT, N01, N1); // N01 = ~N01
9527 if (isAllOnesConstant(N1) && N0.getOpcode() == ISD::SUB &&
9534 if (isAllOnesConstant(N1) && N0.getOpcode() == ISD::ADD &&
9540 if (N0Opcode == ISD::AND && N0.hasOneUse() && N0->getOperand(1) == N1) {
9544 return DAG.getNode(ISD::AND, DL, VT, NotX, N1);
9549 SDValue A = N0Opcode == ISD::ADD ? N0 : N1;
9550 SDValue S = N0Opcode == ISD::SRA ? N0 : N1;
9562 if (N0 == N1)
9584 isAllOnesConstant(N1) && isOneConstant(N0.getOperand(0))) {
9590 if (N0Opcode == N1.getOpcode())
9594 if (SDValue R = foldLogicOfShifts(N, N0, N1, DAG))
9596 if (SDValue R = foldLogicOfShifts(N, N1, N0, DAG))
9598 if (SDValue R = foldLogicTreeOfShifts(N, N0, N1, DAG))
9609 if (SDValue Combined = combineCarryDiamond(DAG, TLI, N0, N1, N))
9784 SDValue N1 = N->getOperand(1);
9789 if (isNullOrNullSplat(N1))
9794 APInt ModuloMask(N1.getScalarValueSizeInBits(), Bitsize - 1);
9795 if (DAG.MaskedValueIsZero(N1, ModuloMask))
9805 if (ISD::matchUnaryPredicate(N1, MatchOutOfRange) && OutOfRange) {
9806 EVT AmtVT = N1.getValueType();
9809 DAG.FoldConstantArithmetic(ISD::UREM, dl, AmtVT, {N1, Bits}))
9814 auto *RotAmtC = isConstOrConstSplat(N1);
9824 if (N1.getOpcode() == ISD::TRUNCATE &&
9825 N1.getOperand(0).getOpcode() == ISD::AND) {
9826 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode()))
9835 SDNode *C1 = DAG.isConstantIntBuildVectorOrConstantInt(N1);
9843 {N1, BitsizeC});
9863 SDValue N1 = N->getOperand(1);
9864 if (SDValue V = DAG.simplifyShift(N0, N1))
9869 EVT ShiftVT = N1.getValueType();
9873 if (SDValue C = DAG.FoldConstantArithmetic(ISD::SHL, DL, VT, {N0, N1}))
9881 BuildVectorSDNode *N1CV = dyn_cast<BuildVectorSDNode>(N1);
9894 DAG.FoldConstantArithmetic(ISD::SHL, DL, VT, {N01, N1}))
9909 if (N1.getOpcode() == ISD::TRUNCATE &&
9910 N1.getOperand(0).getOpcode() == ISD::AND) {
9911 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode()))
9924 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchOutOfRange))
9934 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchInRange)) {
9935 SDValue Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, N1, N0.getOperand(1));
9962 if (ISD::matchBinaryPredicate(InnerShiftAmt, N1, MatchOutOfRange,
9975 if (ISD::matchBinaryPredicate(InnerShiftAmt, N1, MatchInRange,
9980 Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, Sum, N1);
9999 if (ISD::matchBinaryPredicate(InnerShiftAmt, N1, MatchEqual,
10003 SDValue NewSHL = DAG.getZExtOrTrunc(N1, DL, InnerShiftAmtVT);
10022 if (ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchShiftAmount,
10026 SDValue Diff = DAG.getNode(ISD::SUB, DL, ShiftVT, N1, N01);
10029 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchShiftAmount,
10033 SDValue Diff = DAG.getNode(ISD::SUB, DL, ShiftVT, N01, N1);
10043 (N0.getOperand(1) == N1 || N0.hasOneUse()) &&
10045 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchShiftAmount,
10049 SDValue Diff = DAG.getNode(ISD::SUB, DL, ShiftVT, N01, N1);
10056 if (ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchShiftAmount,
10060 SDValue Diff = DAG.getNode(ISD::SUB, DL, ShiftVT, N1, N01);
10062 Mask = DAG.getNode(ISD::SHL, DL, VT, Mask, N1);
10070 if (N0.getOpcode() == ISD::SRA && N1 == N0.getOperand(1) &&
10071 isConstantOrConstantVector(N1, /* No Opaques */ true)) {
10073 SDValue HiBitsMask = DAG.getNode(ISD::SHL, DL, VT, AllBits, N1);
10085 DAG.FoldConstantArithmetic(ISD::SHL, SDLoc(N1), VT, {N01, N1})) {
10086 SDValue Shl0 = DAG.getNode(ISD::SHL, SDLoc(N0), VT, N0.getOperand(0), N1);
10109 DAG.FoldConstantArithmetic(ISD::SHL, DL, VT, {ExtC, N1})) {
10111 SDValue ShlX = DAG.getNode(ISD::SHL, DL, VT, ExtX, N1);
10121 DAG.FoldConstantArithmetic(ISD::SHL, SDLoc(N1), VT, {N01, N1}))
10125 ConstantSDNode *N1C = isConstOrConstSplat(N1);
10132 if (((N1.getOpcode() == ISD::CTTZ &&
10134 N1.getOpcode() == ISD::CTTZ_ZERO_UNDEF) &&
10135 N1.hasOneUse() && !TLI.isOperationLegalOrCustom(ISD::CTTZ, ShiftVT) &&
10137 SDValue Y = N1.getOperand(0);
10158 ISD::isConstantSplatVector(N1.getNode(), ShlVal)) {
10321 SDValue N1 = N->getOperand(1);
10322 if (SDValue V = DAG.simplifyShift(N0, N1))
10330 if (SDValue C = DAG.FoldConstantArithmetic(ISD::SRA, DL, VT, {N0, N1}))
10347 ConstantSDNode *N1C = isConstOrConstSplat(N1);
10352 EVT ShiftVT = N1.getValueType();
10366 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), SumOfShifts)) {
10368 if (N1.getOpcode() == ISD::BUILD_VECTOR)
10370 else if (N1.getOpcode() == ISD::SPLAT_VECTOR) {
10428 if (Shl.getOpcode() == ISD::SHL && Shl.getOperand(1) == N1 &&
10464 if (N1.getOpcode() == ISD::TRUNCATE &&
10465 N1.getOperand(0).getOpcode() == ISD::AND) {
10466 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode()))
10485 SDValue Amt = DAG.getZExtOrTrunc(N1, DL, LargeShiftVT);
10501 return DAG.getNode(ISD::SRL, DL, VT, N0, N1);
10521 SDValue N1 = N->getOperand(1);
10522 if (SDValue V = DAG.simplifyShift(N0, N1))
10527 EVT ShiftVT = N1.getValueType();
10531 if (SDValue C = DAG.FoldConstantArithmetic(ISD::SRL, DL, VT, {N0, N1}))
10543 ConstantSDNode *N1C = isConstOrConstSplat(N1);
10557 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchOutOfRange))
10567 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchInRange)) {
10568 SDValue Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, N1, N0.getOperand(1));
10612 (N0.getOperand(1) == N1 || N0->hasOneUse()) &&
10621 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchShiftAmount,
10625 SDValue Diff = DAG.getNode(ISD::SUB, DL, ShiftVT, N01, N1);
10632 if (ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchShiftAmount,
10636 SDValue Diff = DAG.getNode(ISD::SUB, DL, ShiftVT, N1, N01);
10638 Mask = DAG.getNode(ISD::SRL, DL, VT, Mask, N1);
10671 return DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0), N1);
10710 if (N1.getOpcode() == ISD::TRUNCATE &&
10711 N1.getOperand(0).getOpcode() == ISD::AND) {
10712 if (SDValue NewOp1 = distributeTruncateThroughAnd(N1.getNode()))
10776 SDValue N1 = N->getOperand(1);
10782 // fold (fshl N0, N1, 0) -> N0
10783 // fold (fshr N0, N1, 0) -> N1
10787 return IsFSHL ? N0 : N1;
10797 // fold (fsh* N0, N1, c) -> (fsh* N0, N1, c % BitWidth)
10800 return DAG.getNode(N->getOpcode(), DL, VT, N0, N1,
10806 return IsFSHL ? N0 : N1;
10808 // fold fshl(undef_or_zero, N1, C) -> lshr(N1, BW-C)
10809 // fold fshr(undef_or_zero, N1, C) -> lshr(N1, C)
10814 ISD::SRL, DL, VT, N1,
10816 if (IsUndefOrZero(N1))
10829 auto *RHS = dyn_cast<LoadSDNode>(N1);
10853 DAG.ReplaceAllUsesOfValueWith(N1.getValue(1), Load.getValue(1));
10861 // fold fshr(undef_or_zero, N1, N2) -> lshr(N1, N2)
10868 return DAG.getNode(ISD::SRL, DL, VT, N1, N2);
10869 if (IsUndefOrZero(N1) && IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits))
10879 if (N0 == N1 && hasOperation(RotOpc, VT))
10882 // Simplify, based on bits shifted out of N0/N1.
10891 SDValue N1 = N->getOperand(1);
10892 if (SDValue V = DAG.simplifyShift(N0, N1))
10899 if (SDValue C = DAG.FoldConstantArithmetic(N->getOpcode(), DL, VT, {N0, N1}))
10902 ConstantSDNode *N1C = isConstOrConstSplat(N1);
10908 return DAG.getNode(ISD::SHL, DL, VT, N0, N1);
10914 return DAG.getNode(ISD::SHL, DL, VT, N0, N1);
11379 SDValue N1 = N->getOperand(1);
11388 auto *C1 = dyn_cast<ConstantSDNode>(N1);
11487 return DAG.getNode(ISD::OR, DL, VT, NotCond, N1);
11540 SDValue N1 = N->getOperand(1);
11556 std::swap(N1, N2);
11560 // (Cond0 s< 0) ? N1 : 0 --> (Cond0 s>> BW-1) & freeze(N1)
11565 return DAG.getNode(ISD::AND, DL, VT, Sra, DAG.getFreeze(N1));
11569 if (isAllOnesOrAllOnesSplat(N1)) {
11580 if (isNullOrNullSplat(N1) && TLI.hasAndNot(N1)) {
11597 SDValue N1 = N->getOperand(1);
11604 if (SDValue V = DAG.simplifySelect(N0, N1, N2))
11610 // select (not Cond), N1, N2 -> select Cond, N2, N1
11612 SDValue SelectOp = DAG.getSelect(DL, VT, F, N2, N1);
11621 if (SimplifySelectOps(N, N1, N2))
11641 DAG.getNode(ISD::SELECT, DL, N1.getValueType(), Cond1, N1, N2, Flags);
11643 return DAG.getNode(ISD::SELECT, DL, N1.getValueType(), Cond0,
11653 SDValue InnerSelect = DAG.getNode(ISD::SELECT, DL, N1.getValueType(),
11654 Cond1, N1, N2, Flags);
11656 return DAG.getNode(ISD::SELECT, DL, N1.getValueType(), Cond0, N1,
11664 if (N1->getOpcode() == ISD::SELECT && N1->hasOneUse()) {
11665 SDValue N1_0 = N1->getOperand(0);
11666 SDValue N1_1 = N1->getOperand(1);
11667 SDValue N1_2 = N1->getOperand(2);
11672 return DAG.getNode(ISD::SELECT, DL, N1.getValueType(), And, N1_1,
11677 return DAG.getNode(ISD::SELECT, DL, N1.getValueType(), Combined, N1_1,
11687 if (N2_1 == N1 && N0.getValueType() == N2_0.getValueType()) {
11691 return DAG.getNode(ISD::SELECT, DL, N1.getValueType(), Or, N1,
11696 return DAG.getNode(ISD::SELECT, DL, N1.getValueType(), Combined, N1,
11711 if (N0.hasOneUse() && isLegalToCombineMinNumMaxNum(DAG, N1, N2, Flags, TLI))
11713 combineMinNumMaxNum(DL, VT, Cond0, Cond1, N1, N2, CC))
11722 CC == ISD::SETUGT && N0.hasOneUse() && isAllOnesConstant(N1) &&
11741 return DAG.getSelect(DL, VT, UAO.getValue(1), N1, UAO.getValue(0));
11751 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, VT, Cond0, Cond1, N1,
11757 if (SDValue NewSel = SimplifySelect(DL, N0, N1, N2))
11765 if (SDValue R = combineSelectAsExtAnd(N0, N1, N2, DL, DAG))
12209 SDValue N1 = N->getOperand(1);
12214 !ISD::isBuildVectorOfConstantSDNodes(N1.getNode()) ||
12225 SDValue N1Elt = N1.getOperand(i);
12256 if (ISD::isConstantSplatVector(N1.getNode(), Pow2C) && Pow2C.isPowerOf2() &&
12275 SDValue N1 = N->getOperand(1);
12279 if (SDValue V = DAG.simplifySelect(N0, N1, N2))
12290 SDValue N1 = N->getOperand(1);
12295 if (SDValue V = DAG.simplifySelect(N0, N1, N2))
12301 // vselect (not Cond), N1, N2 -> vselect Cond, N2, N1
12303 return DAG.getSelect(DL, VT, F, N2, N1);
12306 if (N1.getOpcode() == ISD::ADD && N1.getOperand(0) == N2 && N1->hasOneUse() &&
12307 DAG.isConstantIntBuildVectorOrConstantInt(N1.getOperand(1)) &&
12308 N0.getScalarValueSizeInBits() == N1.getScalarValueSizeInBits() &&
12312 ISD::ADD, DL, N1.getValueType(), N2,
12313 DAG.getNode(ISD::AND, DL, N0.getValueType(), N1.getOperand(1), N0));
12329 N1 == LHS && N2.getOpcode() == ISD::SUB && N1 == N2.getOperand(1))
12332 N2 == LHS && N1.getOpcode() == ISD::SUB && N2 == N1.getOperand(1))
12333 isAbs = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode());
12356 if (SDValue FMinMax = combineMinNumMaxNum(DL, VT, LHS, RHS, N1, N2, CC))
12360 if (SDValue S = PerformMinMaxFpToSatCombine(LHS, RHS, N1, N2, CC, DAG))
12362 if (SDValue S = PerformUMinFpToSatCombine(LHS, RHS, N1, N2, CC, DAG))
12372 EVT WideVT = N1.getValueType().changeVectorElementTypeToInteger();
12384 // vselect (ext (setcc load(X), C)), N1, N2 -->
12385 // vselect (setcc extload(X), C'), N1, N2
12391 return DAG.getSelect(DL, N1.getValueType(), WideSetCC, N1, N2);
12400 if (N1.getOpcode() == ISD::SUB && N2.getOpcode() == ISD::SUB &&
12401 N1.getOperand(0) == N2.getOperand(1) &&
12402 N1.getOperand(1) == N2.getOperand(0)) {
12411 if (LHS == N1.getOperand(0) && RHS == N1.getOperand(1))
12418 if (RHS == N1.getOperand(0) && LHS == N1.getOperand(1) )
12433 if (ISD::isConstantSplatVectorAllOnes(N1.getNode())) {
12437 Other = N1;
12480 if (ISD::isConstantSplatVectorAllZeros(N1.getNode())) {
12484 Other = N1;
12555 if (SimplifySelectOps(N, N1, N2))
12558 // Fold (vselect all_ones, N1, N2) -> N1
12560 return N1;
12561 // Fold (vselect all_zeros, N1, N2) -> N2
12568 if (N1.getOpcode() == ISD::CONCAT_VECTORS &&
12590 SDValue N1 = N->getOperand(1);
12603 isNullConstant(N1))
12607 if (SDValue SCC = SimplifySetCC(getSetCCResultType(N0.getValueType()), N0, N1,
12636 return SimplifySelectCC(DL, N0, N1, N2, N3, CC);
12648 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
12651 if (SDValue Combined = SimplifySetCC(VT, N0, N1, Cond, DL, !PreferSetCC)) {
12693 if (IsAndWithShift(N0, N1)) {
12695 ShiftOrRotate = N1;
12696 } else if (IsAndWithShift(N1, N0)) {
12697 AndOrOp = N1;
12699 } else if (IsRotateWithOp(N0, N1)) {
12702 ShiftOrRotate = N1;
12703 } else if (IsRotateWithOp(N1, N0)) {
12705 AndOrOp = N1;
13146 SDValue N1 = N0->getOperand(0);
13147 if (!(N1.getOpcode() == ISD::SHL || N1.getOpcode() == ISD::SRL) ||
13148 N1.getOperand(1).getOpcode() != ISD::Constant ||
13149 (LegalOperations && !TLI.isOperationLegal(N1.getOpcode(), VT)))
13153 if (!isa<LoadSDNode>(N1.getOperand(0)))
13155 LoadSDNode *Load = cast<LoadSDNode>(N1.getOperand(0));
13164 if (N1.getOpcode() == ISD::SHL && N0.getOpcode() != ISD::AND)
13167 if (!N0.hasOneUse() || !N1.hasOneUse())
13171 if (!ExtendUsesToFormExtLoad(VT, N1.getNode(), N1.getOperand(0),
13180 SDLoc DL1(N1);
13181 SDValue Shift = DAG.getNode(N1.getOpcode(), DL1, VT, ExtLoad,
13182 N1.getOperand(1));
13189 ExtendSetCCUses(SetCCs, N1.getOperand(0), ExtLoad, ISD::ZERO_EXTEND);
14338 SDValue N1 = N->getOperand(1);
14339 EVT AssertVT = cast<VTSDNode>(N1)->getVT();
14374 BigA.getOperand(0), N1);
14672 SDValue N1 = N->getOperand(1);
14674 EVT ExtVT = cast<VTSDNode>(N1)->getVT();
14684 return DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), VT, N0, N1);
14694 N1);
14841 return DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), VT, BSwap, N1);
15865 SDValue N1 = N->getOperand(1);
15897 if (N0 == N1)
15920 if (Aggressive && isContractableFMUL(N0) && isContractableFMUL(N1)) {
15921 if (N0->use_size() > N1->use_size())
15922 std::swap(N0, N1);
15928 N0.getOperand(1), N1);
15933 if (isContractableFMUL(N1) && (Aggressive || N1->hasOneUse())) {
15934 return matcher.getNode(PreferredFusedOpcode, SL, VT, N1.getOperand(0),
15935 N1.getOperand(1), N0);
15952 E = N1;
15953 } else if (isFusedOp(N1) && N1.hasOneUse()) {
15954 FMA = N1;
15986 matcher.getNode(ISD::FP_EXTEND, SL, VT, N00.getOperand(1)), N1);
15992 if (matcher.match(N1, ISD::FP_EXTEND)) {
15993 SDValue N10 = N1.getOperand(0);
16025 N1);
16054 N1);
16061 if (isFusedOp(N1)) {
16062 SDValue N12 = N1.getOperand(2);
16068 return FoldFAddFMAFPExtFMul(N1.getOperand(0), N1.getOperand(1),
16080 if (N1.getOpcode() == ISD::FP_EXTEND) {
16081 SDValue N10 = N1.getOperand(0);
16102 SDValue N1 = N->getOperand(1);
16172 if (isContractableFMUL(N0) && isContractableFMUL(N1) &&
16173 (N0->use_size() > N1->use_size())) {
16175 if (SDValue V = tryToFoldXSubYZ(N0, N1))
16178 if (SDValue V = tryToFoldXYSubZ(N0, N1))
16182 if (SDValue V = tryToFoldXYSubZ(N0, N1))
16185 if (SDValue V = tryToFoldXSubYZ(N0, N1))
16196 matcher.getNode(ISD::FNEG, SL, VT, N1));
16212 matcher.getNode(ISD::FNEG, SL, VT, N1));
16219 if (matcher.match(N1, ISD::FP_EXTEND)) {
16220 SDValue N10 = N1.getOperand(0);
16252 N1));
16276 N1));
16307 matcher.getNode(ISD::FNEG, SL, VT, N1)));
16312 if (CanFuse && isFusedOp(N1) &&
16313 isContractableAndReassociableFMUL(N1.getOperand(2)) &&
16314 N1->hasOneUse() && NoSignedZero) {
16315 SDValue N20 = N1.getOperand(2).getOperand(0);
16316 SDValue N21 = N1.getOperand(2).getOperand(1);
16319 matcher.getNode(ISD::FNEG, SL, VT, N1.getOperand(0)),
16320 N1.getOperand(1),
16340 matcher.getNode(ISD::FNEG, SL, VT, N1)));
16366 matcher.getNode(ISD::FNEG, SL, VT, N1)));
16373 if (isFusedOp(N1) && matcher.match(N1.getOperand(2), ISD::FP_EXTEND) &&
16374 N1->hasOneUse()) {
16375 SDValue N120 = N1.getOperand(2).getOperand(0);
16383 matcher.getNode(ISD::FNEG, SL, VT, N1.getOperand(0)),
16384 N1.getOperand(1),
16399 if (matcher.match(N1, ISD::FP_EXTEND) && isFusedOp(N1.getOperand(0))) {
16400 SDValue CvtSrc = N1.getOperand(0);
16431 SDValue N1 = N->getOperand(1);
16441 SDValue FAdd = N0.getOpcode() == ISD::FADD ? N0 : N1;
16480 if (SDValue FMA = FuseFADD(N0, N1))
16482 if (SDValue FMA = FuseFADD(N1, N0))
16513 if (SDValue FMA = FuseFSUB(N0, N1))
16515 if (SDValue FMA = FuseFSUB(N1, N0))
16535 SDValue N1 = N->getOperand(1);
16537 SDNode *N1CFP = DAG.isConstantFPBuildVectorOrConstantFP(N1);
16544 if (SDValue R = DAG.simplifyFPBinop(N->getOpcode(), N0, N1, Flags))
16548 if (SDValue C = DAG.FoldConstantArithmetic(ISD::FADD, DL, VT, {N0, N1}))
16553 return DAG.getNode(ISD::FADD, DL, VT, N1, N0);
16561 ConstantFPSDNode *N1C = isConstOrConstSplatFP(N1, true);
16572 N1, DAG, LegalOperations, ForCodeSize))
16579 return DAG.getNode(ISD::FSUB, DL, VT, N1, NegN0);
16592 return DAG.getNode(ISD::FSUB, DL, VT, N1, Add);
16595 if (isFMulNegTwo(N1)) {
16596 SDValue B = N1.getOperand(0);
16608 if (N0.getOpcode() == ISD::FNEG && N0.getOperand(0) == N1)
16612 if (N1.getOpcode() == ISD::FNEG && N1.getOperand(0) == N0)
16625 SDValue NewC = DAG.getNode(ISD::FADD, DL, VT, N0.getOperand(1), N1);
16640 if (CFP01 && !CFP00 && N0.getOperand(0) == N1) {
16643 return DAG.getNode(ISD::FMUL, DL, VT, N1, NewCFP);
16647 if (CFP01 && !CFP00 && N1.getOpcode() == ISD::FADD &&
16648 N1.getOperand(0) == N1.getOperand(1) &&
16649 N0.getOperand(0) == N1.getOperand(0)) {
16656 if (N1.getOpcode() == ISD::FMUL) {
16658 DAG.isConstantFPBuildVectorOrConstantFP(N1.getOperand(0));
16660 DAG.isConstantFPBuildVectorOrConstantFP(N1.getOperand(1));
16663 if (CFP11 && !CFP10 && N1.getOperand(0) == N0) {
16664 SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, N1.getOperand(1),
16672 N1.getOperand(0) == N0.getOperand(0)) {
16673 SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, N1.getOperand(1),
16675 return DAG.getNode(ISD::FMUL, DL, VT, N1.getOperand(0), NewCFP);
16684 (N0.getOperand(0) == N1)) {
16685 return DAG.getNode(ISD::FMUL, DL, VT, N1,
16690 if (N1.getOpcode() == ISD::FADD) {
16692 DAG.isConstantFPBuildVectorOrConstantFP(N1.getOperand(0));
16694 if (!CFP10 && N1.getOperand(0) == N1.getOperand(1) &&
16695 N1.getOperand(0) == N0) {
16702 if (N0.getOpcode() == ISD::FADD && N1.getOpcode() == ISD::FADD &&
16704 N1.getOperand(0) == N1.getOperand(1) &&
16705 N0.getOperand(0) == N1.getOperand(0)) {
16713 VT, N0, N1, Flags))
16729 SDValue N1 = N->getOperand(2);
16738 N1, DAG, LegalOperations, ForCodeSize)) {
16748 {Chain, N1, NegN0});
16755 SDValue N1 = N->getOperand(1);
16757 ConstantFPSDNode *N1CFP = isConstOrConstSplatFP(N1, true);
16764 if (SDValue R = DAG.simplifyFPBinop(N->getOpcode(), N0, N1, Flags))
16768 if (SDValue C = DAG.FoldConstantArithmetic(ISD::FSUB, DL, VT, {N0, N1}))
16787 if (N0 == N1) {
16793 // (fsub -0.0, N1) -> -N1
16804 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize))
16807 return DAG.getNode(ISD::FNEG, DL, VT, N1);
16814 N1.getOpcode() == ISD::FADD) {
16816 if (N0 == N1->getOperand(0))
16817 return DAG.getNode(ISD::FNEG, DL, VT, N1->getOperand(1));
16819 if (N0 == N1->getOperand(1))
16820 return DAG.getNode(ISD::FNEG, DL, VT, N1->getOperand(0));
16825 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize))
16945 SDValue N1 = N->getOperand(1);
16946 ConstantFPSDNode *N1CFP = isConstOrConstSplatFP(N1, true);
16953 if (SDValue R = DAG.simplifyFPBinop(N->getOpcode(), N0, N1, Flags))
16957 if (SDValue C = DAG.FoldConstantArithmetic(ISD::FMUL, DL, VT, {N0, N1}))
16962 !DAG.isConstantFPBuildVectorOrConstantFP(N1))
16963 return DAG.getNode(ISD::FMUL, DL, VT, N1, N0);
16975 if (DAG.isConstantFPBuildVectorOrConstantFP(N1) &&
16983 SDValue MulConsts = DAG.getNode(ISD::FMUL, DL, VT, N01, N1);
16993 SDValue MulConsts = DAG.getNode(ISD::FMUL, DL, VT, Two, N1);
16999 VT, N0, N1, Flags))
17015 // -N0 * -N1 --> N0 * N1
17025 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
17034 (N0.getOpcode() == ISD::SELECT || N1.getOpcode() == ISD::SELECT) &&
17036 SDValue Select = N0, X = N1;
17093 SDValue N1 = N->getOperand(1);
17096 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
17106 isa<ConstantFPSDNode>(N1) &&
17108 return matcher.getNode(ISD::FMA, DL, VT, N0, N1, N2);
17111 // (-N0 * -N1) + N2 --> (N0 * N1) + N2
17121 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
17137 return matcher.getNode(ISD::FADD, SDLoc(N), VT, N1, N2);
17143 !DAG.isConstantFPBuildVectorOrConstantFP(N1))
17144 return matcher.getNode(ISD::FMA, SDLoc(N), VT, N1, N0, N2);
17151 DAG.isConstantFPBuildVectorOrConstantFP(N1) &&
17155 matcher.getNode(ISD::FADD, DL, VT, N1, N2.getOperand(1)));
17160 DAG.isConstantFPBuildVectorOrConstantFP(N1) &&
17164 matcher.getNode(ISD::FMUL, DL, VT, N1, N0.getOperand(1)), N2);
17184 (N1.hasOneUse() &&
17187 matcher.getNode(ISD::FNEG, DL, VT, N1), N2);
17196 matcher.getNode(ISD::FADD, DL, VT, N1,
17203 matcher.getNode(ISD::FADD, DL, VT, N1,
17219 SDValue N1 = N->getOperand(1);
17225 if (isa<ConstantFPSDNode>(N0) && isa<ConstantFPSDNode>(N1) &&
17227 return DAG.getNode(ISD::FMAD, DL, VT, N0, N1, N2);
17249 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
17262 if (VT.isVector() && DAG.isSplatValue(N1))
17265 if (!MinUses || (N1->use_size() * NumElts) < MinUses)
17271 for (auto *U : N1->uses()) {
17272 if (U->getOpcode() == ISD::FDIV && U->getOperand(1) == N1) {
17294 SDValue Reciprocal = DAG.getNode(ISD::FDIV, DL, VT, FPOne, N1, Flags);
17314 SDValue N1 = N->getOperand(1);
17321 if (SDValue R = DAG.simplifyFPBinop(N->getOpcode(), N0, N1, Flags))
17325 if (SDValue C = DAG.FoldConstantArithmetic(ISD::FDIV, DL, VT, {N0, N1}))
17341 if (auto *N1CFP = isConstOrConstSplatFP(N1, true)) {
17364 if (N1.getOpcode() == ISD::FSQRT) {
17365 if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0), Flags))
17367 } else if (N1.getOpcode() == ISD::FP_EXTEND &&
17368 N1.getOperand(0).getOpcode() == ISD::FSQRT) {
17370 buildRsqrtEstimate(N1.getOperand(0).getOperand(0), Flags)) {
17371 RV = DAG.getNode(ISD::FP_EXTEND, SDLoc(N1), VT, RV);
17375 } else if (N1.getOpcode() == ISD::FP_ROUND &&
17376 N1.getOperand(0).getOpcode() == ISD::FSQRT) {
17378 buildRsqrtEstimate(N1.getOperand(0).getOperand(0), Flags)) {
17379 RV = DAG.getNode(ISD::FP_ROUND, SDLoc(N1), VT, RV, N1.getOperand(1));
17383 } else if (N1.getOpcode() == ISD::FMUL) {
17387 if (N1.getOperand(0).getOpcode() == ISD::FSQRT) {
17388 Sqrt = N1.getOperand(0);
17389 Y = N1.getOperand(1);
17390 } else if (N1.getOperand(1).getOpcode() == ISD::FSQRT) {
17391 Sqrt = N1.getOperand(1);
17392 Y = N1.getOperand(0);
17397 if (Flags.hasAllowReassociation() && N1.hasOneUse() &&
17398 N1->getFlags().hasAllowReassociation() && Sqrt.hasOneUse()) {
17421 SDValue Div = DAG.getNode(ISD::FDIV, SDLoc(N1), VT, Rsqrt, Y);
17430 if (SDValue RV = BuildDivEstimate(N0, N1, Flags))
17437 if (N1.getOpcode() == ISD::FSQRT && N0 == N1.getOperand(0))
17438 return N1;
17450 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
17464 SDValue N1 = N->getOperand(1);
17470 if (SDValue R = DAG.simplifyFPBinop(N->getOpcode(), N0, N1, Flags))
17474 if (SDValue C = DAG.FoldConstantArithmetic(ISD::FREM, DL, VT, {N0, N1}))
17480 // Lower frem N0, N1 => x - trunc(N0 / N1) * N1, providing N1 is an integer
17486 DAG.isKnownToBeAPowerOfTwoFP(N1)) {
17489 SDValue Div = DAG.getNode(ISD::FDIV, DL, VT, N0, N1);
17494 N1, N0);
17496 SDValue Mul = DAG.getNode(ISD::FMUL, DL, VT, Rnd, N1);
17546 SDValue N1 = N->getOperand(1);
17547 if (N1.getOpcode() != ISD::FP_EXTEND &&
17548 N1.getOpcode() != ISD::FP_ROUND)
17550 EVT N1VT = N1->getValueType(0);
17551 EVT N1Op0VT = N1->getOperand(0).getValueType();
17557 SDValue N1 = N->getOperand(1);
17562 if (SDValue C = DAG.FoldConstantArithmetic(ISD::FCOPYSIGN, DL, VT, {N0, N1}))
17584 return DAG.getNode(ISD::FCOPYSIGN, DL, VT, N0.getOperand(0), N1);
17587 if (N1.getOpcode() == ISD::FABS)
17591 if (N1.getOpcode() == ISD::FCOPYSIGN)
17592 return DAG.getNode(ISD::FCOPYSIGN, DL, VT, N0, N1.getOperand(1));
17597 return DAG.getNode(ISD::FCOPYSIGN, DL, VT, N0, N1.getOperand(0));
17600 EVT SignVT = N1.getValueType();
17601 if (SimplifyDemandedBits(N1,
17897 SDValue N1 = N->getOperand(1);
17902 DAG.FoldConstantArithmetic(ISD::FP_ROUND, SDLoc(N), VT, {N0, N1}))
17950 N0.getOperand(0), N1);
18107 SDValue N1 = N->getOperand(1);
18116 if (SDValue C = DAG.FoldConstantArithmetic(Opc, SDLoc(N), VT, {N0, N1}))
18121 !DAG.isConstantFPBuildVectorOrConstantFP(N1))
18122 return DAG.getNode(N->getOpcode(), SDLoc(N), VT, N1, N0);
18124 if (const ConstantFPSDNode *N1CFP = isConstOrConstSplatFP(N1)) {
18157 Opc, SDLoc(N), VT, N0, N1, Flags))
18188 SDValue N1 = N->getOperand(1);
18193 if (N1->getOpcode() == ISD::FREEZE && N1.hasOneUse()) {
18195 N1->getOperand(0), N2);
18208 if (N1->getOpcode() == ISD::SETCC && N1.hasOneUse()) {
18209 SDValue S0 = N1->getOperand(0), S1 = N1->getOperand(1);
18210 ISD::CondCode Cond = cast<CondCodeSDNode>(N1->getOperand(2))->get();
18244 DAG.getSetCC(SDLoc(N1), N1->getValueType(0), S0, S1, Cond), N2);
18255 if (N1.getOpcode() == ISD::SETCC &&
18257 N1.getOperand(0).getValueType())) {
18259 Chain, N1.getOperand(2),
18260 N1.getOperand(0), N1.getOperand(1), N2);
18263 if (N1.hasOneUse()) {
18267 if (SDValue NewN1 = rebuildSetCC(N1))
19937 SDValue N1 = Value.getOperand(1);
19938 unsigned BitWidth = N1.getValueSizeInBits();
19939 APInt Imm = N1->getAsAPIntVal();
24977 SDValue N0 = Shuf->getOperand(0), N1 = Shuf->getOperand(1);
24979 N1.getOpcode() != ISD::CONCAT_VECTORS || N1.getNumOperands() != 2 ||
24980 !N0.getOperand(1).isUndef() || !N1.getOperand(1).isUndef())
25014 SDValue X = N0.getOperand(0), Y = N1.getOperand(0);
25028 SDValue N1 = N->getOperand(1);
25042 if (NumElemsPerConcat * 2 == NumElts && N1.isUndef() &&
25048 N1 = DAG.getUNDEF(ConcatVT);
25049 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, N0, N1);
25080 Ops.push_back(N1.getOperand(OpIdx - N0.getNumOperands()));
25108 SDValue N1 = SVN->getOperand(1);
25113 // If only one of N1,N2 is constant, bail out if it is not ALL_ZEROS as
25115 if (!N1.isUndef()) {
25116 if (!N1->hasOneUse())
25120 bool N1AnyConst = isAnyConstantBuildVector(N1);
25123 if (!N0AnyConst && N1AnyConst && !ISD::isBuildVectorAllZeros(N1.getNode()))
25131 auto *BV1 = dyn_cast<BuildVectorSDNode>(N1);
25142 SDValue &S = (M < (int)NumElts ? N0 : N1);
25754 SDValue N1 = N->getOperand(1);
25759 if (N0.isUndef() && N1.isUndef())
25765 if (N0 == N1)
25774 if (N1.isUndef()) {
25786 return DAG.getVectorShuffle(VT, SDLoc(N), N0, N1, NewMask);
25918 (N1.isUndef() ||
25919 (N1.getOpcode() == ISD::CONCAT_VECTORS &&
25920 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()))) {
25928 if (N0.getOpcode() == ISD::CONCAT_VECTORS && N1.isUndef() &&
25945 return DAG.getVectorShuffle(VT, SDLoc(N), NewCat, N1, NewMask);
26002 if (N1.getOpcode() == ISD::CONCAT_VECTORS)
26003 if (SDValue InsertN1 = ShuffleToInsert(N0, N1, Mask))
26008 if (SDValue InsertN0 = ShuffleToInsert(N1, N0, CommuteMask))
26032 // TODO: Should we try to mask with N1 as well?
26035 (DemandedRHS.isZero() || DAG.MaskedVectorIsZero(N1, DemandedRHS))) {
26077 N1.isUndef() && Level < AfterLegalizeVectorOps &&
26135 // i.e. Merge SVN(OtherSVN, N1) -> shuffle(SV0, SV1, Mask) iff Commute = false
26136 // Merge SVN(N1, OtherSVN) -> shuffle(SV0, SV1, Mask') iff Commute = true
26139 ShuffleVectorSDNode *OtherSVN, SDValue N1,
26174 // This shuffle index references an element within N1.
26175 CurrentVec = N1;
26255 if (N1.getOpcode() == ISD::VECTOR_SHUFFLE &&
26259 assert(N1->getOperand(0).getValueType() == VT &&
26262 SDValue SV0 = N1->getOperand(0);
26263 SDValue SV1 = N1->getOperand(1);
26274 N1.getOpcode() == ISD::VECTOR_SHUFFLE &&
26276 !cast<ShuffleVectorSDNode>(N1)->isSplat()) {
26317 (N1.isUndef() ||
26318 (SrcOpcode == N1.getOpcode() && N->isOnlyUserOf(N1.getNode())))) {
26322 SDValue Op10 = N1.isUndef() ? N1 : N1.getOperand(0);
26323 SDValue Op11 = N1.isUndef() ? N1 : N1.getOperand(1);
26336 SDValue InnerN = Commute ? N1 : N0;
26499 SDValue N1 = N->getOperand(1);
26504 if (N1.isUndef())
26510 if (N0.isUndef() && N1.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
26511 N1.getOperand(1) == N2) {
26512 EVT SrcVT = N1.getOperand(0).getValueType();
26514 return N1.getOperand(0);
26521 VT, N0, N1.getOperand(0), N2);
26525 VT, N1.getOperand(0), N2);
26532 if (N1.getOpcode() == ISD::EXTRACT_SUBVECTOR && N1.getOperand(0) == N0 &&
26533 N1.getOperand(1) == N2)
26538 if (N0.isUndef() && N1.getOpcode() == ISD::SPLAT_VECTOR)
26539 if (DAG.isConstantValueOfAnyType(N1.getOperand(0)) || N1.hasOneUse())
26540 return DAG.getNode(ISD::SPLAT_VECTOR, SDLoc(N), VT, N1.getOperand(0));
26544 // i.e. INSERT_SUBVECTOR UNDEF (BITCAST N1) N2 ->
26545 // BITCAST (INSERT_SUBVECTOR UNDEF N1 N2)
26546 if (N0.isUndef() && N1.getOpcode() == ISD::BITCAST &&
26547 N1.getOperand(0).getOpcode() == ISD::EXTRACT_SUBVECTOR &&
26548 N1.getOperand(0).getOperand(1) == N2 &&
26549 N1.getOperand(0).getOperand(0).getValueType().getVectorElementCount() ==
26551 N1.getOperand(0).getOperand(0).getValueType().getSizeInBits() ==
26553 return DAG.getBitcast(VT, N1.getOperand(0).getOperand(0));
26556 // If both N1 and N2 are bitcast values on which insert_subvector
26558 // i.e. INSERT_SUBVECTOR (BITCAST N0) (BITCAST N1) N2 ->
26559 // BITCAST (INSERT_SUBVECTOR N0 N1 N2)
26560 if (N0.getOpcode() == ISD::BITCAST && N1.getOpcode() == ISD::BITCAST) {
26562 SDValue CN1 = N1.getOperand(0);
26578 N0.getOperand(1).getValueType() == N1.getValueType() &&
26581 N1, N2);
26586 if (N0.isUndef() && N1.getOpcode() == ISD::INSERT_SUBVECTOR &&
26587 N1.getOperand(0).isUndef() && isNullConstant(N1.getOperand(2)) &&
26590 N1.getOperand(1), N2);
26596 N1.getOpcode() == ISD::BITCAST) {
26598 SDValue N1Src = peekThroughBitcasts(N1);
26634 N1.getValueType() == N0.getOperand(1).getValueType()) {
26639 N0.getOperand(0), N1, N2);
26649 N0.getOperand(0).getValueType() == N1.getValueType() &&
26651 N1.getValueType().isScalableVector()) {
26652 unsigned Factor = N1.getValueType().getVectorMinNumElements();
26654 Ops[InsIdx / Factor] = N1;
27018 SDValue N1 = N->getOperand(1);
27029 SDValue Src1 = DAG.getSplatSourceVector(N1, Index1);
27033 N1.getOpcode() == ISD::SPLAT_VECTOR;
27048 if (N0.getOpcode() == ISD::BUILD_VECTOR && N0.getOpcode() == N1.getOpcode() &&
27050 count_if(N1->ops(), [](SDValue V) { return !V.isUndef(); }) == 1) {
27210 SDValue DAGCombiner::SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1,
27215 SDValue SCC = SimplifySelectCC(DL, N0.getOperand(0), N0.getOperand(1), N1, N2,
27434 /// Try to fold an expression of the form (N0 cond N1) ? N2 : N3 to a shift and
27437 SDValue N1, SDValue N2, SDValue N3,
27454 if (!(isAllOnesConstant(N1) || (isNullConstant(N1) && N0 == N2)))
27459 if (!(isNullConstant(N1) || (isOneConstant(N1) && N0 == N2)))
27509 SDValue N1 = N->getOperand(1);
27513 unsigned BinOpc = N1.getOpcode();
27515 (N1.getResNo() != N2.getResNo()))
27522 if (!N0->hasOneUse() || !N1->hasOneUse() || !N2->hasOneUse())
27527 SDVTList OpVTs = N1->getVTList();
27531 if (N1.getOperand(1) == N2.getOperand(1)) {
27532 SDValue N10 = N1.getOperand(0);
27535 SDValue NewBinOp = DAG.getNode(BinOpc, DL, OpVTs, NewSel, N1.getOperand(1));
27536 NewBinOp->setFlags(N1->getFlags());
27538 return SDValue(NewBinOp.getNode(), N1.getResNo());
27543 if (N1.getOperand(0) == N2.getOperand(0)) {
27544 SDValue N11 = N1.getOperand(1);
27550 DAG.getNode(BinOpc, DL, OpVTs, N1.getOperand(0), NewSel);
27551 NewBinOp->setFlags(N1->getFlags());
27553 return SDValue(NewBinOp.getNode(), N1.getResNo());
27606 const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3,
27647 DAG.getSetCC(DL, getSetCCResultType(N0.getValueType()), N0, N1, CC);
27658 /// Simplify an expression of the form (N0 cond N1) ? N2 : N3
27660 SDValue DAGCombiner::SimplifySelectCC(const SDLoc &DL, SDValue N0, SDValue N1,
27669 auto *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
27674 if (SDValue SCC = DAG.FoldSetCC(CmpResVT, N0, N1, CC, DL)) {
27684 convertSelectOfFPConstantsToLoadOffset(DL, N0, N1, N2, N3, CC))
27687 if (SDValue V = foldSelectCCToShiftAnd(DL, N0, N1, N2, N3, CC))
27697 N0->getValueType(0) == VT && isNullConstant(N1) && isNullConstant(N2)) {
27741 SCC = DAG.getSetCC(DL, CmpResVT, N0, N1, CC);
27744 SCC = DAG.getSetCC(SDLoc(N0), MVT::i1, N0, N1, CC);
27813 if (SDValue S = PerformMinMaxFpToSatCombine(N0, N1, N2, N3, CC, DAG))
27815 if (SDValue S = PerformUMinFpToSatCombine(N0, N1, N2, N3, CC, DAG))
27822 SDValue DAGCombiner::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
27827 return TLI.SimplifySetCC(VT, N0, N1, Cond, foldBooleans, DagCombineInfo, DL);