/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstrInfo.h | 43 unsigned Intr; member 50 unsigned Intr; member 56 unsigned Intr; member
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H A D | AMDGPUPromoteAlloca.cpp | 645 if (auto *Intr = dyn_cast<IntrinsicInst>(Inst)) { in promoteAllocaUserToVector() local 875 if (auto *Intr = dyn_cast<IntrinsicInst>(Inst)) { in tryPromoteAllocaToVector() local 1539 Intr in tryPromoteAllocaToLDS() local [all...] |
H A D | AMDGPUInstCombineIntrinsic.cpp | 33 unsigned Intr; member
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H A D | AMDGPULowerBufferFatPointers.cpp | 1027 setAlign(CallInst * Intr,Align A,unsigned RsrcArgIdx) setAlign() argument
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H A D | SIISelLowering.cpp | 1215 const AMDGPU::ImageDimIntrinsicInfo *Intr getTgtMemIntrinsic() local 6548 SDNode *Intr = BRCOND.getOperand(1).getNode(); LowerBRCOND() local 7897 lowerImage(SDValue Op,const AMDGPU::ImageDimIntrinsicInfo * Intr,SelectionDAG & DAG,bool WithChain) const lowerImage() argument [all...] |
H A D | AMDGPUInstructionSelector.cpp | 3634 const AMDGPU::ImageDimIntrinsicInfo *Intr = select() local [all...] |
H A D | AMDGPULegalizerInfo.cpp | 6218 packImage16bitOpsToDwords(MachineIRBuilder & B,MachineInstr & MI,SmallVectorImpl<Register> & PackedAddrs,unsigned ArgOffset,const AMDGPU::ImageDimIntrinsicInfo * Intr,bool IsA16,bool IsG16) packImage16bitOpsToDwords() argument [all...] |
/llvm-project/llvm/unittests/IR/ |
H A D | IntrinsicsTest.cpp | 105 auto *Intr = makeIntrinsic(ID); TEST_F() local
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/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonOptimizeSZextends.cpp | 116 Value *Intr = Shl->getOperand(0); in runOnFunction() local
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/llvm-project/llvm/lib/Analysis/ |
H A D | AssumeBundleQueries.cpp | 139 auto *Intr = cast<IntrinsicInst>(U->getUser()); in getBundleFromUse() local
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/llvm-project/clang/lib/Sema/ |
H A D | SemaPPC.cpp | 246 CUSTOM_BUILTIN(Name,Intr,Types,Acc,Feature) CheckPPCBuiltinFunctionCall() argument
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/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | AssumeBundleBuilder.cpp | 132 IntrinsicInst *Intr = cast<IntrinsicInst>(Assume); in tryToPreserveWithoutAddingAssume() local 299 if (auto *Intr = Builder.build()) { salvageKnowledge() local
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H A D | BasicBlockUtils.cpp | 2231 if (auto *Intr = dyn_cast<IntrinsicInst>(SW->getCondition())) isPresplitCoroSuspendExitEdge() local
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/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 2288 lowerMSALoadIntr(SDValue Op,SelectionDAG & DAG,unsigned Intr,const MipsSubtarget & Subtarget) lowerMSALoadIntr() argument 2310 unsigned Intr = Op->getConstantOperandVal(1); lowerINTRINSIC_W_CHAIN() local 2362 lowerMSAStoreIntr(SDValue Op,SelectionDAG & DAG,unsigned Intr,const MipsSubtarget & Subtarget) lowerMSAStoreIntr() argument 2385 unsigned Intr = Op->getConstantOperandVal(1); lowerINTRINSIC_VOID() local
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/llvm-project/clang/utils/TableGen/ |
H A D | NeonEmitter.cpp | 518 Intrinsic &Intr; global() member in __anon1ddc9b620111::Intrinsic::DagEmitter 522 DagEmitter(Intrinsic & Intr,StringRef CallPrefix) DagEmitter() argument [all...] |
/llvm-project/llvm/utils/TableGen/ |
H A D | SearchableTableEmitter.cpp | 148 std::unique_ptr<CodeGenIntrinsic> &Intr = Intrinsics[I]; getIntrinsic() local
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/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | GVNHoist.cpp | 1170 if (isa<DbgInfoIntrinsic>(Intr) || in hoistExpressions() local
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/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 10991 auto Intr = (BuiltinID == clang::AArch64::BI__builtin_arm_st64b EmitAArch64BuiltinExpr() local 11004 auto Intr = (BuiltinID == clang::AArch64::BI__builtin_arm_rndr EmitAArch64BuiltinExpr() local 13871 Function *Intr = CGF.CGM.getIntrinsic(IID); EmitX86FMAExpr() local 14869 Function *Intr = CGM.getIntrinsic(IID); EmitX86BuiltinExpr() local 14978 Function *Intr = CGM.getIntrinsic(IID); EmitX86BuiltinExpr() local 15089 Function *Intr = CGM.getIntrinsic(IID); EmitX86BuiltinExpr() local 15648 Function *Intr = CGM.getIntrinsic(IID); EmitX86BuiltinExpr() local 15676 Function *Intr = CGM.getIntrinsic(IID); EmitX86BuiltinExpr() local 16312 Function *Intr = CGM.getIntrinsic(IID); EmitX86BuiltinExpr() local 17761 CUSTOM_BUILTIN(Name,Intr,Types,Accumulate,Feature) EmitPPCBuiltinExpr() argument 17812 CUSTOM_BUILTIN(Name,Intr,Types,Acc,Feature) EmitPPCBuiltinExpr() argument [all...] |
/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVEmitIntrinsics.cpp | 208 IntrinsicInst *Intr = dyn_cast<IntrinsicInst>(I); requireAssignType() local
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/llvm-project/llvm/lib/IR/ |
H A D | AutoUpgrade.cpp | 2335 Function *Intr = Intrinsic::getDeclaration(F->getParent(), Intrinsic::sqrt, upgradeX86IntrinsicCall() local 2702 Function *Intr = Intrinsic::getDeclaration(F->getParent(), IID, ResultTy); upgradeX86IntrinsicCall() local
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/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
H A D | AMDGPUBaseInfo.cpp | 2912 unsigned Intr; global() member 2917 unsigned Intr; global() member
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/llvm-project/llvm/lib/Transforms/IPO/ |
H A D | WholeProgramDevirt.cpp | 1437 Function *Intr = tryICallBranchFunnel() local
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/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2420 SDValue Intr = DAG.getNode(Opcode, SDLoc(Op), RawVTs, Ops); emitIntrinsicWithCCAndChain() local 2437 SDValue Intr = DAG.getNode(Opcode, SDLoc(Op), Op->getVTList(), Ops); emitIntrinsicWithCC() local 6097 SDValue Intr = DAG.getNode(SystemZISD::TDC, DL, ResultVT, Arg, TDCMaskV); lowerIS_FPCLASS() local
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/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 456 Intr->getIntrinsicID() != Intrinsic::strip_invariant_group) in simplifyInvariantGroupIntrinsic() local
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 16104 Intrinsic::ID Intr, IntrLD, IntrPerm; PerformDAGCombine() local 16200 Intrinsic::ID Intr = (isLittleEndian ? Intrinsic::ppc_altivec_lvsr PerformDAGCombine() local
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