Lines Matching defs:Intr

1230       const AMDGPU::ImageDimIntrinsicInfo *Intr =
1232       BaseOpcode = AMDGPU::getMIMGBaseOpcodeInfo(Intr->BaseOpcode);
6636 unsigned SITargetLowering::isCFIntrinsic(const SDNode *Intr) const {
6637   if (Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN) {
6638     switch (Intr->getConstantOperandVal(1)) {
6692   SDNode *Intr = BRCOND.getOperand(1).getNode();
6697   if (Intr->getOpcode() == ISD::SETCC) {
6699     SetCC = Intr;
6700     Intr = SetCC->getOperand(0).getNode();
6709   unsigned CFNode = isCFIntrinsic(Intr);
6715   bool HaveChain = Intr->getOpcode() == ISD::INTRINSIC_VOID ||
6716                    Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN;
6728   Ops.append(Intr->op_begin() + (HaveChain ? 2 : 1), Intr->op_end());
6731   ArrayRef<EVT> Res(Intr->value_begin() + 1, Intr->value_end());
6752   for (unsigned i = 1, e = Intr->getNumValues() - 1; i != e; ++i) {
6753     SDNode *CopyToReg = findUser(SDValue(Intr, i), ISD::CopyToReg);
6764   DAG.ReplaceAllUsesOfValueWith(SDValue(Intr, Intr->getNumValues() - 1),
6765                                 Intr->getOperand(0));
8130                                      const AMDGPU::ImageDimIntrinsicInfo *Intr,
8136       AMDGPU::getMIMGBaseOpcodeInfo(Intr->BaseOpcode);
8137   const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfo(Intr->Dim);
8138   unsigned IntrOpcode = Intr->BaseOpcode;
8163         (Intr->BaseOpcode == AMDGPU::IMAGE_ATOMIC_PK_ADD_F16 ||
8164          Intr->BaseOpcode == AMDGPU::IMAGE_ATOMIC_PK_ADD_BF16);
8182     DMask = Op->getConstantOperandVal(ArgOffset + Intr->DMaskIndex);
8227   unsigned VAddrEnd = ArgOffset + Intr->VAddrEnd;
8232       Op.getOperand(ArgOffset + Intr->GradientStart).getSimpleValueType();
8237   VAddrVT = Op.getOperand(ArgOffset + Intr->CoordStart).getSimpleValueType();
8243   for (unsigned I = Intr->VAddrStart; I < Intr->GradientStart; I++) {
8245       assert(I == Intr->BiasIndex && "Got unexpected 16-bit extra argument");
8253       assert((!IsA16 || Intr->NumBiasArgs == 0 || I != Intr->BiasIndex) &&
8284         AMDGPU::getMIMGG16MappingInfo(Intr->BaseOpcode);
8291     // const int PackEndIdx = IsA16 ? VAddrEnd : (ArgOffset + Intr->CoordStart);
8293                               ArgOffset + Intr->GradientStart,
8294                               ArgOffset + Intr->CoordStart, Intr->NumGradients);
8296     for (unsigned I = ArgOffset + Intr->GradientStart;
8297          I < ArgOffset + Intr->CoordStart; I++)
8304                               ArgOffset + Intr->CoordStart, VAddrEnd,
8308     for (unsigned I = ArgOffset + Intr->CoordStart; I < VAddrEnd; I++)
8349         Op.getConstantOperandVal(ArgOffset + Intr->UnormIndex);
8356   SDValue TexFail = Op.getOperand(ArgOffset + Intr->TexFailCtrlIndex);
8399   unsigned CPol = Op.getConstantOperandVal(ArgOffset + Intr->CachePolicyIndex);
8416   SDValue Rsrc = Op.getOperand(ArgOffset + Intr->RsrcIndex);
8422     SDValue Samp = Op.getOperand(ArgOffset + Intr->SampIndex);