Lines Matching defs:Intr

6301                                       const AMDGPU::ImageDimIntrinsicInfo *Intr,
6305   auto EndIdx = Intr->VAddrEnd;
6307   for (unsigned I = Intr->VAddrStart; I < EndIdx; I++) {
6314     if ((I < Intr->GradientStart) ||
6315         (I >= Intr->GradientStart && I < Intr->CoordStart && !IsG16) ||
6316         (I >= Intr->CoordStart && !IsA16)) {
6317       if ((I < Intr->GradientStart) && IsA16 &&
6319         assert(I == Intr->BiasIndex && "Got unexpected 16-bit extra argument");
6326         assert((!IsA16 || Intr->NumBiasArgs == 0 || I != Intr->BiasIndex) &&
6336           ((Intr->NumGradients / 2) % 2 == 1 &&
6337            (I == static_cast<unsigned>(Intr->GradientStart +
6338                                        (Intr->NumGradients / 2) - 1) ||
6339             I == static_cast<unsigned>(Intr->GradientStart +
6340                                        Intr->NumGradients - 1))) ||
6401     const AMDGPU::ImageDimIntrinsicInfo *Intr) const {
6412       AMDGPU::getMIMGBaseOpcodeInfo(Intr->BaseOpcode);
6434       MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg());
6436       MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg());
6444     DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm();
6478     MI.getOperand(ArgOffset + Intr->DMaskIndex).setImm(DMask);
6499   unsigned CorrectedNumVAddrs = Intr->NumVAddrs;
6521     packImage16bitOpsToDwords(B, MI, PackedRegs, ArgOffset, Intr, IsA16, IsG16);
6546     for (unsigned I = Intr->VAddrStart; I < Intr->VAddrEnd; I++) {
6555       if (I - Intr->VAddrStart < NumPacked)
6556         SrcOp.setReg(PackedRegs[I - Intr->VAddrStart]);
6583                                ArgOffset + Intr->VAddrStart + NSAMaxSize - 1,
6584                                Intr->NumVAddrs - NSAMaxSize + 1);
6585     } else if (!UseNSA && Intr->NumVAddrs > 1) {
6586       convertImageAddrToPacked(B, MI, ArgOffset + Intr->VAddrStart,
6587                                Intr->NumVAddrs);