/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineInternal.h | 224 getLosslessTrunc(Constant * C,Type * TruncTy,unsigned ExtOp) getLosslessTrunc() argument
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 5208 unsigned ExtOp, TruncOp; PromoteNode() local 5250 unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND PromoteNode() local 5266 unsigned ExtOp, TruncOp; PromoteNode() local 5321 unsigned ExtOp = ISD::FP_EXTEND; PromoteNode() local 5354 unsigned ExtOp = ISD::FP_EXTEND; PromoteNode() local 5385 unsigned ExtOp = ISD::FP_EXTEND; PromoteNode() local [all...] |
H A D | LegalizeVectorOps.cpp | 596 unsigned ExtOp = VecVT.isFloatingPoint() ? ISD::FP_EXTEND : ISD::ANY_EXTEND; PromoteSETCC() local
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H A D | DAGCombiner.cpp | 17792 unsigned ExtOp = IsInputSigned && IsOutputSigned ? ISD::SIGN_EXTEND FoldIntToFPToInt() local [all...] |
/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | BasicTTIImpl.h | 2176 unsigned ExtOp = getTypeBasedIntrinsicInstrCost() local 2243 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt; getTypeBasedIntrinsicInstrCost() local
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/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | SimplifyIndVar.cpp | 1630 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
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/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.cpp | 526 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP); in buildBoolExt() local
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H A D | LegalizerHelper.cpp | 2239 auto ExtOp = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {TruncOp}); widenScalarAddSubOverflow() local 2312 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; widenScalarMulo() local 8076 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; lowerSMULH_UMULH() local
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/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonConstExtenders.cpp | 1534 MachineOperand ExtOp(EV); insertInitializer() local
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUCodeGenPrepare.cpp | 581 Value *ExtOp = Builder.CreateZExt(I.getOperand(0), I32Ty); promoteUniformBitreverseToI32() local
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/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 1560 auto PromoteMULO = [&](unsigned ExtOp) { in lowerOverflowArithmetic() argument
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 6463 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; LowerCall_64SVR4() local 14934 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1)); combineBVOfVecSExt() local
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/llvm-project/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 8494 unsigned ExtOp = CmpI->isSigned() ? Instruction::SExt : Instruction::ZExt; lookThroughCast() local
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/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 7468 SDValue ExtOp = DAG.getNode(ExtOpcode, SDLoc(N), ExtVT, Op); combineINT_TO_FP() local
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/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 18215 SDValue ExtOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ExtVecVT, InsertBitToMaskVector() local 42406 SDValue ExtOp = SimplifyDemandedVectorEltsForTargetNode() local 42438 SDValue ExtOp = SimplifyDemandedVectorEltsForTargetNode() local 42493 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ops); SimplifyDemandedVectorEltsForTargetNode() local 57000 unsigned ExtOp = DAG.getOpcode_EXTEND_VECTOR_INREG(InOpcode); combineEXTRACT_SUBVECTOR() local [all...] |
/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 8291 packTBLDVectorList(CodeGenFunction & CGF,ArrayRef<Value * > Ops,Value * ExtOp,Value * IndexOp,llvm::Type * ResTy,unsigned IntID,const char * Name) packTBLDVectorList() argument
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 12831 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE; AddCombineBUILD_VECTORToVPADDL() local
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/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 24528 SDValue ExtOp = Src->getOperand(0); performSignExtendInRegCombine() local [all...] |