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Searched defs:DstVT (Results 1 – 22 of 22) sorted by relevance

/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp699 X86FastEmitExtend(ISD::NodeType Opc,EVT DstVT,unsigned Src,EVT SrcVT,unsigned & ResultReg) X86FastEmitExtend() argument
1244 EVT DstVT = VA.getValVT(); X86SelectRet() local
1532 EVT DstVT = TLI.getValueType(DL, I->getType()); X86SelectZExt() local
1590 EVT DstVT = TLI.getValueType(DL, I->getType()); X86SelectSExt() local
2432 MVT DstVT = TLI.getValueType(DL, I->getType()).getSimpleVT(); X86SelectIntToFP() local
2514 EVT DstVT = TLI.getValueType(DL, I->getType()); X86SelectTrunc() local
3679 EVT DstVT = TLI.getValueType(DL, I->getType()); fastSelectInstruction() local
3694 MVT SrcVT, DstVT; fastSelectInstruction() local
[all...]
H A DX86SelectionDAGInfo.cpp251 EVT DstVT = Dst.getValueType(); emitConstantSizeRepmov() local
H A DX86ISelLowering.cpp4274 __anon0268aba80c02(SDValue Op, MVT OpVT, MVT DstVT) getAVX512Node() argument
4298 MVT DstVT = VT; getAVX512Node() local
10083 matchShuffleAsVTRUNC(MVT & SrcVT,MVT & DstVT,MVT VT,ArrayRef<int> Mask,const APInt & Zeroable,const X86Subtarget & Subtarget) matchShuffleAsVTRUNC() argument
10121 getAVX512TruncNode(const SDLoc & DL,MVT DstVT,SDValue Src,const X86Subtarget & Subtarget,SelectionDAG & DAG,bool ZeroUppers) getAVX512TruncNode() argument
10491 MVT DstVT = MVT::getVectorVT(DstSVT, NumSrcElts * 2); lowerShuffleWithPACK() local
19461 BuildFILD(EVT DstVT,EVT SrcVT,const SDLoc & DL,SDValue Chain,SDValue Pointer,MachinePointerInfo PtrInfo,Align Alignment,SelectionDAG & DAG) const BuildFILD() argument
19869 MVT DstVT = Op->getSimpleValueType(0); LowerUINT_TO_FP() local
20324 truncateVectorWithPACK(unsigned Opcode,EVT DstVT,SDValue In,const SDLoc & DL,SelectionDAG & DAG,const X86Subtarget & Subtarget) truncateVectorWithPACK() argument
20446 truncateVectorWithPACKUS(EVT DstVT,SDValue In,const SDLoc & DL,const X86Subtarget & Subtarget,SelectionDAG & DAG) truncateVectorWithPACKUS() argument
20454 truncateVectorWithPACKSS(EVT DstVT,SDValue In,const SDLoc & DL,const X86Subtarget & Subtarget,SelectionDAG & DAG) truncateVectorWithPACKSS() argument
20466 matchTruncateWithPACK(unsigned & PackOpcode,EVT DstVT,SDValue In,const SDLoc & DL,SelectionDAG & DAG,const X86Subtarget & Subtarget) matchTruncateWithPACK() argument
20556 LowerTruncateVecPackWithSignBits(MVT DstVT,SDValue In,const SDLoc & DL,const X86Subtarget & Subtarget,SelectionDAG & DAG) LowerTruncateVecPackWithSignBits() argument
20590 LowerTruncateVecPack(MVT DstVT,SDValue In,const SDLoc & DL,const X86Subtarget & Subtarget,SelectionDAG & DAG) LowerTruncateVecPack() argument
21243 EVT DstVT = Op.getSimpleValueType(); LowerLRINT_LLRINT() local
21261 EVT DstVT = N->getValueType(0); LRINT_LLRINTHelper() local
21319 EVT DstVT = Node->getValueType(0); LowerFP_TO_INT_SAT() local
31158 MVT DstVT = Op.getSimpleValueType(); LowerBITCAST() local
32201 MVT DstVT = Op.getSimpleValueType(); LowerADDRSPACECAST() local
33548 EVT DstVT = N->getValueType(0); ReplaceNodeResults() local
37807 matchUnaryShuffle(MVT MaskVT,ArrayRef<int> Mask,bool AllowFloatDomain,bool AllowIntDomain,SDValue V1,const SelectionDAG & DAG,const X86Subtarget & Subtarget,unsigned & Shuffle,MVT & SrcVT,MVT & DstVT) matchUnaryShuffle() argument
38110 matchBinaryShuffle(MVT MaskVT,ArrayRef<int> Mask,bool AllowFloatDomain,bool AllowIntDomain,SDValue & V1,SDValue & V2,const SDLoc & DL,SelectionDAG & DAG,const X86Subtarget & Subtarget,unsigned & Shuffle,MVT & SrcVT,MVT & DstVT,bool IsUnary) matchBinaryShuffle() argument
43591 EVT DstVT = N->getValueType(0); combineCastedMaskArithmetic() local
49227 MVT DstVT = N0.getSimpleValueType(); combineBitOpWithPACK() local
51623 MVT DstVT = Trunc.getSimpleValueType(); combineStore() local
53501 EVT DstVT = N->getValueType(0); combineSextInRegCmov() local
54784 EVT DstVT = combineUIntToFP() local
54803 EVT DstVT = InVT.changeVectorElementType(MVT::i32); combineUIntToFP() local
54855 EVT DstVT = combineSIntToFP() local
54874 EVT DstVT = InVT.changeVectorElementType(MVT::i32); combineSIntToFP() local
[all...]
H A DX86ISelDAGToDAG.cpp1355 MVT DstVT = N->getSimpleValueType(0); PreprocessISelDAG() local
1411 MVT DstVT = N->getSimpleValueType(0); PreprocessISelDAG() local
[all...]
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1537 Register ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0); in selectBitCast() local
1904 EVT DstVT = TLI.getValueType(DL, I->getType()); in selectOperator() local
1499 EVT DstVT = TLI.getValueType(DL, I->getType()); selectCast() local
[all...]
H A DTargetLowering.cpp698 EVT DstVT = Op.getValueType(); SimplifyMultipleUseDemandedBits() local
856 EVT DstVT = Op.getValueType(); SimplifyMultipleUseDemandedBits() local
8106 EVT DstVT = Node->getValueType(0); expandFP_TO_SINT() local
8180 EVT DstVT = Node->getValueType(0); expandFP_TO_UINT() local
8285 EVT DstVT = Node->getValueType(0); expandUINT_TO_FP() local
9557 EVT DstVT = LD->getValueType(0); scalarizeVectorLoad() local
11054 EVT DstVT = Node->getValueType(0); expandFP_TO_INT_SAT() local
[all...]
H A DLegalizeVectorTypes.cpp658 EVT DstVT = N->getValueType(0).getVectorElementType(); ScalarizeVecRes_FP_TO_XINT_SAT() local
6608 EVT DstVT = N->getValueType(0); WidenVecOp_FP_TO_XINT_SAT() local
H A DLegalizeDAG.cpp3307 EVT DstVT = Node->getValueType(0); ExpandNode() local
H A DLegalizeIntegerTypes.cpp5536 EVT DstVT = N->getValueType(0); ExpandIntOp_XINT_TO_FP() local
H A DDAGCombiner.cpp3724 if (DstVT == SrcVT) in getTruncatedUSUBSAT() argument
3752 foldSubToUSubSat(EVT DstVT,SDNode * N,const SDLoc & DL) foldSubToUSubSat() argument
13001 EVT DstVT = N->getValueType(0); CombineExtLoad() local
[all...]
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1063 if (DstVT != MVT::f32 && DstVT != MVT::f64) in SelectIToFP() local
1188 if (DstVT ! in SelectFPToI() local
[all...]
H A DPPCISelLowering.cpp8444 EVT DstVT = Op.getValueType(); LowerFP_TO_INT() local
/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1528 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP() local
1573 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI() local
H A DARMISelLowering.cpp6219 EVT DstVT = BC->getValueType(0); CombineVMOVDRRCandidateWithVecOp() local
6273 EVT DstVT = N->getValueType(0); ExpandBITCAST() local
18589 EVT DstVT = N->getValueType(0); PerformBITCASTCombine() local
20938 MVT DstVT = (Sz == 16 ? MVT::f32 : MVT::f64); LowerFP_EXTEND() local
20964 EVT DstVT = Op.getValueType(); LowerFP_ROUND() local
[all...]
/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1093 MVT DstVT, SrcVT; selectFPToInt() local
/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2724 truncateVectorWithNARROW(EVT DstVT,SDValue In,const SDLoc & DL,SelectionDAG & DAG) truncateVectorWithNARROW() argument
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp2887 auto DstVT = TLI->getValueType(DL, Dst); getExtractWithExtendCost() local
H A DAArch64ISelLowering.cpp4460 EVT DstVT = Op.getValueType(); LowerVectorFP_TO_INT_SAT() local
4542 EVT DstVT = Op.getValueType(); LowerFP_TO_INT_SAT() local
21856 EVT DstVT = N->getValueType(0); isHalvingTruncateAndConcatOfLegalIntScalableType() local
22644 isHalvingTruncateOfLegalScalableType(EVT SrcVT,EVT DstVT) isHalvingTruncateOfLegalScalableType() argument
24622 EVT DstVT = N->getValueType(0); performSignExtendInRegCombine() local
[all...]
H A DAArch64ISelDAGToDAG.cpp1489 EVT DstVT = N->getValueType(0); tryIndexedLoad() local
/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2899 MVT DstVT = Op.getSimpleValueType(); lowerFP_TO_INT_SAT() local
5788 MVT DstVT = VT0.changeVectorElementTypeToInteger(); LowerIS_FPCLASS() local
11404 MVT DstVT = Op.getSimpleValueType(); lowerVPFPIntConvOp() local
15326 EVT DstVT = N->getValueType(0); performFP_TO_INT_SATCombine() local
[all...]
/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp1471 EVT DstVT = TLI.getValueType(DL, CI->getType()); OptimizeNoopCopyExpression() local
/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp4209 EVT DstVT = Op.getValueType(); lowerFP_EXTEND() local