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Searched defs:BW (Results 1 – 25 of 42) sorted by relevance

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/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenExtract.cpp161 unsigned BW = Ty->getPrimitiveSizeInBits(); in INITIALIZE_PASS_DEPENDENCY() local
H A DHexagonConstPropagation.cpp1588 unsigned BW = A1.getBitWidth(); in evaluateZEXTi() local
1619 unsigned BW = A1.getBitWidth(); in evaluateSEXTi() local
1684 unsigned BW = A1.getBitWidth(); in evaluateCLBi() local
1719 unsigned BW = A1.getBitWidth(); evaluateCTBi() local
1765 unsigned BW = A1.getBitWidth(); evaluateEXTRACTi() local
1814 unsigned BW = A1.getBitWidth(), SW = Count*Bits; evaluateSplati() local
2152 unsigned BW = getRegBitWidth(R1.Reg); evaluate() local
2751 unsigned BW = getRegBitWidth(DefR.Reg); evaluateHexExt() local
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H A DBitTracker.cpp350 uint16_t BW = getRegBitWidth(RR); in getCell() local
424 uint16_t BW = A.getBitWidth(); in eIMM() local
H A DHexagonBitTracker.cpp295 __anon356067470702(const BT::RegisterCell &Rs, const BT::RegisterCell &Rt, uint16_t BW, bool Odd) evaluate() argument
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H A DHexagonExpandCondsets.cpp1118 isIntReg(RegisterRef RR,unsigned & BW) isIntReg() argument
H A DHexagonBitSimplify.cpp1363 unsigned BN, BW; in processBlock() local
2183 unsigned BN, BW; in genExtractLow() local
/llvm-project/llvm/include/llvm/Analysis/
H A DValueLattice.h290 unsigned BW = Ty->getScalarSizeInBits(); global() variable
/llvm-project/llvm/lib/Transforms/Scalar/
H A DFloat2Int.cpp173 unsigned BW = I->getOperand(0)->getType()->getPrimitiveSizeInBits(); walkBackwards() local
H A DConstantHoisting.cpp543 unsigned BW = V1.getBitWidth() > V2.getBitWidth() ? calculateOffsetDiff() local
/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineNegator.cpp264 unsigned BW = X->getType()->getScalarSizeInBits(); visitImpl() local
/llvm-project/llvm/lib/Transforms/Utils/
H A DLibCallsShrinkWrap.cpp445 unsigned BW = I->getOperand(0)->getType()->getPrimitiveSizeInBits(); in generateCondForPow() local
/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.cpp452 unsigned BW = getScalarOrVectorBitWidth(SpvType); getOrCreateConstVector() local
471 unsigned BW = getScalarOrVectorBitWidth(SpvType); getOrCreateConstVector() local
486 unsigned BW = getScalarOrVectorBitWidth(SpvBaseTy); getOrCreateConstIntArray() local
550 unsigned BW = getScalarOrVectorBitWidth(SpvType); getOrCreateConsIntVector() local
/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp838 unsigned BW = DL.getIndexTypeSizeInBits(PtrOp->getType()); getStrideAndModOffsetOfGEP() local
897 unsigned BW = DL.getIndexTypeSizeInBits(PtrOp->getType()); foldPatternedLoads() local
/llvm-project/llvm/lib/IR/
H A DConstantRange.cpp798 auto BW = getBitWidth(); castOp() local
809 auto BW = getBitWidth(); castOp() local
1574 unsigned BW = getBitWidth(); shl() local
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/llvm-project/llvm/include/llvm/ADT/
H A DBitVector.h809 BitWord BW = Bits[i]; in applyMask() local
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp1200 unsigned BW = VT.getScalarSizeInBits(); ExpandSEXTINREG() local
1601 unsigned BW = VT.getScalarSizeInBits(); ExpandUINT_TO_FLOAT() local
H A DTargetLowering.cpp7841 isNonZeroModBitWidthOrUndef(SDValue Z,unsigned BW) isNonZeroModBitWidthOrUndef() argument
7858 unsigned BW = VT.getScalarSizeInBits(); expandVPFunnelShift() local
7922 unsigned BW = VT.getScalarSizeInBits(); expandFunnelShift() local
9264 unsigned BW = VT.getScalarSizeInBits(); expandAVG() local
10413 unsigned BW = VT.getScalarSizeInBits(); expandShlSat() local
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/llvm-project/offload/DeviceRTL/src/
H A DWorkshare.cpp910 #define OMP_LOOP_ENTRY(BW, TY) \ argument
/llvm-project/llvm/lib/Analysis/
H A DVectorUtils.cpp716 uint64_t BW = bit_width(DB.getDemandedBits(&U).getZExtValue()); computeMinimumValueSizes() local
H A DBasicAliasAnalysis.cpp1296 unsigned BW = OffsetRange.getBitWidth(); aliasGEP() local
/llvm-project/clang/lib/AST/
H A DDeclObjC.cpp1838 Create(ASTContext & C,ObjCContainerDecl * DC,SourceLocation StartLoc,SourceLocation IdLoc,const IdentifierInfo * Id,QualType T,TypeSourceInfo * TInfo,AccessControl ac,Expr * BW,bool synthesized) Create() argument
1913 Create(ASTContext & C,DeclContext * DC,SourceLocation StartLoc,SourceLocation IdLoc,IdentifierInfo * Id,QualType T,Expr * BW) Create() argument
/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPromoteAlloca.cpp404 unsigned BW = DL.getIndexTypeSizeInBits(GEP->getType()); in GEPToVectorIndex() local
/llvm-project/clang/include/clang/AST/
H A DDeclObjC.h1961 ObjCIvarDecl(ObjCContainerDecl * DC,SourceLocation StartLoc,SourceLocation IdLoc,const IdentifierInfo * Id,QualType T,TypeSourceInfo * TInfo,AccessControl ac,Expr * BW,bool synthesized) ObjCIvarDecl() argument
2031 ObjCAtDefsFieldDecl(DeclContext * DC,SourceLocation StartLoc,SourceLocation IdLoc,IdentifierInfo * Id,QualType T,Expr * BW) ObjCAtDefsFieldDecl() argument
/llvm-project/llvm/utils/TableGen/
H A DDecoderEmitter.cpp436 FilterChooser(ArrayRef<EncodingAndInst> Insts,const std::vector<EncodingIDAndOpcode> & IDs,const std::map<unsigned,std::vector<OperandInfo>> & Ops,unsigned BW,const DecoderEmitter * E) FilterChooser() argument
/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp6490 isNonZeroModBitWidthOrUndef(const MachineRegisterInfo & MRI,Register Reg,unsigned BW) isNonZeroModBitWidthOrUndef() argument
6507 unsigned BW = Ty.getScalarSizeInBits(); lowerFunnelShiftWithInverse() local
6546 const unsigned BW = Ty.getScalarSizeInBits(); lowerFunnelShiftAsShifts() local
7927 unsigned BW = Ty.getScalarSizeInBits(); lowerShlSat() local
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