| /llvm-project/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 75 tryAddingSymbolicOperand(int64_t Value,bool IsBranch,uint64_t Address,uint64_t Offset,uint64_t Width,MCInst & MI,const MCDisassembler * Decoder) tryAddingSymbolicOperand() argument
98 DecodeGR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR32BitRegisterClass() argument
104 DecodeGRH32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGRH32BitRegisterClass() argument
110 DecodeGR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR64BitRegisterClass() argument
116 DecodeGR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR128BitRegisterClass() argument
122 DecodeADDR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR32BitRegisterClass() argument
128 DecodeADDR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR64BitRegisterClass() argument
134 DecodeFP32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP32BitRegisterClass() argument
140 DecodeFP64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP64BitRegisterClass() argument
146 DecodeFP128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP128BitRegisterClass() argument
152 DecodeVR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR32BitRegisterClass() argument
158 DecodeVR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR64BitRegisterClass() argument
164 DecodeVR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR128BitRegisterClass() argument
170 DecodeAR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeAR32BitRegisterClass() argument
176 DecodeCR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCR64BitRegisterClass() argument
198 decodeU1ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU1ImmOperand() argument
204 decodeU2ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU2ImmOperand() argument
210 decodeU3ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU3ImmOperand() argument
216 decodeU4ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU4ImmOperand() argument
222 decodeU8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU8ImmOperand() argument
228 decodeU12ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU12ImmOperand() argument
234 decodeU16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU16ImmOperand() argument
240 decodeU32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU32ImmOperand() argument
246 decodeS8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS8ImmOperand() argument
252 decodeS16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS16ImmOperand() argument
258 decodeS20ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS20ImmOperand() argument
264 decodeS32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS32ImmOperand() argument
271 decodeLenOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeLenOperand() argument
281 decodePCDBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,bool isBranch,const MCDisassembler * Decoder) decodePCDBLOperand() argument
294 decodePC12DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC12DBLBranchOperand() argument
300 decodePC16DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC16DBLBranchOperand() argument
306 decodePC24DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC24DBLBranchOperand() argument
312 decodePC32DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLBranchOperand() argument
318 decodePC32DBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLOperand() argument
327 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction() argument
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 93 uint64_t Address, in DecodeCRRCRegisterClass()
99 uint64_t Address, in DecodeCRBITRCRegisterClass()
105 uint64_t Address, in DecodeF4RCRegisterClass()
111 uint64_t Address, in DecodeF8RCRegisterClass()
117 uint64_t Address, in DecodeFpRCRegisterClass()
125 uint64_t Address, in DecodeVFRCRegisterClass()
131 uint64_t Address, in DecodeVRRCRegisterClass()
137 uint64_t Address, in DecodeVSRCRegisterClass()
143 uint64_t Address, in DecodeVSFRCRegisterClass()
149 uint64_t Address, in DecodeVSSRCRegisterClass()
[all …]
|
| /llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 353 DecodeUImmWithOffset(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeUImmWithOffset() argument
527 DecodeINSVE_DF(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeINSVE_DF() argument
576 DecodeDAHIDATIMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDAHIDATIMMR6() argument
590 DecodeDAHIDATI(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDAHIDATI() argument
605 DecodeAddiGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddiGroupBranch() argument
644 DecodePOP35GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP35GroupBranchMMR6() argument
678 DecodeDaddiGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDaddiGroupBranch() argument
717 DecodePOP37GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP37GroupBranchMMR6() argument
751 DecodePOP65GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP65GroupBranchMMR6() argument
790 DecodePOP75GroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodePOP75GroupBranchMMR6() argument
829 DecodeBlezlGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezlGroupBranch() argument
872 DecodeBgtzlGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzlGroupBranch() argument
916 DecodeBgtzGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzGroupBranch() argument
965 DecodeBlezGroupBranch(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezGroupBranch() argument
1008 DecodeDEXT(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDEXT() argument
1050 DecodeDINS(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDINS() argument
1092 DecodeCRC(MCInst & MI,InsnType Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCRC() argument
1107 readInstruction16(ArrayRef<uint8_t> Bytes,uint64_t Address,uint64_t & Size,uint32_t & Insn,bool IsBigEndian) readInstruction16() argument
1127 readInstruction32(ArrayRef<uint8_t> Bytes,uint64_t Address,uint64_t & Size,uint32_t & Insn,bool IsBigEndian,bool IsMicroMips) readInstruction32() argument
1163 getInstruction(MCInst & Instr,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CStream) const getInstruction() argument
1338 DecodeCPU16RegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCPU16RegsRegisterClass() argument
1344 DecodeGPR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR64RegisterClass() argument
1355 DecodeGPRMM16RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16RegisterClass() argument
1365 DecodeGPRMM16ZeroRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16ZeroRegisterClass() argument
1375 DecodeGPRMM16MovePRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRMM16MovePRegisterClass() argument
1385 DecodeGPR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR32RegisterClass() argument
1395 DecodePtrRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodePtrRegisterClass() argument
1404 DecodeDSPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDSPRRegisterClass() argument
1410 DecodeFGR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGR64RegisterClass() argument
1421 DecodeFGR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGR32RegisterClass() argument
1432 DecodeCCRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCCRRegisterClass() argument
1442 DecodeFCCRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFCCRegisterClass() argument
1452 DecodeFGRCCRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFGRCCRegisterClass() argument
1462 DecodeMem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMem() argument
1482 DecodeMemEVA(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemEVA() argument
1502 DecodeLoadByte15(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLoadByte15() argument
1518 DecodeCacheOp(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheOp() argument
1534 DecodeCacheOpMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheOpMM() argument
1550 DecodePrefeOpMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodePrefeOpMM() argument
1566 DecodeCacheeOp_CacheOpR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCacheeOp_CacheOpR6() argument
1581 DecodeSyncI(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSyncI() argument
1595 DecodeSyncI_MM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSyncI_MM() argument
1608 DecodeSynciR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSynciR6() argument
1622 DecodeMSA128Mem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128Mem() argument
1669 DecodeMemMMImm4(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm4() argument
1726 DecodeMemMMSPImm5Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMSPImm5Lsl2() argument
1741 DecodeMemMMGPImm7Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMGPImm7Lsl2() argument
1756 DecodeMemMMReglistImm4Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMReglistImm4Lsl2() argument
1780 DecodeMemMMImm9(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm9() argument
1800 DecodeMemMMImm12(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm12() argument
1834 DecodeMemMMImm16(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMMImm16() argument
1850 DecodeFMem(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem() argument
1867 DecodeFMemMMR2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemMMR2() argument
1885 DecodeFMem2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem2() argument
1901 DecodeFMem3(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMem3() argument
1918 DecodeFMemCop2R6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemCop2R6() argument
1935 DecodeFMemCop2MMR6(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFMemCop2MMR6() argument
1952 DecodeSpecial3LlSc(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSpecial3LlSc() argument
1973 DecodeHWRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHWRegsRegisterClass() argument
1983 DecodeAFGR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeAFGR64RegisterClass() argument
1994 DecodeACC64DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeACC64DSPRegisterClass() argument
2005 DecodeHI32DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHI32DSPRegisterClass() argument
2016 DecodeLO32DSPRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLO32DSPRegisterClass() argument
2027 DecodeMSA128BRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128BRegisterClass() argument
2038 DecodeMSA128HRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128HRegisterClass() argument
2049 DecodeMSA128WRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128WRegisterClass() argument
2060 DecodeMSA128DRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSA128DRegisterClass() argument
2071 DecodeMSACtrlRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMSACtrlRegisterClass() argument
2082 DecodeCOP0RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCOP0RegisterClass() argument
2093 DecodeCOP2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCOP2RegisterClass() argument
2104 DecodeBranchTarget(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget() argument
2112 DecodeBranchTarget1SImm16(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget1SImm16() argument
2120 DecodeJumpTarget(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTarget() argument
2128 DecodeBranchTarget21(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget21() argument
2137 DecodeBranchTarget21MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget21MM() argument
2146 DecodeBranchTarget26(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget26() argument
2155 DecodeBranchTarget7MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget7MM() argument
2163 DecodeBranchTarget10MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget10MM() argument
2171 DecodeBranchTargetMM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTargetMM() argument
2179 DecodeBranchTarget26MM(MCInst & Inst,unsigned Offset,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchTarget26MM() argument
2188 DecodeJumpTargetMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTargetMM() argument
2196 DecodeJumpTargetXMM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeJumpTargetXMM() argument
2204 DecodeAddiur2Simm7(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeAddiur2Simm7() argument
2216 DecodeLi16Imm(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeLi16Imm() argument
2226 DecodePOOL16BEncodedField(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodePOOL16BEncodedField() argument
2234 DecodeUImmWithOffsetAndScale(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeUImmWithOffsetAndScale() argument
2244 DecodeSImmWithOffsetAndScale(MCInst & Inst,unsigned Value,uint64_t Address,const MCDisassembler * Decoder) DecodeSImmWithOffsetAndScale() argument
2251 DecodeInsSize(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeInsSize() argument
2263 DecodeSimm19Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm19Lsl2() argument
2270 DecodeSimm18Lsl3(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm18Lsl3() argument
2276 DecodeSimm9SP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm9SP() argument
2291 DecodeANDI16Imm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeANDI16Imm() argument
2302 DecodeRegListOperand(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand() argument
2330 DecodeRegListOperand16(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand16() argument
2354 DecodeMovePOperands(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMovePOperands() argument
2380 DecodeMovePRegPair(MCInst & Inst,unsigned RegPair,uint64_t Address,const MCDisassembler * Decoder) DecodeMovePRegPair() argument
2423 DecodeSimm23Lsl2(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSimm23Lsl2() argument
2431 DecodeBgtzGroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBgtzGroupBranchMMR6() argument
2480 DecodeBlezGroupBranchMMR6(MCInst & MI,InsnType insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBlezGroupBranchMMR6() argument
2525 DecodeFIXMEInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeFIXMEInstruction() argument
[all...] |
| /llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 68 DecodeARRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeARRegisterClass() argument
81 DecodeSRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeSRRegisterClass() argument
98 tryAddingSymbolicOperand(int64_t Value,bool isBranch,uint64_t Address,uint64_t Offset,uint64_t InstSize,MCInst & MI,const void * Decoder) tryAddingSymbolicOperand() argument
107 decodeCallOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeCallOperand() argument
114 decodeJumpOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeJumpOperand() argument
121 decodeBranchOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeBranchOperand() argument
142 decodeL32ROperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeL32ROperand() argument
151 decodeImm8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm8Operand() argument
158 decodeImm8_sh8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm8_sh8Operand() argument
166 decodeImm12Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm12Operand() argument
173 decodeUimm4Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeUimm4Operand() argument
180 decodeUimm5Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeUimm5Operand() argument
187 decodeImm1_16Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm1_16Operand() argument
194 decodeShimm1_31Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeShimm1_31Operand() argument
204 decodeB4constOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeB4constOperand() argument
214 decodeB4constuOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeB4constuOperand() argument
223 decodeMem8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem8Operand() argument
231 decodeMem16Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem16Operand() argument
239 decodeMem32Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem32Operand() argument
247 readInstruction24(ArrayRef<uint8_t> Bytes,uint64_t Address,uint64_t & Size,uint32_t & Insn,bool IsLittleEndian) readInstruction24() argument
270 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction() argument
[all...] |
| /llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 109 uint64_t Address, in DecodeGPRRegisterClass()
119 uint64_t Address, in DecodeFPR32RegisterClass()
129 uint64_t Address, in DecodesFPR32RegisterClass()
139 uint64_t Address, in DecodesFPR64RegisterClass()
149 uint64_t Address, in DecodesFPR64_VRegisterClass()
159 uint64_t Address, in DecodeFPR64RegisterClass()
171 uint64_t Address, in DecodesFPR128RegisterClass()
181 uint64_t Address, in DecodesGPRRegisterClass()
191 uint64_t Address, in DecodemGPRRegisterClass()
203 uint64_t Address, in DecodeGPRSPRegisterClass()
[all …]
|
| /llvm-project/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 128 uint64_t Address, in DecodeI32RegisterClass()
138 uint64_t Address, in DecodeI64RegisterClass()
148 uint64_t Address, in DecodeF32RegisterClass()
158 uint64_t Address, in DecodeF128RegisterClass()
168 uint64_t Address, in DecodeV64RegisterClass()
182 uint64_t Address, in DecodeVMRegisterClass()
192 uint64_t Address, in DecodeVM512RegisterClass()
202 uint64_t Address, in DecodeMISCRegisterClass()
268 static DecodeStatus readInstruction64(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction64()
292 uint64_t Address, in getInstruction()
[all …]
|
| /llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 72 DecodeGPRRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRRegisterClass() argument
85 DecodeGPRX1X5RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRX1X5RegisterClass() argument
96 DecodeFPR16RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR16RegisterClass() argument
107 DecodeFPR32RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR32RegisterClass() argument
118 DecodeFPR32CRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR32CRegisterClass() argument
129 DecodeFPR64RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR64RegisterClass() argument
140 DecodeFPR64CRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR64CRegisterClass() argument
151 DecodeGPRNoX0RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRNoX0RegisterClass() argument
161 DecodeGPRNoX0X2RegisterClass(MCInst & Inst,uint64_t RegNo,uint32_t Address,const MCDisassembler * Decoder) DecodeGPRNoX0X2RegisterClass() argument
171 DecodeGPRCRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRCRegisterClass() argument
182 DecodeGPRPairRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairRegisterClass() argument
193 DecodeSR07RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const void * Decoder) DecodeSR07RegisterClass() argument
204 DecodeVRRegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVRRegisterClass() argument
215 DecodeVRM2RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVRM2RegisterClass() argument
232 DecodeVRM4RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVRM4RegisterClass() argument
249 DecodeVRM8RegisterClass(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVRM8RegisterClass() argument
266 decodeVMaskReg(MCInst & Inst,uint32_t RegNo,uint64_t Address,const MCDisassembler * Decoder) decodeVMaskReg() argument
279 decodeUImmOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeUImmOperand() argument
288 decodeUImmNonZeroOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeUImmNonZeroOperand() argument
297 decodeSImmOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeSImmOperand() argument
307 decodeSImmNonZeroOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeSImmNonZeroOperand() argument
316 decodeSImmOperandAndLsl1(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeSImmOperandAndLsl1() argument
327 decodeCLUIImmOperand(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeCLUIImmOperand() argument
337 decodeFRMArg(MCInst & Inst,uint32_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeFRMArg() argument
387 decodeRVCInstrRdRs1ImmZero(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1ImmZero() argument
399 decodeCSSPushPopchk(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeCSSPushPopchk() argument
409 decodeRVCInstrRdSImm(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdSImm() argument
421 decodeRVCInstrRdRs1UImm(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1UImm() argument
434 decodeRVCInstrRdRs2(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs2() argument
444 decodeRVCInstrRdRs1Rs2(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1Rs2() argument
455 decodeXTHeadMemPair(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeXTHeadMemPair() argument
481 decodeZcmpRlist(MCInst & Inst,uint32_t Imm,uint64_t Address,const void * Decoder) decodeZcmpRlist() argument
488 decodeRegReg(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRegReg() argument
498 decodeZcmpSpimm(MCInst & Inst,uint32_t Imm,uint64_t Address,const void * Decoder) decodeZcmpSpimm() argument
536 getInstruction32(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction32() argument
630 getInstruction16(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction16() argument
657 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction() argument
[all...] |
| /llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 59 DecodeGPRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRRegisterClass() argument
68 DecodeFPR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR32RegisterClass() argument
77 DecodeFPR64RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPR64RegisterClass() argument
86 DecodeCFRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCFRRegisterClass() argument
95 DecodeFCSRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFCSRRegisterClass() argument
104 DecodeLSX128RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLSX128RegisterClass() argument
113 DecodeLASX256RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLASX256RegisterClass() argument
122 DecodeSCRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSCRRegisterClass() argument
132 decodeUImmOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeUImmOperand() argument
141 decodeSImmOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const MCDisassembler * Decoder) decodeSImmOperand() argument
154 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction() argument
[all...] |
| /llvm-project/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 71 DecodeGPR8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPR8RegisterClass() argument
82 DecodeLD8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeLD8RegisterClass() argument
142 decodeFIOARr(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFIOARr() argument
155 decodeFIORdA(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFIORdA() argument
168 decodeFIOBIT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFIOBIT() argument
178 decodeCallTarget(MCInst & Inst,unsigned Field,uint64_t Address,const MCDisassembler * Decoder) decodeCallTarget() argument
186 decodeFRd(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFRd() argument
195 decodeFLPMX(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFLPMX() argument
204 decodeFFMULRdRr(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFFMULRdRr() argument
218 decodeFMOVWRdRr(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFMOVWRdRr() argument
231 decodeFWRdK(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFWRdK() argument
248 decodeFMUL2RdRr(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFMUL2RdRr() argument
261 decodeMemri(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeMemri() argument
278 decodeFBRk(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeFBRk() argument
298 decodeCondBranch(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeCondBranch() argument
332 decodeLoadStore(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) decodeLoadStore() argument
436 readInstruction16(ArrayRef<uint8_t> Bytes,uint64_t Address,uint64_t & Size,uint32_t & Insn) readInstruction16() argument
449 readInstruction32(ArrayRef<uint8_t> Bytes,uint64_t Address,uint64_t & Size,uint32_t & Insn) readInstruction32() argument
478 getInstruction(MCInst & Instr,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CStream) const getInstruction() argument
[all...] |
| /llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 142 uint64_t Address, in DecodeIntRegsRegisterClass()
152 uint64_t Address, in DecodeI64RegsRegisterClass()
160 uint64_t Address, in DecodePointerLikeRegClass0()
166 uint64_t Address, in DecodeFPRegsRegisterClass()
176 uint64_t Address, in DecodeDFPRegsRegisterClass()
186 uint64_t Address, in DecodeQFPRegsRegisterClass()
199 DecodeCoprocRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeCoprocRegsRegisterClass()
209 uint64_t Address, in DecodeFCCRegsRegisterClass()
218 uint64_t Address, in DecodeASRRegsRegisterClass()
227 uint64_t Address, in DecodePRRegsRegisterClass()
[all …]
|
| /llvm-project/llvm/lib/Target/M68k/Disassembler/ |
| H A D | M68kDisassembler.cpp | 43 uint64_t Address, const void *Decoder) { in DecodeRegisterClass() argument
51 uint64_t Address, in DecodeDR32RegisterClass() argument
57 uint64_t Address, in DecodeDR16RegisterClass() argument
63 uint64_t Address, in DecodeDR8RegisterClass() argument
69 uint64_t Address, in DecodeAR32RegisterClass() argument
75 uint64_t Address, in DecodeAR16RegisterClass() argument
81 DecodeXR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeXR32RegisterClass() argument
87 DecodeXR16RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeXR16RegisterClass() argument
93 DecodeFPDRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeFPDRRegisterClass() argument
102 DecodeFPCSCRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeFPCSCRegisterClass() argument
109 DecodeCCRCRegisterClass(MCInst & Inst,APInt & Insn,uint64_t Address,const void * Decoder) DecodeCCRCRegisterClass() argument
114 DecodeImm32(MCInst & Inst,uint64_t Imm,uint64_t Address,const void * Decoder) DecodeImm32() argument
140 getInstruction(MCInst & Instr,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CStream) const getInstruction() argument
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| /llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 717 checkDecodedInstruction(MCInst & MI,uint64_t & Size,uint64_t Address,raw_ostream & CS,uint32_t Insn,DecodeStatus Result) checkDecodedInstruction() argument
777 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction() argument
786 getARMInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getARMInstruction() argument
859 tryAddingSymbolicOperand(uint64_t Address,int32_t Value,bool isBranch,uint64_t InstSize,MCInst & MI,const MCDisassembler * Decoder) tryAddingSymbolicOperand() argument
878 tryAddingPcLoadReferenceComment(uint64_t Address,int Value,const MCDisassembler * Decoder) tryAddingPcLoadReferenceComment() argument
1072 getThumbInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getThumbInstruction() argument
1297 DecodeGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRRegisterClass() argument
1308 DecodeCLRMGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCLRMGPRRegisterClass() argument
1322 DecodeGPRnopcRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRnopcRegisterClass() argument
1335 DecodeGPRnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRnospRegisterClass() argument
1348 DecodeGPRwithAPSRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithAPSRRegisterClass() argument
1363 DecodeGPRwithZRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithZRRegisterClass() argument
1381 DecodeGPRwithZRnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithZRnospRegisterClass() argument
1391 DecodetGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPRRegisterClass() argument
1404 DecodeGPRPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairRegisterClass() argument
1422 DecodeGPRPairnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairnospRegisterClass() argument
1436 DecodeGPRspRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRspRegisterClass() argument
1447 DecodetcGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetcGPRRegisterClass() argument
1478 DecoderGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecoderGPRRegisterClass() argument
1504 DecodeSPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSPRRegisterClass() argument
1515 DecodeHPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHPRRegisterClass() argument
1532 DecodeDPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPRRegisterClass() argument
1548 DecodeDPR_8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPR_8RegisterClass() argument
1556 DecodeSPR_8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSPR_8RegisterClass() argument
1564 DecodeDPR_VFP2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPR_VFP2RegisterClass() argument
1579 DecodeQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeQPRRegisterClass() argument
1600 DecodeDPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPairRegisterClass() argument
1622 DecodeDPairSpacedRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPairSpacedRegisterClass() argument
1633 DecodePredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePredicateOperand() argument
1653 DecodeCCOutOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeCCOutOperand() argument
1663 DecodeSORegImmOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegImmOperand() argument
1701 DecodeSORegRegOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegRegOperand() argument
1737 DecodeRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand() argument
1785 DecodeSPRRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSPRRegListOperand() argument
1810 DecodeDPRRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeDPRRegListOperand() argument
1836 DecodeBitfieldMaskOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBitfieldMaskOperand() argument
1864 DecodeCopMemInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCopMemInstruction() argument
2043 DecodeAddrMode2IdxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode2IdxInstruction() argument
2149 DecodeSORegMemOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegMemOperand() argument
2193 DecodeTSBInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSBInstruction() argument
2206 DecodeAddrMode3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode3Instruction() argument
2398 DecodeRFEInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRFEInstruction() argument
2428 DecodeQADDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeQADDInstruction() argument
2453 DecodeMemMultipleWritebackInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMultipleWritebackInstruction() argument
2545 DecodeHINTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeHINTInstruction() argument
2568 DecodeCPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCPSInstruction() argument
2616 DecodeT2CPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2CPSInstruction() argument
2659 DecodeT2HintSpaceInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2HintSpaceInstruction() argument
2684 DecodeT2MOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2MOVTWInstruction() argument
2709 DecodeArmMOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeArmMOVTWInstruction() argument
2737 DecodeSMLAInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSMLAInstruction() argument
2766 DecodeTSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSTInstruction() argument
2788 DecodeSETPANInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSETPANInstruction() argument
2817 DecodeAddrModeImm12Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrModeImm12Operand() argument
2838 DecodeAddrMode5Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode5Operand() argument
2859 DecodeAddrMode5FP16Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode5FP16Operand() argument
2880 DecodeAddrMode7Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode7Operand() argument
2886 DecodeT2BInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BInstruction() argument
2913 DecodeBranchImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchImmInstruction() argument
2943 DecodeAddrMode6Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode6Operand() argument
2961 DecodeVLDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDInstruction() argument
3238 DecodeVLDST1Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST1Instruction() argument
3252 DecodeVLDST2Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST2Instruction() argument
3268 DecodeVLDST3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST3Instruction() argument
3282 DecodeVLDST4Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST4Instruction() argument
3293 DecodeVSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTInstruction() argument
3564 DecodeVLD1DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1DupInstruction() argument
3612 DecodeVLD2DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2DupInstruction() argument
3661 DecodeVLD3DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3DupInstruction() argument
3697 DecodeVLD4DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4DupInstruction() argument
3750 DecodeVMOVModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVModImmInstruction() argument
3796 DecodeMVEModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEModImmInstruction() argument
3825 DecodeMVEVADCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVADCInstruction() argument
3851 DecodeVSHLMaxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSHLMaxInstruction() argument
3871 DecodeShiftRight8Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight8Imm() argument
3878 DecodeShiftRight16Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight16Imm() argument
3885 DecodeShiftRight32Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight32Imm() argument
3892 DecodeShiftRight64Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight64Imm() argument
3899 DecodeTBLInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTBLInstruction() argument
3936 DecodeThumbAddSpecialReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSpecialReg() argument
3961 DecodeThumbBROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBROperand() argument
3970 DecodeT2BROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BROperand() argument
3979 DecodeThumbCmpBROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCmpBROperand() argument
3988 DecodeThumbAddrModeRR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeRR() argument
4004 DecodeThumbAddrModeIS(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeIS() argument
4019 DecodeThumbAddrModePC(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModePC() argument
4030 DecodeThumbAddrModeSP(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeSP() argument
4039 DecodeT2AddrModeSOReg(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeSOReg() argument
4069 DecodeT2LoadShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadShift() argument
4153 DecodeT2LoadImm8(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm8() argument
4238 DecodeT2LoadImm12(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm12() argument
4318 DecodeT2LoadT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadT() argument
4358 DecodeT2LoadLabel(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadLabel() argument
4411 DecodeT2Imm8S4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm8S4() argument
4425 DecodeT2Imm7S4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm7S4() argument
4441 DecodeT2AddrModeImm8s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm8s4() argument
4457 DecodeT2AddrModeImm7s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm7s4() argument
4473 DecodeT2AddrModeImm0_1020s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm0_1020s4() argument
4488 DecodeT2Imm8(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm8() argument
4501 DecodeT2Imm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm7() argument
4516 DecodeT2AddrModeImm8(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm8() argument
4564 DecodeTAddrModeImm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeTAddrModeImm7() argument
4581 DecodeT2AddrModeImm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm7() argument
4599 DecodeT2LdStPre(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LdStPre() argument
4661 DecodeT2AddrModeImm12(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm12() argument
4688 DecodeThumbAddSPImm(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPImm() argument
4700 DecodeThumbAddSPReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPReg() argument
4726 DecodeThumbCPS(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCPS() argument
4738 DecodePostIdxReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodePostIdxReg() argument
4752 DecodeMveAddrModeRQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeRQ() argument
4768 DecodeMveAddrModeQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeQ() argument
4791 DecodeThumbBLXOffset(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBLXOffset() argument
4816 DecodeCoprocessor(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeCoprocessor() argument
4832 DecodeThumbTableBranch(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbTableBranch() argument
4850 DecodeThumb2BCCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumb2BCCInstruction() argument
4892 DecodeT2SOImm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2SOImm() argument
4924 DecodeThumbBCCTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBCCTargetOperand() argument
4933 DecodeThumbBLTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBLTargetOperand() argument
4957 DecodeMemBarrierOption(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMemBarrierOption() argument
4967 DecodeInstSyncBarrierOption(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeInstSyncBarrierOption() argument
4976 DecodeMSRMask(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMSRMask() argument
5078 DecodeBankedReg(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBankedReg() argument
5094 DecodeDoubleRegLoad(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegLoad() argument
5116 DecodeDoubleRegStore(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegStore() argument
5142 DecodeLDRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreImm() argument
5168 DecodeLDRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreReg() argument
5196 DecodeSTRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreImm() argument
5222 DecodeSTRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreReg() argument
5247 DecodeVLD1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1LN() argument
5314 DecodeVST1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST1LN() argument
5379 DecodeVLD2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2LN() argument
5446 DecodeVST2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST2LN() argument
5509 DecodeVLD3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3LN() argument
5579 DecodeVST3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST3LN() argument
5642 DecodeVLD4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4LN() argument
5723 DecodeVST4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST4LN() argument
5795 DecodeVMOVSRR(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVSRR() argument
5821 DecodeVMOVRRS(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVRRS() argument
5847 DecodeIT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeIT() argument
5877 DecodeT2LDRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LDRDPreInstruction() argument
5914 DecodeT2STRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2STRDPreInstruction() argument
5948 DecodeT2Adr(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Adr() argument
5975 DecodeT2ShifterImmOperand(MCInst & Inst,uint32_t Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2ShifterImmOperand() argument
5985 DecodeSwap(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSwap() argument
6012 DecodeVCVTD(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTD() argument
6071 DecodeVCVTQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTQ() argument
6132 DecodeNEONComplexLane64Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeNEONComplexLane64Instruction() argument
6163 DecodeLDR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeLDR() argument
6191 DecoderForMRRC2AndMCRR2(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecoderForMRRC2AndMCRR2() argument
6237 DecodeForVMRSandVMSR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeForVMRSandVMSR() argument
6289 DecodeBFLabelOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBFLabelOperand() argument
6308 DecodeBFAfterTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBFAfterTargetOperand() argument
6320 DecodePredNoALOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePredNoALOperand() argument
6328 DecodeLOLoop(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLOLoop() argument
6391 DecodeLongShiftOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeLongShiftOperand() argument
6404 DecodetGPROddRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPROddRegisterClass() argument
6415 DecodetGPREvenRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPREvenRegisterClass() argument
6427 DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithAPSR_NZCVnospRegisterClass() argument
6443 DecodeVSCCLRM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSCCLRM() argument
6470 DecodeMQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQPRRegisterClass() argument
6486 DecodeMQQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQQPRRegisterClass() argument
6502 DecodeMQQQQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQQQQPRRegisterClass() argument
6513 DecodeVPTMaskOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVPTMaskOperand() argument
6544 DecodeVpredROperand(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVpredROperand() argument
6557 DecodeVpredNOperand(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVpredNOperand() argument
6568 DecodeRestrictedIPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedIPredicateOperand() argument
6575 DecodeRestrictedSPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedSPredicateOperand() argument
6597 DecodeRestrictedUPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedUPredicateOperand() argument
6604 DecodeRestrictedFPPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedFPPredicateOperand() argument
6635 DecodeVCVTImmOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTImmOperand() argument
6679 DecodeVSTRVLDR_SYSREG(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTRVLDR_SYSREG() argument
6722 DecodeMVE_MEM_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder,unsigned Rn,OperandDecoder RnDecoder,OperandDecoder AddrDecoder) DecodeMVE_MEM_pre() argument
6743 DecodeMVE_MEM_1_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_1_pre() argument
6753 DecodeMVE_MEM_2_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_2_pre() argument
6763 DecodeMVE_MEM_3_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_3_pre() argument
6773 DecodePowerTwoOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePowerTwoOperand() argument
6786 DecodeMVEPairVectorIndexOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEPairVectorIndexOperand() argument
6796 DecodeMVEVMOVQtoDReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVQtoDReg() argument
6820 DecodeMVEVMOVDRegtoQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVDRegtoQ() argument
6846 DecodeMVEOverlappingLongShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEOverlappingLongShift() argument
6926 DecodeMVEVCVTt1fp(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCVTt1fp() argument
6946 DecodeMVEVCMP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCMP() argument
6983 DecodeMveVCTP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveVCTP() argument
6994 DecodeMVEVPNOT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVPNOT() argument
7003 DecodeT2AddSubSPImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddSubSPImm() argument
7038 DecodeLazyLoadStoreMul(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLazyLoadStoreMul() argument
[all...] |
| /llvm-project/llvm/lib/DebugInfo/BTF/ |
| H A D | BTFContext.cpp | 23 DILineInfo BTFContext::getLineInfoForAddress(SectionedAddress Address, in getLineInfoForAddress()
37 DILineInfo BTFContext::getLineInfoForDataAddress(SectionedAddress Address) { in getLineInfoForDataAddress()
43 BTFContext::getLineInfoForAddressRange(SectionedAddress Address, uint64_t Size, in getLineInfoForAddressRange()
51 BTFContext::getInliningInfoForAddress(SectionedAddress Address, in getInliningInfoForAddress()
57 std::vector<DILocal> BTFContext::getLocalsForAddress(SectionedAddress Address) { in getLocalsForAddress()
|
| /llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 50 static bool readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction32()
59 static bool readInstruction64(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction64()
69 static bool readInstruction48(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction48()
78 static bool readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction16()
132 uint64_t Address, in DecodeGPR32RegisterClass()
145 uint64_t Address, in DecodeGBR32ShortRegister()
169 static DecodeStatus DecodeMEMrs9(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMEMrs9()
179 static bool DecodeSymbolicOperand(MCInst &Inst, uint64_t Address, in DecodeSymbolicOperand()
187 static void DecodeSymbolicOperandOff(MCInst &Inst, uint64_t Address, in DecodeSymbolicOperandOff()
198 uint64_t Address, in DecodeBranchTargetS()
[all …]
|
| /llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 44 static bool readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction16()
56 static bool readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction32()
177 uint64_t Address, in DecodeGRRegsRegisterClass()
187 uint64_t Address, in DecodeRRegsRegisterClass()
197 uint64_t Address, in DecodeBitpOperand()
209 uint64_t Address, in DecodeNegImmOperand()
250 uint64_t Address, in Decode2OpInstructionFail()
320 uint64_t Address, in Decode2RInstruction()
333 uint64_t Address, in Decode2RImmInstruction()
346 uint64_t Address, in DecodeR2RInstruction()
[all …]
|
| /llvm-project/llvm/lib/DebugInfo/PDB/ |
| H A D | PDBContext.cpp | 35 DILineInfo PDBContext::getLineInfoForAddress(object::SectionedAddress Address, in getLineInfoForAddress()
68 PDBContext::getLineInfoForDataAddress(object::SectionedAddress Address) { in getLineInfoForDataAddress()
75 PDBContext::getLineInfoForAddressRange(object::SectionedAddress Address, in getLineInfoForAddressRange()
95 PDBContext::getInliningInfoForAddress(object::SectionedAddress Address, in getInliningInfoForAddress()
139 PDBContext::getLocalsForAddress(object::SectionedAddress Address) { in getLocalsForAddress()
143 std::string PDBContext::getFunctionName(uint64_t Address, in getFunctionName()
|
| /llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 133 ArrayRef<uint8_t> Bytes, uint64_t Address, in getInstruction()
175 uint64_t Address, in decodeRiMemoryValue()
188 uint64_t Address, in decodeRrMemoryValue()
201 uint64_t Address, in decodeSplsValue()
214 uint64_t Address, uint64_t Offset, in tryAddingSymbolicOperand()
221 static DecodeStatus decodeBranch(MCInst &MI, unsigned Insn, uint64_t Address, in decodeBranch()
230 uint64_t Address, in decodeShiftImm()
239 uint64_t Address, in decodePredicateOperand()
|
| /llvm-project/llvm/tools/llvm-profgen/ |
| H A D | ProfiledBinary.h | 62 uint64_t Address; member
370 setBaseAddress(uint64_t Address) setBaseAddress() argument
375 canonicalizeVirtualAddress(uint64_t Address) canonicalizeVirtualAddress() argument
393 getInstSize(uint64_t Address) getInstSize() argument
400 addressIsCode(uint64_t Address) addressIsCode() argument
404 addressIsCall(uint64_t Address) addressIsCall() argument
407 addressIsReturn(uint64_t Address) addressIsReturn() argument
410 addressInPrologEpilog(uint64_t Address) addressInPrologEpilog() argument
414 addressIsTransfer(uint64_t Address) addressIsTransfer() argument
446 getIndexForAddr(uint64_t Address) getIndexForAddr() argument
461 findFuncRangeForStartAddr(uint64_t Address) findFuncRangeForStartAddr() argument
469 findFuncRange(uint64_t Address) findFuncRange() argument
482 getRanges(uint64_t Address) getRanges() argument
543 getInlineLeafFrameLoc(uint64_t Address) getInlineLeafFrameLoc() argument
572 getCallProbeForAddr(uint64_t Address) getCallProbeForAddr() argument
[all...] |
| /llvm-project/lldb/source/Plugins/ObjectFile/Breakpad/ |
| H A D | BreakpadRecords.h | 124 FuncRecord(bool Multiple, lldb::addr_t Address, lldb::addr_t Size, in FuncRecord()
130 lldb::addr_t Address; variable
162 LineRecord(lldb::addr_t Address, lldb::addr_t Size, uint32_t LineNum, in LineRecord()
167 lldb::addr_t Address; variable
179 PublicRecord(bool Multiple, lldb::addr_t Address, lldb::addr_t ParamSize, in PublicRecord()
185 lldb::addr_t Address; variable
196 StackCFIRecord(lldb::addr_t Address, std::optional<lldb::addr_t> Size, in StackCFIRecord()
201 lldb::addr_t Address; variable
|
| /llvm-project/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 74 DecodeGR8RegisterClass(MCInst & MI,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR8RegisterClass() argument
92 DecodeGR16RegisterClass(MCInst & MI,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR16RegisterClass() argument
111 DecodeCGImm(MCInst & MI,uint64_t Bits,uint64_t Address,const MCDisassembler * Decoder) DecodeCGImm() argument
129 DecodeMemOperand(MCInst & MI,uint64_t Bits,uint64_t Address,const MCDisassembler * Decoder) DecodeMemOperand() argument
231 getInstructionI(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CStream) const getInstructionI() argument
286 getInstructionII(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CStream) const getInstructionII() argument
341 getInstructionCJ(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CStream) const getInstructionCJ() argument
362 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CStream) const getInstruction() argument
[all...] |
| /llvm-project/compiler-rt/lib/xray/ |
| H A D | xray_x86_64.cpp | 147 const uint64_t Address = Sled.address(); patchFunctionEntry() local
194 const uint64_t Address = Sled.address(); patchFunctionExit() local
223 const uint64_t Address = Sled.address(); patchFunctionTailExit() local
264 const uint64_t Address = Sled.address(); patchCustomEvent() local
296 const uint64_t Address = Sled.address(); patchTypedEvent() local
[all...] |
| /llvm-project/offload/DeviceRTL/src/ |
| H A D | Synchronization.cpp | 36 atomicAdd(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicAdd() argument
42 atomicMul(Ty * Address,Ty V,atomic::OrderingTy Ordering) atomicMul() argument
54 atomicLoad(Ty * Address,atomic::OrderingTy Ordering) atomicLoad() argument
59 atomicStore(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicStore() argument
64 atomicCAS(Ty * Address,Ty ExpectedV,Ty DesiredV,atomic::OrderingTy OrderingSucc,atomic::OrderingTy OrderingFail) atomicCAS() argument
73 atomicMin(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicMin() argument
79 atomicMax(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicMax() argument
86 atomicMinFP(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicMinFP() argument
93 atomicMaxFP(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicMaxFP() argument
100 atomicOr(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicOr() argument
106 atomicAnd(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicAnd() argument
112 atomicXOr(Ty * Address,Ty Val,atomic::OrderingTy Ordering) atomicXOr() argument
117 atomicExchange(uint32_t * Address,uint32_t Val,atomic::OrderingTy Ordering) atomicExchange() argument
334 atomicInc(uint32_t * Address,uint32_t Val,atomic::OrderingTy Ordering,atomic::MemScopeTy MemScope) atomicInc() argument
|
| /llvm-project/bolt/lib/Rewrite/ |
| H A D | JITLinkLinker.cpp | 58 const BinarySection &BinSection, uint64_t Address) { in reassignSectionAddress() argument
100 MapSections([&G](const BinarySection &Section, uint64_t Address) { in modifyPassConfig() argument
128 if (auto Address = Linker.lookupSymbol(SymName)) { in lookup() local
137 uint64_t Address = I->isMoved() && !I->isJumpTable() in lookup() local
149 uint64_t Address = lookup() local
[all...] |
| /llvm-project/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kInstPrinter.h | 61 printPCRelImm(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCRelImm() argument
136 printPCD8Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCD8Mem() argument
140 printPCD16Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCD16Mem() argument
144 printPCD32Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCD32Mem() argument
149 printPCI8Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCI8Mem() argument
153 printPCI16Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCI16Mem() argument
157 printPCI32Mem(const MCInst * MI,uint64_t Address,unsigned opNum,raw_ostream & O) printPCI32Mem() argument
[all...] |
| /llvm-project/bolt/include/bolt/Profile/ |
| H A D | Heatmap.h | 55 inline bool ignoreAddress(uint64_t Address) const { in ignoreAddress()
60 void registerAddress(uint64_t Address) { in registerAddress()
|