Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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ed8019d9 |
| 18-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[Target] Remove unused includes (NFC) (#116577)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3 |
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432caca3 |
| 18-Feb-2023 |
Fangrui Song <i@maskray.me> |
Simplify with hasFeature. NFC
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Revision tags: llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7 |
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4d9969eb |
| 07-Jan-2023 |
Ben Shi <powerman1st@163.com> |
[AVR] Fix incorrect decoding of conditional branch instructions
This patch fixes the inaccurate decoding of the offset operand of the conditional branch instructions.
Reviewed By: aykevl
Different
[AVR] Fix incorrect decoding of conditional branch instructions
This patch fixes the inaccurate decoding of the offset operand of the conditional branch instructions.
Reviewed By: aykevl
Differential Revision: https://reviews.llvm.org/D140816
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6dc85bd3 |
| 07-Jan-2023 |
Ben Shi <powerman1st@163.com> |
[AVR] Fix incorrect decoding of RJMP and RCALL
This patch fixes the inaccurate decoding of the offset operand of the RCALL & RJMP instructions.
Reviewed By: aykevl, MaskRay
Differential Revision:
[AVR] Fix incorrect decoding of RJMP and RCALL
This patch fixes the inaccurate decoding of the offset operand of the RCALL & RJMP instructions.
Reviewed By: aykevl, MaskRay
Differential Revision: https://reviews.llvm.org/D140815
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77249ea6 |
| 23-Dec-2022 |
Ben Shi <powerman1st@163.com> |
[AVR] Support 16-bit LDS/STS on AVRTiny.
LDS/STS are 32-bit instructions on AVR, which can access up to 64KB data space. While they are 16-bit instructions on AVRTiny, which can only access 128B dat
[AVR] Support 16-bit LDS/STS on AVRTiny.
LDS/STS are 32-bit instructions on AVR, which can access up to 64KB data space. While they are 16-bit instructions on AVRTiny, which can only access 128B data space.
Reviewed By: aykevl
Differential Revision: https://reviews.llvm.org/D139621
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Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4 |
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c644488a |
| 15-May-2022 |
Sheng <ox59616e@gmail.com> |
Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`
The name `MCFixedLenDisassembler.h` is out of date after D120958.
Rename it as `MCDecoderOps.h` to reflect the change.
Reviewed By: myhsu
Dif
Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`
The name `MCFixedLenDisassembler.h` is out of date after D120958.
Rename it as `MCDecoderOps.h` to reflect the change.
Reviewed By: myhsu
Differential Revision: https://reviews.llvm.org/D124987
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dc66897d |
| 05-May-2022 |
Ben Shi <ben.shi@streamcomputing.com> |
[Disassembler][AVR] Remove unused static functions
The unused static functions cause failures on some build machines.
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
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b1dcd6ba |
| 11-Apr-2022 |
Ben Shi <ben.shi@streamcomputing.com> |
[MC][AVR] Implement decoding ST/LD
Reviewed By: aykevl, dylanmckay
Differential Revision: https://reviews.llvm.org/D123476
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cef2739d |
| 09-Apr-2022 |
Ben Shi <ben.shi@streamcomputing.com> |
[MC][AVR] Implement decoding STD/LDD
Reviewed By: aykevl, dylanmckay
Differential Revision: https://reviews.llvm.org/D123442
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4ae9745a |
| 21-Mar-2022 |
Maksim Panchenko <maks@fb.com> |
[Disassember][NFCI] Use strong type for instruction decoder
All LLVM backends use MCDisassembler as a base class for their instruction decoders. Use "const MCDisassembler *" for the decoder instead
[Disassember][NFCI] Use strong type for instruction decoder
All LLVM backends use MCDisassembler as a base class for their instruction decoders. Use "const MCDisassembler *" for the decoder instead of "const void *". Remove unnecessary static casts.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D122245
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1 |
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3a3cb929 |
| 07-Feb-2022 |
Kazu Hirata <kazu@google.com> |
[llvm] Use = default (NFC)
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Revision tags: llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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89b57061 |
| 08-Oct-2021 |
Reid Kleckner <rnk@google.com> |
Move TargetRegistry.(h|cpp) from Support to MC
This moves the registry higher in the LLVM library dependency stack. Every client of the target registry needs to link against MC anyway to actually us
Move TargetRegistry.(h|cpp) from Support to MC
This moves the registry higher in the LLVM library dependency stack. Every client of the target registry needs to link against MC anyway to actually use the target, so we might as well move this out of Support.
This allows us to ensure that Support doesn't have includes from MC/*.
Differential Revision: https://reviews.llvm.org/D111454
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
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5449d2da |
| 04-Sep-2021 |
Shivam Gupta <shivam98.tkg@gmail.com> |
[NFC] Run clang-format on llvm/lib/Trget/AVR/
The current inconsistency confuse contributors which coding guidlines to follow. It would be better to have it consistent using clang-format tool.
Revi
[NFC] Run clang-format on llvm/lib/Trget/AVR/
The current inconsistency confuse contributors which coding guidlines to follow. It would be better to have it consistent using clang-format tool.
Reviewed By: mhjacobson
Differential Revision: https://reviews.llvm.org/D109270
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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2 |
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eac4a601 |
| 18-Jun-2020 |
Ayke van Laethem <aykevanlaethem@gmail.com> |
[AVR] Disassemble double register instructions
Add disassembly support for the movw, adiw, and sbiw instructions.
I had previously committed test cases for the adiw and sbiw instructions, but had a
[AVR] Disassemble double register instructions
Add disassembly support for the movw, adiw, and sbiw instructions.
I had previously committed test cases for the adiw and sbiw instructions, but had accidentally made them not runnable so they were skipped all this time. Oops. This patch fixes that by adding support for disassembling those instructions.
Differential Revision: https://reviews.llvm.org/D82093
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9f09c29f |
| 18-Jun-2020 |
Ayke van Laethem <aykevanlaethem@gmail.com> |
[AVR] Disassemble instructions with fixed Z operand
Some instructions have a fixed Z register and don't have an explicit register operand. This can be worked around by simply printing the operand di
[AVR] Disassemble instructions with fixed Z operand
Some instructions have a fixed Z register and don't have an explicit register operand. This can be worked around by simply printing the operand directly if the particular register class is detected.
The LPM and ELPM instructions also needed a custom decoder, which is also included in this patch.
Differential Revision: https://reviews.llvm.org/D82088
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ec9efb85 |
| 16-Jun-2020 |
Ayke van Laethem <aykevanlaethem@gmail.com> |
[AVR] Disassemble multiplication instructions
These can often only use a limited range of registers, and apparently need special decoding support.
Differential Revision: https://reviews.llvm.org/D8
[AVR] Disassemble multiplication instructions
These can often only use a limited range of registers, and apparently need special decoding support.
Differential Revision: https://reviews.llvm.org/D81971
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01c2209d |
| 16-Jun-2020 |
Ayke van Laethem <aykevanlaethem@gmail.com> |
[AVR] Decode single register instructions
This is a set of instructions that take just a single register as an operand, with no immediates. Because all instructions share the same format, I haven't
[AVR] Decode single register instructions
This is a set of instructions that take just a single register as an operand, with no immediates. Because all instructions share the same format, I haven't added exhaustive bit testing to all instructions but just to the inc instruction.
Differential Revision: https://reviews.llvm.org/D81968
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15bf42d5 |
| 16-Jun-2020 |
Ayke van Laethem <aykevanlaethem@gmail.com> |
[AVR] Implement disassembly of 32-bit instructions
This needed two fixes:
* 32-bit instructions were read in the wrong order. The machine code swaps the two 16-bit instruction words, which wa
[AVR] Implement disassembly of 32-bit instructions
This needed two fixes:
* 32-bit instructions were read in the wrong order. The machine code swaps the two 16-bit instruction words, which wasn't undone when decoding instructions. * Jump and call instructions don't encode the lowest address bit, which is always zero. Therefore, the address needed to be shifted by one to fix that.
Differential Revision: https://reviews.llvm.org/D81961
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Revision tags: llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2 |
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1ba78097 |
| 05-Feb-2020 |
Ayke van Laethem <aykevanlaethem@gmail.com> |
[AVR] Implement disassembly support for I/O instructions
The in, out, and sbi/cbi family of instructions seem to require a custom decoder. I'm not exactly sure why and would prefer to convince Table
[AVR] Implement disassembly support for I/O instructions
The in, out, and sbi/cbi family of instructions seem to require a custom decoder. I'm not exactly sure why and would prefer to convince TableGen to provide the correct decoders for these, but I can't seem to convince it to do so. They simply disassemble without any operands.
Differential Revision: https://reviews.llvm.org/D74049
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5b2046c9 |
| 05-Feb-2020 |
Ayke van Laethem <aykevanlaethem@gmail.com> |
[AVR] Disassemble register operands
Simply by implementing a few functions I was able to correctly disassemble a much larger amount of instructions.
Differential Revision: https://reviews.llvm.org/
[AVR] Disassemble register operands
Simply by implementing a few functions I was able to correctly disassemble a much larger amount of instructions.
Differential Revision: https://reviews.llvm.org/D74045
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Revision tags: llvmorg-10.0.0-rc1, llvmorg-11-init |
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#
0dbcb363 |
| 15-Jan-2020 |
Tom Stellard <tstellar@redhat.com> |
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by default.
A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these libraries public, which is mainly needed for the definitions of the LLVMInitialize* functions.
This patch reduces the number of public symbols in libLLVM.so by about 25%. This should improve load times for the dynamic library and also make abi checker tools, like abidiff require less memory when analyzing libLLVM.so
One side-effect of this change is that for builds with LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that access symbols that are no longer public will need to be statically linked.
Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1): nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 36221 nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 26278
Reviewers: chandlerc, beanz, mgorny, rnk, hans
Reviewed By: rnk, hans
Subscribers: merge_guards_bot, luismarques, smeenai, ldionne, lenary, s.egerton, pzheng, sameer.abuasal, MaskRay, wuzish, echristo, Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D54439
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6fdd6a7b |
| 11-Jan-2020 |
Fangrui Song <maskray@google.com> |
[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It
[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds.
If we ever have the needs to add verbose log to disassemblers, we can record log with a member function, instead of passing it around as an argument.
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Revision tags: llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1, llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2, llvmorg-9.0.0-rc1, llvmorg-10-init, llvmorg-8.0.1, llvmorg-8.0.1-rc4, llvmorg-8.0.1-rc3, llvmorg-8.0.1-rc2 |
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4b0b2619 |
| 11-Jun-2019 |
Tom Stellard <tstellar@redhat.com> |
Revert CMake: Make most target symbols hidden by default
This reverts r362990 (git commit 374571301dc8e9bc9fdd1d70f86015de198673bd)
This was causing linker warnings on Darwin:
ld: warning: direct
Revert CMake: Make most target symbols hidden by default
This reverts r362990 (git commit 374571301dc8e9bc9fdd1d70f86015de198673bd)
This was causing linker warnings on Darwin:
ld: warning: direct access in function 'llvm::initializeEvexToVexInstPassPass(llvm::PassRegistry&)' from file '../../lib/libLLVMX86CodeGen.a(X86EvexToVex.cpp.o)' to global weak symbol 'void std::__1::__call_once_proxy<std::__1::tuple<void* (&)(llvm::PassRegistry&), std::__1::reference_wrapper<llvm::PassRegistry>&&> >(void*)' from file '../../lib/libLLVMCore.a(Verifier.cpp.o)' means the weak symbol cannot be overridden at runtime. This was likely caused by different translation units being compiled with different visibility settings.
llvm-svn: 363028
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37457130 |
| 10-Jun-2019 |
Tom Stellard <tstellar@redhat.com> |
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by default.
A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these libraries public, which is mainly needed for the definitions of the LLVMInitialize* functions.
This patch reduces the number of public symbols in libLLVM.so by about 25%. This should improve load times for the dynamic library and also make abi checker tools, like abidiff require less memory when analyzing libLLVM.so
One side-effect of this change is that for builds with LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that access symbols that are no longer public will need to be statically linked.
Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1): nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 36221 nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 26278
Reviewers: chandlerc, beanz, mgorny, rnk, hans
Reviewed By: rnk, hans
Subscribers: Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D54439
llvm-svn: 362990
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Revision tags: llvmorg-8.0.1-rc1 |
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#
e982b420 |
| 14-May-2019 |
Richard Trieu <rtrieu@google.com> |
[AVR] Create a TargetInfo header. NFC
Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a
[AVR] Create a TargetInfo header. NFC
Move the declarations of getThe<Name>Target() functions into a new header in TargetInfo and make users of these functions include this new header. This fixes a layering problem.
llvm-svn: 360721
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