1 //===- AVRDisassembler.cpp - Disassembler for AVR ---------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file is part of the AVR Disassembler. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "AVR.h" 14 #include "AVRRegisterInfo.h" 15 #include "AVRSubtarget.h" 16 #include "MCTargetDesc/AVRMCTargetDesc.h" 17 #include "TargetInfo/AVRTargetInfo.h" 18 19 #include "llvm/MC/MCAsmInfo.h" 20 #include "llvm/MC/MCContext.h" 21 #include "llvm/MC/MCDisassembler/MCDisassembler.h" 22 #include "llvm/MC/MCFixedLenDisassembler.h" 23 #include "llvm/MC/MCInst.h" 24 #include "llvm/MC/TargetRegistry.h" 25 26 using namespace llvm; 27 28 #define DEBUG_TYPE "avr-disassembler" 29 30 typedef MCDisassembler::DecodeStatus DecodeStatus; 31 32 namespace { 33 34 /// A disassembler class for AVR. 35 class AVRDisassembler : public MCDisassembler { 36 public: 37 AVRDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) 38 : MCDisassembler(STI, Ctx) {} 39 virtual ~AVRDisassembler() = default; 40 41 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, 42 ArrayRef<uint8_t> Bytes, uint64_t Address, 43 raw_ostream &CStream) const override; 44 }; 45 } // namespace 46 47 static MCDisassembler *createAVRDisassembler(const Target &T, 48 const MCSubtargetInfo &STI, 49 MCContext &Ctx) { 50 return new AVRDisassembler(STI, Ctx); 51 } 52 53 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRDisassembler() { 54 // Register the disassembler. 55 TargetRegistry::RegisterMCDisassembler(getTheAVRTarget(), 56 createAVRDisassembler); 57 } 58 59 static const uint16_t GPRDecoderTable[] = { 60 AVR::R0, AVR::R1, AVR::R2, AVR::R3, AVR::R4, AVR::R5, AVR::R6, 61 AVR::R7, AVR::R8, AVR::R9, AVR::R10, AVR::R11, AVR::R12, AVR::R13, 62 AVR::R14, AVR::R15, AVR::R16, AVR::R17, AVR::R18, AVR::R19, AVR::R20, 63 AVR::R21, AVR::R22, AVR::R23, AVR::R24, AVR::R25, AVR::R26, AVR::R27, 64 AVR::R28, AVR::R29, AVR::R30, AVR::R31, 65 }; 66 67 static DecodeStatus DecodeGPR8RegisterClass(MCInst &Inst, unsigned RegNo, 68 uint64_t Address, 69 const MCDisassembler *Decoder) { 70 if (RegNo > 31) 71 return MCDisassembler::Fail; 72 73 unsigned Register = GPRDecoderTable[RegNo]; 74 Inst.addOperand(MCOperand::createReg(Register)); 75 return MCDisassembler::Success; 76 } 77 78 static DecodeStatus DecodeLD8RegisterClass(MCInst &Inst, unsigned RegNo, 79 uint64_t Address, 80 const MCDisassembler *Decoder) { 81 if (RegNo > 15) 82 return MCDisassembler::Fail; 83 84 unsigned Register = GPRDecoderTable[RegNo + 16]; 85 Inst.addOperand(MCOperand::createReg(Register)); 86 return MCDisassembler::Success; 87 } 88 89 static DecodeStatus DecodePTRREGSRegisterClass(MCInst &Inst, unsigned RegNo, 90 uint64_t Address, 91 const MCDisassembler *Decoder) { 92 // Note: this function must be defined but does not seem to be called. 93 assert(false && "unimplemented: PTRREGS register class"); 94 return MCDisassembler::Success; 95 } 96 97 static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn, uint64_t Address, 98 const MCDisassembler *Decoder); 99 100 static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn, uint64_t Address, 101 const MCDisassembler *Decoder); 102 103 static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn, uint64_t Address, 104 const MCDisassembler *Decoder); 105 106 static DecodeStatus decodeCallTarget(MCInst &Inst, unsigned Insn, 107 uint64_t Address, 108 const MCDisassembler *Decoder); 109 110 static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn, uint64_t Address, 111 const MCDisassembler *Decoder); 112 113 static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn, uint64_t Address, 114 const MCDisassembler *Decoder); 115 116 static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn, 117 uint64_t Address, 118 const MCDisassembler *Decoder); 119 120 static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn, 121 uint64_t Address, 122 const MCDisassembler *Decoder); 123 124 static DecodeStatus decodeFWRdK(MCInst &Inst, unsigned Insn, uint64_t Address, 125 const MCDisassembler *Decoder); 126 127 static DecodeStatus decodeFMUL2RdRr(MCInst &Inst, unsigned Insn, 128 uint64_t Address, 129 const MCDisassembler *Decoder); 130 131 static DecodeStatus decodeMemri(MCInst &Inst, unsigned Insn, uint64_t Address, 132 const MCDisassembler *Decoder); 133 134 static DecodeStatus decodeLoadStore(MCInst &Inst, unsigned Insn, 135 uint64_t Address, 136 const MCDisassembler *Decoder); 137 138 #include "AVRGenDisassemblerTables.inc" 139 140 static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn, uint64_t Address, 141 const MCDisassembler *Decoder) { 142 unsigned addr = 0; 143 addr |= fieldFromInstruction(Insn, 0, 4); 144 addr |= fieldFromInstruction(Insn, 9, 2) << 4; 145 unsigned reg = fieldFromInstruction(Insn, 4, 5); 146 Inst.addOperand(MCOperand::createImm(addr)); 147 if (DecodeGPR8RegisterClass(Inst, reg, Address, Decoder) == 148 MCDisassembler::Fail) 149 return MCDisassembler::Fail; 150 return MCDisassembler::Success; 151 } 152 153 static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn, uint64_t Address, 154 const MCDisassembler *Decoder) { 155 unsigned addr = 0; 156 addr |= fieldFromInstruction(Insn, 0, 4); 157 addr |= fieldFromInstruction(Insn, 9, 2) << 4; 158 unsigned reg = fieldFromInstruction(Insn, 4, 5); 159 if (DecodeGPR8RegisterClass(Inst, reg, Address, Decoder) == 160 MCDisassembler::Fail) 161 return MCDisassembler::Fail; 162 Inst.addOperand(MCOperand::createImm(addr)); 163 return MCDisassembler::Success; 164 } 165 166 static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn, uint64_t Address, 167 const MCDisassembler *Decoder) { 168 unsigned addr = fieldFromInstruction(Insn, 3, 5); 169 unsigned b = fieldFromInstruction(Insn, 0, 3); 170 Inst.addOperand(MCOperand::createImm(addr)); 171 Inst.addOperand(MCOperand::createImm(b)); 172 return MCDisassembler::Success; 173 } 174 175 static DecodeStatus decodeCallTarget(MCInst &Inst, unsigned Field, 176 uint64_t Address, 177 const MCDisassembler *Decoder) { 178 // Call targets need to be shifted left by one so this needs a custom 179 // decoder. 180 Inst.addOperand(MCOperand::createImm(Field << 1)); 181 return MCDisassembler::Success; 182 } 183 184 static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn, uint64_t Address, 185 const MCDisassembler *Decoder) { 186 unsigned d = fieldFromInstruction(Insn, 4, 5); 187 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == 188 MCDisassembler::Fail) 189 return MCDisassembler::Fail; 190 return MCDisassembler::Success; 191 } 192 193 static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn, uint64_t Address, 194 const MCDisassembler *Decoder) { 195 if (decodeFRd(Inst, Insn, Address, Decoder) == MCDisassembler::Fail) 196 return MCDisassembler::Fail; 197 Inst.addOperand(MCOperand::createReg(AVR::R31R30)); 198 return MCDisassembler::Success; 199 } 200 201 static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn, 202 uint64_t Address, 203 const MCDisassembler *Decoder) { 204 unsigned d = fieldFromInstruction(Insn, 4, 3) + 16; 205 unsigned r = fieldFromInstruction(Insn, 0, 3) + 16; 206 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == 207 MCDisassembler::Fail) 208 return MCDisassembler::Fail; 209 if (DecodeGPR8RegisterClass(Inst, r, Address, Decoder) == 210 MCDisassembler::Fail) 211 return MCDisassembler::Fail; 212 return MCDisassembler::Success; 213 } 214 215 static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn, 216 uint64_t Address, 217 const MCDisassembler *Decoder) { 218 unsigned r = fieldFromInstruction(Insn, 4, 4) * 2; 219 unsigned d = fieldFromInstruction(Insn, 0, 4) * 2; 220 if (DecodeGPR8RegisterClass(Inst, r, Address, Decoder) == 221 MCDisassembler::Fail) 222 return MCDisassembler::Fail; 223 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == 224 MCDisassembler::Fail) 225 return MCDisassembler::Fail; 226 return MCDisassembler::Success; 227 } 228 229 static DecodeStatus decodeFWRdK(MCInst &Inst, unsigned Insn, uint64_t Address, 230 const MCDisassembler *Decoder) { 231 unsigned d = fieldFromInstruction(Insn, 4, 2) * 2 + 24; // starts at r24:r25 232 unsigned k = 0; 233 k |= fieldFromInstruction(Insn, 0, 4); 234 k |= fieldFromInstruction(Insn, 6, 2) << 4; 235 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == 236 MCDisassembler::Fail) 237 return MCDisassembler::Fail; 238 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == 239 MCDisassembler::Fail) 240 return MCDisassembler::Fail; 241 Inst.addOperand(MCOperand::createImm(k)); 242 return MCDisassembler::Success; 243 } 244 245 static DecodeStatus decodeFMUL2RdRr(MCInst &Inst, unsigned Insn, 246 uint64_t Address, 247 const MCDisassembler *Decoder) { 248 unsigned rd = fieldFromInstruction(Insn, 4, 4) + 16; 249 unsigned rr = fieldFromInstruction(Insn, 0, 4) + 16; 250 if (DecodeGPR8RegisterClass(Inst, rd, Address, Decoder) == 251 MCDisassembler::Fail) 252 return MCDisassembler::Fail; 253 if (DecodeGPR8RegisterClass(Inst, rr, Address, Decoder) == 254 MCDisassembler::Fail) 255 return MCDisassembler::Fail; 256 return MCDisassembler::Success; 257 } 258 259 static DecodeStatus decodeMemri(MCInst &Inst, unsigned Insn, uint64_t Address, 260 const MCDisassembler *Decoder) { 261 // As in the EncoderMethod `AVRMCCodeEmitter::encodeMemri`, the memory 262 // address is encoded into 7-bit, in which bits 0-5 are the immediate offset, 263 // and the bit-6 is the pointer register bit (Z=0, Y=1). 264 if (Insn > 127) 265 return MCDisassembler::Fail; 266 267 // Append the base register operand. 268 Inst.addOperand( 269 MCOperand::createReg((Insn & 0x40) ? AVR::R29R28 : AVR::R31R30)); 270 // Append the immediate offset operand. 271 Inst.addOperand(MCOperand::createImm(Insn & 0x3f)); 272 273 return MCDisassembler::Success; 274 } 275 276 static DecodeStatus decodeLoadStore(MCInst &Inst, unsigned Insn, 277 uint64_t Address, 278 const MCDisassembler *Decoder) { 279 // Decode LDD/STD with offset less than 8. 280 if ((Insn & 0xf000) == 0x8000) { 281 unsigned RegVal = GPRDecoderTable[(Insn >> 4) & 0x1f]; 282 unsigned RegBase = (Insn & 0x8) ? AVR::R29R28 : AVR::R31R30; 283 unsigned Offset = Insn & 7; // We need not consider offset > 7. 284 if ((Insn & 0x200) == 0) { // Decode LDD. 285 Inst.setOpcode(AVR::LDDRdPtrQ); 286 Inst.addOperand(MCOperand::createReg(RegVal)); 287 Inst.addOperand(MCOperand::createReg(RegBase)); 288 Inst.addOperand(MCOperand::createImm(Offset)); 289 } else { // Decode STD. 290 Inst.setOpcode(AVR::STDPtrQRr); 291 Inst.addOperand(MCOperand::createReg(RegBase)); 292 Inst.addOperand(MCOperand::createImm(Offset)); 293 Inst.addOperand(MCOperand::createReg(RegVal)); 294 } 295 return MCDisassembler::Success; 296 } 297 298 // TODO: Decode ST/LD with postinc/predec properly. 299 return MCDisassembler::Fail; 300 } 301 302 static DecodeStatus readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address, 303 uint64_t &Size, uint32_t &Insn) { 304 if (Bytes.size() < 2) { 305 Size = 0; 306 return MCDisassembler::Fail; 307 } 308 309 Size = 2; 310 Insn = (Bytes[0] << 0) | (Bytes[1] << 8); 311 312 return MCDisassembler::Success; 313 } 314 315 static DecodeStatus readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, 316 uint64_t &Size, uint32_t &Insn) { 317 318 if (Bytes.size() < 4) { 319 Size = 0; 320 return MCDisassembler::Fail; 321 } 322 323 Size = 4; 324 Insn = 325 (Bytes[0] << 16) | (Bytes[1] << 24) | (Bytes[2] << 0) | (Bytes[3] << 8); 326 327 return MCDisassembler::Success; 328 } 329 330 static const uint8_t *getDecoderTable(uint64_t Size) { 331 332 switch (Size) { 333 case 2: 334 return DecoderTable16; 335 case 4: 336 return DecoderTable32; 337 default: 338 llvm_unreachable("instructions must be 16 or 32-bits"); 339 } 340 } 341 342 DecodeStatus AVRDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, 343 ArrayRef<uint8_t> Bytes, 344 uint64_t Address, 345 raw_ostream &CStream) const { 346 uint32_t Insn; 347 348 DecodeStatus Result; 349 350 // Try decode a 16-bit instruction. 351 { 352 Result = readInstruction16(Bytes, Address, Size, Insn); 353 354 if (Result == MCDisassembler::Fail) 355 return MCDisassembler::Fail; 356 357 // Try to auto-decode a 16-bit instruction. 358 Result = decodeInstruction(getDecoderTable(Size), Instr, Insn, Address, 359 this, STI); 360 361 if (Result != MCDisassembler::Fail) 362 return Result; 363 } 364 365 // Try decode a 32-bit instruction. 366 { 367 Result = readInstruction32(Bytes, Address, Size, Insn); 368 369 if (Result == MCDisassembler::Fail) 370 return MCDisassembler::Fail; 371 372 Result = decodeInstruction(getDecoderTable(Size), Instr, Insn, Address, 373 this, STI); 374 375 if (Result != MCDisassembler::Fail) { 376 return Result; 377 } 378 379 return MCDisassembler::Fail; 380 } 381 } 382 383 typedef DecodeStatus (*DecodeFunc)(MCInst &MI, unsigned insn, uint64_t Address, 384 const MCDisassembler *Decoder); 385