Lines Matching defs:Address
44 ArrayRef<uint8_t> Bytes, uint64_t Address,
66 uint64_t Address,
79 uint64_t Address,
96 uint64_t Address, uint64_t Offset,
100 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch, Offset,
105 int64_t Address, const void *Decoder) {
112 int64_t Address, const void *Decoder) {
119 int64_t Address, const void *Decoder) {
126 if (!tryAddingSymbolicOperand(SignExtend64<12>(Imm) + 4 + Address, true,
127 Address, 0, 3, Inst, Decoder))
132 if (!tryAddingSymbolicOperand(SignExtend64<8>(Imm) + 4 + Address, true,
133 Address, 0, 3, Inst, Decoder))
140 int64_t Address, const void *Decoder) {
144 SignExtend64<17>((Imm << 2) + 0x40000 + (Address & 0x3))));
149 int64_t Address, const void *Decoder) {
156 int64_t Address,
164 int64_t Address, const void *Decoder) {
171 int64_t Address, const void *Decoder) {
178 int64_t Address, const void *Decoder) {
185 int64_t Address, const void *Decoder) {
192 int64_t Address,
203 int64_t Address,
214 int64_t Address,
224 int64_t Address, const void *Decoder) {
234 int64_t Address,
243 int64_t Address, const void *Decoder) {
245 DecodeARRegisterClass(Inst, Imm & 0xf, Address, Decoder);
251 int64_t Address, const void *Decoder) {
253 DecodeARRegisterClass(Inst, Imm & 0xf, Address, Decoder);
259 int64_t Address, const void *Decoder) {
261 DecodeARRegisterClass(Inst, Imm & 0xf, Address, Decoder);
267 int64_t Address, const void *Decoder) {
269 DecodeARRegisterClass(Inst, Imm & 0xf, Address, Decoder);
276 static DecodeStatus readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address,
295 static DecodeStatus readInstruction24(ArrayRef<uint8_t> Bytes, uint64_t Address,
317 uint64_t Address,
324 Result = readInstruction16(Bytes, Address, Size, Insn, IsLittleEndian);
328 Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI);
336 Result = readInstruction24(Bytes, Address, Size, Insn, IsLittleEndian);
340 Result = decodeInstruction(DecoderTable24, MI, Insn, Address, this, STI);