Replace TargetInstrInfo::isInvariantLoad and its target-specific
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings Machine

Replace TargetInstrInfo::isInvariantLoad and its target-specific
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475

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Don't hoist or sink instructions with physreg uses if the physreg is
allocatable. Even if it doesn't appear to have any defs, it may latter
on after register allocation.

llvm-svn: 82834

Fix MachineSink to be able to sink instructions that use physical registers
which have no defs anywhere in the function. In particular, this fixes sinking
of instructions that reference RIP on x86-64

Fix MachineSink to be able to sink instructions that use physical registers
which have no defs anywhere in the function. In particular, this fixes sinking
of instructions that reference RIP on x86-64, which is currently being modeled
as a register.

llvm-svn: 82815

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Simplify this code by using use_iterator instead of reg_iterator
and skipping the defs.

llvm-svn: 82811

remove std::ostream versions of printing stuff for MBB and MF,
upgrading a few things to use raw_ostream

llvm-svn: 79811

Convert DOUT to DEBUG(errs()...).

llvm-svn: 79755

Various comment fixes.

llvm-svn: 78139

Use setPreservesAll and setPreservesCFG in CodeGen passes.

llvm-svn: 77754

fix two problems with machine sinking:
1. Sinking would crash when the first instruction of a block was
sunk due to iterator problems.
2. Instructions could be sunk to their current block, causing

fix two problems with machine sinking:
1. Sinking would crash when the first instruction of a block was
sunk due to iterator problems.
2. Instructions could be sunk to their current block, causing an
infinite loop.

This fixes PR3968

llvm-svn: 68787

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Fix PR3522. It's not safe to sink into landing pad BB's.

llvm-svn: 64582

Don't sink the instruction if TargetRegisterInfo::isSafeToMoveRegClassDefs doesn't think it's safe. This works around PR1911.

llvm-svn: 63994

Tidy up #includes, deleting a bunch of unnecessary #includes.

llvm-svn: 61715

Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006

Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer

Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189

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Tidy up several unbeseeming casts from pointer to intptr_t.

llvm-svn: 55779

Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017

Refactor some code out of MachineSink into a MachineInstr query.

llvm-svn: 48311

Rename MRegisterInfo to TargetRegisterInfo.

llvm-svn: 46930

implement support for sinking a load out the bottom of a block that
has no stores between the load and the end of block. This works
great and sinks hundreds of stores, but we can't turn it on becau

implement support for sinking a load out the bottom of a block that
has no stores between the load and the end of block. This works
great and sinks hundreds of stores, but we can't turn it on because
machineinstrs don't have volatility information and we don't want to
sink volatile stores :(

llvm-svn: 45894

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Simplify the side effect stuff a bit more and make licm/sinking
both work right according to the new flags.

This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad.

I

Simplify the side effect stuff a bit more and make licm/sinking
both work right according to the new flags.

This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad.

It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags. Now the clients
can decide everything they need.

I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.

llvm-svn: 45843

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Clamp down on sinking of lots of instructions.

llvm-svn: 45841

The current impl is really trivial, add some comments about how it can be made better.

llvm-svn: 45625

don't sink anything with side effects, this makes lots of stuff work, but sinks almost nothing.

llvm-svn: 45617

fix a common crash.

llvm-svn: 45614

Add a really quick hack at a machine code sinking pass, enabled with --enable-sinking.
It is missing validity checks, so it is known broken. However, it is powerful enough
to compile this contrive

Add a really quick hack at a machine code sinking pass, enabled with --enable-sinking.
It is missing validity checks, so it is known broken. However, it is powerful enough
to compile this contrived code:

void test1(int C, double A, double B, double *P) {
double Tmp = A*A+B*B;
*P = C ? Tmp : A;
}

into:

_test1:
movsd 8(%esp), %xmm0
cmpl $0, 4(%esp)
je LBB1_2 # entry
LBB1_1: # entry
movsd 16(%esp), %xmm1
mulsd %xmm1, %xmm1
mulsd %xmm0, %xmm0
addsd %xmm1, %xmm0
LBB1_2: # entry
movl 24(%esp), %eax
movsd %xmm0, (%eax)
ret

instead of:

_test1:
movsd 16(%esp), %xmm0
mulsd %xmm0, %xmm0
movsd 8(%esp), %xmm1
movapd %xmm1, %xmm2
mulsd %xmm2, %xmm2
addsd %xmm0, %xmm2
cmpl $0, 4(%esp)
je LBB1_2 # entry
LBB1_1: # entry
movapd %xmm2, %xmm1
LBB1_2: # entry
movl 24(%esp), %eax
movsd %xmm1, (%eax)
ret

woo.

llvm-svn: 45570

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