1 //===-- MachineSink.cpp - Sinking for machine instructions ----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This pass 11 // 12 //===----------------------------------------------------------------------===// 13 14 #define DEBUG_TYPE "machine-sink" 15 #include "llvm/CodeGen/Passes.h" 16 #include "llvm/CodeGen/MachineRegisterInfo.h" 17 #include "llvm/CodeGen/MachineDominators.h" 18 #include "llvm/Target/MRegisterInfo.h" 19 #include "llvm/Target/TargetInstrInfo.h" 20 #include "llvm/Target/TargetMachine.h" 21 #include "llvm/ADT/SmallVector.h" 22 #include "llvm/ADT/Statistic.h" 23 #include "llvm/Support/Compiler.h" 24 #include "llvm/Support/Debug.h" 25 using namespace llvm; 26 27 STATISTIC(NumSunk, "Number of machine instructions sunk"); 28 29 namespace { 30 class VISIBILITY_HIDDEN MachineSinking : public MachineFunctionPass { 31 const TargetMachine *TM; 32 const TargetInstrInfo *TII; 33 MachineFunction *CurMF; // Current MachineFunction 34 MachineRegisterInfo *RegInfo; // Machine register information 35 MachineDominatorTree *DT; // Machine dominator tree for the current Loop 36 37 public: 38 static char ID; // Pass identification 39 MachineSinking() : MachineFunctionPass((intptr_t)&ID) {} 40 41 virtual bool runOnMachineFunction(MachineFunction &MF); 42 43 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 44 MachineFunctionPass::getAnalysisUsage(AU); 45 AU.addRequired<MachineDominatorTree>(); 46 AU.addPreserved<MachineDominatorTree>(); 47 } 48 private: 49 bool ProcessBlock(MachineBasicBlock &MBB); 50 bool SinkInstruction(MachineInstr *MI); 51 bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const; 52 }; 53 54 char MachineSinking::ID = 0; 55 RegisterPass<MachineSinking> X("machine-sink", "Machine code sinking"); 56 } // end anonymous namespace 57 58 FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); } 59 60 /// AllUsesDominatedByBlock - Return true if all uses of the specified register 61 /// occur in blocks dominated by the specified block. 62 bool MachineSinking::AllUsesDominatedByBlock(unsigned Reg, 63 MachineBasicBlock *MBB) const { 64 assert(MRegisterInfo::isVirtualRegister(Reg) && "Only makes sense for vregs"); 65 for (MachineRegisterInfo::reg_iterator I = RegInfo->reg_begin(Reg), 66 E = RegInfo->reg_end(); I != E; ++I) { 67 if (I.getOperand().isDef()) continue; // ignore def. 68 69 // Determine the block of the use. 70 MachineInstr *UseInst = &*I; 71 MachineBasicBlock *UseBlock = UseInst->getParent(); 72 if (UseInst->getOpcode() == TargetInstrInfo::PHI) { 73 // PHI nodes use the operand in the predecessor block, not the block with 74 // the PHI. 75 UseBlock = UseInst->getOperand(I.getOperandNo()+1).getMBB(); 76 } 77 // Check that it dominates. 78 if (!DT->dominates(MBB, UseBlock)) 79 return false; 80 } 81 return true; 82 } 83 84 85 86 bool MachineSinking::runOnMachineFunction(MachineFunction &MF) { 87 DOUT << "******** Machine Sinking ********\n"; 88 89 CurMF = &MF; 90 TM = &CurMF->getTarget(); 91 TII = TM->getInstrInfo(); 92 RegInfo = &CurMF->getRegInfo(); 93 DT = &getAnalysis<MachineDominatorTree>(); 94 95 bool EverMadeChange = false; 96 97 while (1) { 98 bool MadeChange = false; 99 100 // Process all basic blocks. 101 for (MachineFunction::iterator I = CurMF->begin(), E = CurMF->end(); 102 I != E; ++I) 103 MadeChange |= ProcessBlock(*I); 104 105 // If this iteration over the code changed anything, keep iterating. 106 if (!MadeChange) break; 107 EverMadeChange = true; 108 } 109 return EverMadeChange; 110 } 111 112 bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) { 113 bool MadeChange = false; 114 115 // Can't sink anything out of a block that has less than two successors. 116 if (MBB.succ_size() <= 1) return false; 117 118 // Walk the basic block bottom-up 119 for (MachineBasicBlock::iterator I = MBB.end(); I != MBB.begin(); ){ 120 MachineBasicBlock::iterator LastIt = I; 121 if (SinkInstruction(--I)) { 122 I = LastIt; 123 ++NumSunk; 124 } 125 } 126 127 return MadeChange; 128 } 129 130 /// SinkInstruction - Determine whether it is safe to sink the specified machine 131 /// instruction out of its current block into a successor. 132 bool MachineSinking::SinkInstruction(MachineInstr *MI) { 133 // Don't sink things with side-effects we don't understand. 134 if (TII->hasUnmodelledSideEffects(MI)) 135 return false; 136 137 // FIXME: we should be able to sink loads with no other side effects if there 138 // is nothing that can change memory from here until the end of block. This 139 // is a trivial form of alias analysis. 140 141 // FIXME: This should include support for sinking instructions within the 142 // block they are currently in to shorten the live ranges. We often get 143 // instructions sunk into the top of a large block, but it would be better to 144 // also sink them down before their first use in the block. This xform has to 145 // be careful not to *increase* register pressure though, e.g. sinking 146 // "x = y + z" down if it kills y and z would increase the live ranges of y 147 // and z only the shrink the live range of x. 148 149 // Loop over all the operands of the specified instruction. If there is 150 // anything we can't handle, bail out. 151 MachineBasicBlock *ParentBlock = MI->getParent(); 152 153 // SuccToSinkTo - This is the successor to sink this instruction to, once we 154 // decide. 155 MachineBasicBlock *SuccToSinkTo = 0; 156 157 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 158 const MachineOperand &MO = MI->getOperand(i); 159 if (!MO.isReg()) continue; // Ignore non-register operands. 160 161 unsigned Reg = MO.getReg(); 162 if (Reg == 0) continue; 163 164 if (MRegisterInfo::isPhysicalRegister(Reg)) { 165 // If this is a physical register use, we can't move it. If it is a def, 166 // we can move it, but only if the def is dead. 167 if (MO.isUse() || !MO.isDead()) 168 return false; 169 } else { 170 // Virtual register uses are always safe to sink. 171 if (MO.isUse()) continue; 172 173 // FIXME: This picks a successor to sink into based on having one 174 // successor that dominates all the uses. However, there are cases where 175 // sinking can happen but where the sink point isn't a successor. For 176 // example: 177 // x = computation 178 // if () {} else {} 179 // use x 180 // the instruction could be sunk over the whole diamond for the 181 // if/then/else (or loop, etc), allowing it to be sunk into other blocks 182 // after that. 183 184 // Virtual register defs can only be sunk if all their uses are in blocks 185 // dominated by one of the successors. 186 if (SuccToSinkTo) { 187 // If a previous operand picked a block to sink to, then this operand 188 // must be sinkable to the same block. 189 if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo)) 190 return false; 191 continue; 192 } 193 194 // Otherwise, we should look at all the successors and decide which one 195 // we should sink to. 196 for (MachineBasicBlock::succ_iterator SI = ParentBlock->succ_begin(), 197 E = ParentBlock->succ_end(); SI != E; ++SI) { 198 if (AllUsesDominatedByBlock(Reg, *SI)) { 199 SuccToSinkTo = *SI; 200 break; 201 } 202 } 203 204 // If we couldn't find a block to sink to, ignore this instruction. 205 if (SuccToSinkTo == 0) 206 return false; 207 } 208 } 209 210 // If there are no outputs, it must have side-effects. 211 if (SuccToSinkTo == 0) 212 return false; 213 214 DEBUG(cerr << "Sink instr " << *MI); 215 DEBUG(cerr << "to block " << *SuccToSinkTo); 216 217 // If the block has multiple predecessors, this would introduce computation on 218 // a path that it doesn't already exist. We could split the critical edge, 219 // but for now we just punt. 220 // FIXME: Split critical edges if not backedges. 221 if (SuccToSinkTo->pred_size() > 1) { 222 DEBUG(cerr << " *** PUNTING: Critical edge found\n"); 223 return false; 224 } 225 226 // Determine where to insert into. Skip phi nodes. 227 MachineBasicBlock::iterator InsertPos = SuccToSinkTo->begin(); 228 while (InsertPos != SuccToSinkTo->end() && 229 InsertPos->getOpcode() == TargetInstrInfo::PHI) 230 ++InsertPos; 231 232 // Move the instruction. 233 SuccToSinkTo->splice(InsertPos, ParentBlock, MI, 234 ++MachineBasicBlock::iterator(MI)); 235 return true; 236 } 237