Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2 |
|
#
6b08e4d3 |
| 30-Jul-2024 |
Michael Buch <michaelbuch12@gmail.com> |
[docs] SourceLevelDebugging: fix metadata references (#101187)
The metadata was off-by-one in a couple of places, making the
explanatory text incorrect.
|
Revision tags: llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8 |
|
#
400d4fd7 |
| 11-Jun-2024 |
Stephen Tozer <stephen.tozer@sony.com> |
[RemoveDIs] Update all docs to use debug records (#91768)
As we approach the state where support for debug intrinsics is dropping and
we print and use debug records by default, the documentation sh
[RemoveDIs] Update all docs to use debug records (#91768)
As we approach the state where support for debug intrinsics is dropping and
we print and use debug records by default, the documentation should be updated
to refer to debug records as the primary debug info representation, with
debug intrinsics being relegated to an optional alternative.
This patch performs a few updates:
- Replace references to intrinsics with references to records across all
the documentation.
- Replace intrinsics with records in code examples.
- Move debug records prior to debug intrinsics in the
SourceLevelDebugging document, and change text to refer to them as the
primary representation.
- Add release notes describing the change.
show more ...
|
Revision tags: llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2 |
|
#
01e5d460 |
| 08-Mar-2024 |
Stephen Tozer <stephen.tozer@sony.com> |
[RemoveDIs] Add documentation for IR debug records (#81156)
This patch adds minimal documentation for the IR representation of the
RemoveDIs model of debug info. This patch assumes
that the defaul
[RemoveDIs] Add documentation for IR debug records (#81156)
This patch adds minimal documentation for the IR representation of the
RemoveDIs model of debug info. This patch assumes
that the default for all cases is still debug intrinsic functions, and
so does not update all existing text to refer to debug records, but only
adds a section in the LangRef and SourceLevelDebugging documents to
explain the new format.
show more ...
|
Revision tags: llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6 |
|
#
eae1811e |
| 27-Nov-2023 |
Felipe de Azevedo Piovezan <fpiovezan@apple.com> |
[docs] Fix issues in SourceLevelDebugging (#73528)
An SSA register `value` was being defined twice.
An "external" link was using the "internal" link syntax.
|
Revision tags: llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4 |
|
#
96ddbd6d |
| 13-May-2023 |
Kazu Hirata <kazu@google.com> |
[llvm] Fix typos in documentation
|
Revision tags: llvmorg-16.0.3 |
|
#
a0183c20 |
| 26-Apr-2023 |
OCHyams <orlando.hyams@sony.com> |
Fix docs bot after D140989
Commit a93c4239719382e5b17335f3452e9095937ed6b7 broke docs buildbot: https://lab.llvm.org/buildbot/#/builders/30/builds/34525
|
#
a93c4239 |
| 26-Apr-2023 |
OCHyams <orlando.hyams@sony.com> |
[DebugInfo] Update SourceLevelDebugging.rst to better explain kill locations
Reviewed By: scott.linder, jryans
Differential Revision: https://reviews.llvm.org/D140989
|
Revision tags: llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3 |
|
#
1572742c |
| 18-Feb-2023 |
J. Ryan Stinnett <jryans@gmail.com> |
[DebugInfo][Docs] Remove `dbg.addr` from docs
Part of `dbg.addr` removal Discussed in https://discourse.llvm.org/t/what-is-the-status-of-dbg-addr/62898
Differential Revision: https://reviews.llvm.o
[DebugInfo][Docs] Remove `dbg.addr` from docs
Part of `dbg.addr` removal Discussed in https://discourse.llvm.org/t/what-is-the-status-of-dbg-addr/62898
Differential Revision: https://reviews.llvm.org/D144792
show more ...
|
Revision tags: llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5 |
|
#
65b130e3 |
| 02-Nov-2022 |
Aaron Ballman <aaron@aaronballman.com> |
Fix LLVM sphinx build bot
This should address the issue found in: https://lab.llvm.org/buildbot/#/builders/30/builds/27824
|
#
fcbf807b |
| 02-Nov-2022 |
OCHyams <orlando.hyams@sony.com> |
Fix Assignment Tracking docs error from 33c7ae55e729069be754f56c4d4606cdeddd377b
Buildbot link: https://lab.llvm.org/buildbot/#/builders/30/builds/27812
|
#
33c7ae55 |
| 02-Nov-2022 |
OCHyams <orlando.hyams@sony.com> |
[Assignment Tracking][1/*] Add initial docs for Assignment Tracking
The Assignment Tracking debug-info feature is outlined in this RFC:
https://discourse.llvm.org/t/ rfc-assignment-tracking-a-bet
[Assignment Tracking][1/*] Add initial docs for Assignment Tracking
The Assignment Tracking debug-info feature is outlined in this RFC:
https://discourse.llvm.org/t/ rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir
Add documentation outlining the intent and design.
show more ...
|
Revision tags: llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
|
#
eab6e94f |
| 06-Apr-2022 |
Chih-Ping Chen <chih-ping.chen@intel.com> |
[DebugInfo] Add a TargetFuncName field in DISubprogram for specifying DW_AT_trampoline as a string. Also update the signature of DIBuilder::createFunction to reflect this addition.
Differential Revi
[DebugInfo] Add a TargetFuncName field in DISubprogram for specifying DW_AT_trampoline as a string. Also update the signature of DIBuilder::createFunction to reflect this addition.
Differential Revision: https://reviews.llvm.org/D123697
show more ...
|
Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2 |
|
#
f9f78a2c |
| 11-Feb-2022 |
YASHASVI KHATAVKAR <yashasvi.khatavkar@intel.com> |
Fix build broken by missing empty line in SourceLevelDebugging.rst
|
#
70fdbf35 |
| 11-Feb-2022 |
YASHASVI KHATAVKAR <yashasvi.khatavkar@intel.com> |
Adding DiBuilder interface for assumed length strings
|
#
93d1a623 |
| 10-Feb-2022 |
YASHASVI KHATAVKAR <yashasvi.khatavkar@intel.com> |
Reverting an entire stack of changes causing build failures
|
Revision tags: llvmorg-14.0.0-rc1 |
|
#
ac15cd7a |
| 07-Feb-2022 |
YASHASVI KHATAVKAR <yashasvi.khatavkar@intel.com> |
Modified SourceLevelDebugging.rst to include information about memory location exp
|
Revision tags: llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
|
#
34435fd1 |
| 05-Jan-2022 |
Luís Ferreira <contact@lsferreira.net> |
[llvm] Add support for DW_TAG_immutable_type
Added documentation about DW_TAG_immutable_type too.
Reviewed By: probinson
Differential Revision: https://reviews.llvm.org/D113633
|
Revision tags: llvmorg-13.0.1-rc1 |
|
#
0c660256 |
| 15-Nov-2021 |
Shao-Ce SUN <shaoce@nj.iscas.ac.cn> |
[NFC] Trim trailing whitespace in *.rst
|
#
05963a3d |
| 09-Nov-2021 |
Arthur Eubanks <aeubanks@google.com> |
Revert "[DebugInfo] Enforce implicit constraints on `distinct` MDNodes"
This reverts commit ee7652569854af567ba83e5255d70e80cc8619a1.
Causes crashes, see comments in D104827.
|
#
ee765256 |
| 04-Nov-2021 |
Scott Linder <Scott.Linder@amd.com> |
[DebugInfo] Enforce implicit constraints on `distinct` MDNodes
Add UNIQUED and DISTINCT properties in Metadata.def and use them to implement restrictions on the `distinct` property of MDNodes:
* DI
[DebugInfo] Enforce implicit constraints on `distinct` MDNodes
Add UNIQUED and DISTINCT properties in Metadata.def and use them to implement restrictions on the `distinct` property of MDNodes:
* DIExpression can currently be parsed from IR or read from bitcode as `distinct`, but this property is silently dropped when printing to IR. This causes accepted IR to fail to round-trip. As DIExpression appears inline at each use in the canonical form of IR, it cannot actually be `distinct` anyway, as there is no syntax to describe it. * Similarly, DIArgList is conceptually always uniqued. It is currently restricted to only appearing in contexts where there is no syntax for `distinct`, but for consistency it is treated equivalently to DIExpression in this patch. * DICompileUnit is already restricted to always being `distinct`, but along with adding general support for the inverse restriction I went ahead and described this in Metadata.def and updated the parser to be general. Future nodes which have this restriction can share this support.
The new UNIQUED property applies to DIExpression and DIArgList, and forbids them to be `distinct`. It also implies they are canonically printed inline at each use, rather than via MDNode ID.
The new DISTINCT property applies to DICompileUnit, and requires it to be `distinct`.
A potential alternative change is to forbid the non-inline syntax for DIExpression entirely, as is done with DIArgList implicitly by requiring it appear in the context of a function. For example, we would forbid:
!named = !{!0} !0 = !DIExpression()
Instead we would only accept the equivalent inlined version:
!named = !{!DIExpression()}
This essentially removes the ability to create a `distinct` DIExpression by construction, as there is no syntax for `distinct` inline. If this patch is accepted as-is, the result would be that the non-canonical version is accepted, but the following would be an error and produce a diagnostic:
!named = !{!0} ; error: 'distinct' not allowed for !DIExpression() !0 = distinct !DIExpression()
Also update some documentation to consistently use the inline syntax for DIExpression, and to describe the restrictions on `distinct` for nodes where applicable.
Reviewed By: StephenTozer, t-tye
Differential Revision: https://reviews.llvm.org/D104827
show more ...
|
Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1 |
|
#
f623dc9a |
| 28-Jul-2021 |
Ellis Hoag <ellis.sparky.hoag@gmail.com> |
[DebugInfo][docs] Fix DISubprogram fields
D45024 renamed the field in `DISubprogram` from `variables:` to `retainedNodes:`. Some of the docs were updated in D89082 but this updates the rest.
Review
[DebugInfo][docs] Fix DISubprogram fields
D45024 renamed the field in `DISubprogram` from `variables:` to `retainedNodes:`. Some of the docs were updated in D89082 but this updates the rest.
Reviewed By: scott.linder
Differential Revision: https://reviews.llvm.org/D106926
show more ...
|
Revision tags: llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4 |
|
#
df686842 |
| 28-Jun-2021 |
Djordje Todorovic <djordje.todorovic@syrmia.com> |
[RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs
This new MIR pass removes redundant DBG_VALUEs.
After the register allocator is done, more precisely, after the Virtual Reg
[RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs
This new MIR pass removes redundant DBG_VALUEs.
After the register allocator is done, more precisely, after the Virtual Register Rewriter, we end up having duplicated DBG_VALUEs, since some virtual registers are being rewritten into the same physical register as some of existing DBG_VALUEs. Each DBG_VALUE should indicate (at least before the LiveDebugValues) variables assignment, but it is being clobbered for function parameters during the SelectionDAG since it generates new DBG_VALUEs after COPY instructions, even though the parameter has no assignment. For example, if we had a DBG_VALUE $regX as an entry debug value representing the parameter, and a COPY and after the COPY, DBG_VALUE $virt_reg, and after the virtregrewrite the $virt_reg gets rewritten into $regX, we'd end up having redundant DBG_VALUE.
This breaks the definition of the DBG_VALUE since some analysis passes might be built on top of that premise..., and this patch tries to fix the MIR with the respect to that.
This first patch performs bacward scan, by trying to detect a sequence of consecutive DBG_VALUEs, and to remove all DBG_VALUEs describing one variable but the last one:
For example:
(1) DBG_VALUE $edi, !"var1", ... (2) DBG_VALUE $esi, !"var2", ... (3) DBG_VALUE $edi, !"var1", ... ...
in this case, we can remove (1).
By combining the forward scan that will be introduced in the next patch (from this stack), by inspecting the statistics, the RemoveRedundantDebugValues removes 15032 instructions by using gdb-7.11 as a testbed.
Differential Revision: https://reviews.llvm.org/D105279
show more ...
|
#
52b5491a |
| 02-Jul-2021 |
Jonas Devlieghere <jonas@devlieghere.com> |
Revert "[DebugInfo] Enforce implicit constraints on `distinct` MDNodes"
This reverts commit 8cd35ad854ab4458fd509447359066ea3578b494.
It breaks `TestMembersAndLocalsWithSameName.py` on GreenDragon
Revert "[DebugInfo] Enforce implicit constraints on `distinct` MDNodes"
This reverts commit 8cd35ad854ab4458fd509447359066ea3578b494.
It breaks `TestMembersAndLocalsWithSameName.py` on GreenDragon and Mikael Holmén points out in D104827 that bitcode files created with the patch cannot be parsed with binaries built before it.
show more ...
|
#
8cd35ad8 |
| 28-Jun-2021 |
Scott Linder <Scott.Linder@amd.com> |
[DebugInfo] Enforce implicit constraints on `distinct` MDNodes
Add UNIQUED and DISTINCT properties in Metadata.def and use them to implement restrictions on the `distinct` property of MDNodes:
* DI
[DebugInfo] Enforce implicit constraints on `distinct` MDNodes
Add UNIQUED and DISTINCT properties in Metadata.def and use them to implement restrictions on the `distinct` property of MDNodes:
* DIExpression can currently be parsed from IR or read from bitcode as `distinct`, but this property is silently dropped when printing to IR. This causes accepted IR to fail to round-trip. As DIExpression appears inline at each use in the canonical form of IR, it cannot actually be `distinct` anyway, as there is no syntax to describe it. * Similarly, DIArgList is conceptually always uniqued. It is currently restricted to only appearing in contexts where there is no syntax for `distinct`, but for consistency it is treated equivalently to DIExpression in this patch. * DICompileUnit is already restricted to always being `distinct`, but along with adding general support for the inverse restriction I went ahead and described this in Metadata.def and updated the parser to be general. Future nodes which have this restriction can share this support.
The new UNIQUED property applies to DIExpression and DIArgList, and forbids them to be `distinct`. It also implies they are canonically printed inline at each use, rather than via MDNode ID.
The new DISTINCT property applies to DICompileUnit, and requires it to be `distinct`.
A potential alternative change is to forbid the non-inline syntax for DIExpression entirely, as is done with DIArgList implicitly by requiring it appear in the context of a function. For example, we would forbid:
!named = !{!0} !0 = !DIExpression()
Instead we would only accept the equivalent inlined version:
!named = !{!DIExpression()}
This essentially removes the ability to create a `distinct` DIExpression by construction, as there is no syntax for `distinct` inline. If this patch is accepted as-is, the result would be that the non-canonical version is accepted, but the following would be an error and produce a diagnostic:
!named = !{!0} ; error: 'distinct' not allowed for !DIExpression() !0 = distinct !DIExpression()
Also update some documentation to consistently use the inline syntax for DIExpression, and to describe the restrictions on `distinct` for nodes where applicable.
Reviewed By: StephenTozer, t-tye
Differential Revision: https://reviews.llvm.org/D104827
show more ...
|
Revision tags: llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3 |
|
#
f6774130 |
| 04-Mar-2021 |
Stephen Tozer <Stephen.Tozer@Sony.com> |
Reapply "[DebugInfo] Add new instruction and DIExpression operator for variadic debug values"
Rewrites test to use correct architecture triple; fixes incorrect reference in SourceLevelDebugging doc
Reapply "[DebugInfo] Add new instruction and DIExpression operator for variadic debug values"
Rewrites test to use correct architecture triple; fixes incorrect reference in SourceLevelDebugging doc; simplifies `spillReg` behaviour so as to not be dependent on changes elsewhere in the patch stack.
This reverts commit d2000b45d033c06dc7973f59909a0ad12887ff51.
show more ...
|