History log of /dpdk/drivers/regex/mlx5/mlx5_regex.c (Results 1 – 25 of 50)
Revision Date Author Comments
# 0a9fff95 20-Feb-2023 Raslan Darawsheh <rasland@nvidia.com>

drivers: rename NVIDIA BlueField device IDs

This updates the PCI device names for all NVIDIA BlueField
family.

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>


# 1f37cb2b 28-Jul-2022 David Marchand <david.marchand@redhat.com>

bus/pci: make driver-only headers private

The pci bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.

While at it, cleanup the code:
- fix indentatio

bus/pci: make driver-only headers private

The pci bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.

While at it, cleanup the code:
- fix indentation,
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and fix the code that relied on implicit
inclusion,

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>

show more ...


# a729d2f0 14-Feb-2022 Michael Baum <michaelba@nvidia.com>

common/mlx5: refactor devargs management

Improve the devargs handling in two aspects:
- Parse the devargs string only once.
- Return error and report for unknown keys.

The common driver parses on

common/mlx5: refactor devargs management

Improve the devargs handling in two aspects:
- Parse the devargs string only once.
- Return error and report for unknown keys.

The common driver parses once the devargs string into a dictionary, then
provides it to all the drivers' probe. Each driver updates within it
which keys it has used, then common driver receives the updated
dictionary and reports about unknown devargs.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# 06c047b6 09-Feb-2022 Stephen Hemminger <stephen@networkplumber.org>

remove unnecessary null checks

Functions like free, rte_free, and rte_mempool_free
already handle NULL pointer so the checks here are not necessary.

Remove redundant NULL pointer checks before free

remove unnecessary null checks

Functions like free, rte_free, and rte_mempool_free
already handle NULL pointer so the checks here are not necessary.

Remove redundant NULL pointer checks before free functions
found by nullfree.cocci

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>

show more ...


# 5dfa003d 03-Nov-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: fix post doorbell barrier

The rdma-core library can map doorbell register in two ways, depending
on the environment variable "MLX5_SHUT_UP_BF":

- as regular cached memory, the variab

common/mlx5: fix post doorbell barrier

The rdma-core library can map doorbell register in two ways, depending
on the environment variable "MLX5_SHUT_UP_BF":

- as regular cached memory, the variable is either missing or set to
zero. This type of mapping may cause the significant doorbell
register writing latency and requires an explicit memory write
barrier to mitigate this issue and prevent write combining.

- as non-cached memory, the variable is present and set to not "0"
value. This type of mapping may cause performance impact under
heavy loading conditions but the explicit write memory barrier is
not required and it may improve core performance.

The UAR creation function maps a doorbell in one of the above ways
according to the system. In run time, it always adds an explicit memory
barrier after writing to.
In cases where the doorbell was mapped as non-cached memory, the
explicit memory barrier is unnecessary and may impair performance.

The commit [1] solved this problem for a Tx queue. In run time, it
checks the mapping type and provides the memory barrier after writing to
a Tx doorbell register if it is needed. The mapping type is extracted
directly from the uar_mmap_offset field in the queue properties.

This patch shares this code between the drivers and extends the above
solution for each of them.

[1] commit 8409a28573d3
("net/mlx5: control transmit doorbell register mapping")

Fixes: f8c97babc9f4 ("compress/mlx5: add data-path functions")
Fixes: 8e196c08ab53 ("crypto/mlx5: support enqueue/dequeue operations")
Fixes: 4d4e245ad637 ("regex/mlx5: support enqueue")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# b4371d3d 03-Nov-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: fix doorbell mapping configuration

UAR mapping type can be affected by the devarg tx_db_nc, which can cause
setting the environment variable MLX5_SHUT_UP_BF.
So, the MLX5_SHUT_UP_BF val

common/mlx5: fix doorbell mapping configuration

UAR mapping type can be affected by the devarg tx_db_nc, which can cause
setting the environment variable MLX5_SHUT_UP_BF.
So, the MLX5_SHUT_UP_BF value and the UAR mapping parameter affect the
UAR cache mode.

Wrongly, the devarg was considered for the MLX5_SHUT_UP_BF but not for
the UAR mapping parameter in all the drivers except the net.

Take the tx_db_nc devarg into account for all the drivers.

Fixes: ca1418ce3910 ("common/mlx5: share device context object")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# 02179f82 22-Oct-2021 Francis Kelly <fkelly@nvidia.com>

regex/mlx5: remove RXP CSR file

The mlx5_rxp_csrs.h file has been deprecated as
its contents has now been moved to FW.

Signed-off-by: Francis Kelly <fkelly@nvidia.com>
Acked-by: Ori Kam <orika@nvid

regex/mlx5: remove RXP CSR file

The mlx5_rxp_csrs.h file has been deprecated as
its contents has now been moved to FW.

Signed-off-by: Francis Kelly <fkelly@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>

show more ...


# 7281f194 22-Oct-2021 Ady Agbarih <adypodoman@gmail.com>

regex/mlx5: remove engine start/stop commands

Remove the engine start/stop DevX commands,
as they have been deprecated and moved to FW.

Signed-off-by: Ady Agbarih <adypodoman@gmail.com>


# ab2e0b0d 22-Oct-2021 Ady Agbarih <adypodoman@gmail.com>

regex/mlx5: remove register read/write

Remove the set/query regexp register commands from DevX.
Remove functions that used these commands.
Remove manual rules programming.

Signed-off-by: Ady Agbari

regex/mlx5: remove register read/write

Remove the set/query regexp register commands from DevX.
Remove functions that used these commands.
Remove manual rules programming.

Signed-off-by: Ady Agbarih <adypodoman@gmail.com>
Acked-by: Ori Kam <orika@nvidia.com>

show more ...


# 1663c140 22-Oct-2021 Ady Agbarih <adypodoman@gmail.com>

common/mlx5: update regex DevX commands

This patch modifies the SET_REGEXP_PARAMS DevX command as follows:

Remove DB setup DevX command. The command is no longer needed
in DPDK, it will always be i

common/mlx5: update regex DevX commands

This patch modifies the SET_REGEXP_PARAMS DevX command as follows:

Remove DB setup DevX command. The command is no longer needed
in DPDK, it will always be invoked by the regex-daemon.

Add new DevX command, for programming ROF rules for a specific engine.
The command takes as an input an mkey of the ROF.
It also introduces a new field_select bit.

Signed-off-by: Ady Agbarih <adypodoman@gmail.com>
Acked-by: Ori Kam <orika@nvidia.com>

show more ...


# fe375336 22-Oct-2021 Ori Kam <orika@nvidia.com>

regex/mlx5: add cleanup on stop

When stopping the device we should release all
data allocated.

After rte_regexdev_configure(), the QPs are pre-allocated,
and will be configured only in rte_regexdev

regex/mlx5: add cleanup on stop

When stopping the device we should release all
data allocated.

After rte_regexdev_configure(), the QPs are pre-allocated,
and will be configured only in rte_regexdev_queue_pair_setup().
That's why the QP jobs array initialization is checked
before attempting to destroy the QP.

Signed-off-by: Ori Kam <orika@nvidia.com>
Signed-off-by: Ady Agbarih <adypodoman@gmail.com>

show more ...


# 2044860e 22-Oct-2021 Ady Agbarih <adypodoman@gmail.com>

common/mlx5: update PRM definitions for regex

Update PRM hca capabilities definitions as follows:
regexp_version field added - specifies whether BF2 or BF3
regexp field removed
regexp_params field m

common/mlx5: update PRM definitions for regex

Update PRM hca capabilities definitions as follows:
regexp_version field added - specifies whether BF2 or BF3
regexp field removed
regexp_params field moved
regexp_log_crspace_size field removed
regexp_mmo added - specifies if using regex mmo wqe is supported

Allow regex only if both regexp_params and regexp_mmo are set,
instead of checking regexp_mmo only.

Check version through the new capability field regexp_version instead
of reading crspace register.

Signed-off-by: Ady Agbarih <adypodoman@gmail.com>
Acked-by: Ori Kam <orika@nvidia.com>

show more ...


# fc59a1ec 19-Oct-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: share MR mempool registration

Expand the use of mempool registration to MR management for other
drivers.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan

common/mlx5: share MR mempool registration

Expand the use of mempool registration to MR management for other
drivers.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# 9f1d636f 19-Oct-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: share MR management

Add global shared MR cache as a field of common device structure.
Move MR management to use this global cache for all drivers.

Signed-off-by: Michael Baum <michaelb

common/mlx5: share MR management

Add global shared MR cache as a field of common device structure.
Move MR management to use this global cache for all drivers.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# 5fbc75ac 19-Oct-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: add global MR cache create function

Add function for global shared MR cache structure initialization.
This function include:
- btree initialization.
- set callbacks for reg and dereg

common/mlx5: add global MR cache create function

Add function for global shared MR cache structure initialization.
This function include:
- btree initialization.
- set callbacks for reg and dereg MR.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# fe46b20c 19-Oct-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: share HCA capabilities handle

Add HCA attributes structure as a field of device config structure.
It query in common probing, and updates the timestamp format fields.

Each driver use H

common/mlx5: share HCA capabilities handle

Add HCA attributes structure as a field of device config structure.
It query in common probing, and updates the timestamp format fields.

Each driver use HCA attributes from common device config structure,
instead of query it for itself.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# e35ccf24 19-Oct-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: share protection domain object

Create shared Protection Domain in common area and add it and its PDN as
fields of common device structure.

Use this Protection Domain in all drivers and

common/mlx5: share protection domain object

Create shared Protection Domain in common area and add it and its PDN as
fields of common device structure.

Use this Protection Domain in all drivers and remove the PD and PDN
fields from their private structure.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# ca1418ce 19-Oct-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: share device context object

Create shared context device in common area and add it as a field of
common device.
Use this context device in all drivers and remove the ctx field from
thei

common/mlx5: share device context object

Create shared context device in common area and add it as a field of
common device.
Use this context device in all drivers and remove the ctx field from
their private structure.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# 7af08c8f 19-Oct-2021 Michael Baum <michaelba@nvidia.com>

common/mlx5: share basic probing with internal drivers

Create common probing structure that includes, for now, basic probing
information detected by the common driver and share it with all the
inter

common/mlx5: share basic probing with internal drivers

Create common probing structure that includes, for now, basic probing
information detected by the common driver and share it with all the
internal drivers.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# 27003260 05-Oct-2021 Raja Zidane <rzidane@nvidia.com>

regex/mlx5: refactor HW queue objects

The mlx5 PMD for regex class uses an MMO WQE operated by the GGA engine
in BF devices.
Currently, all the MMO WQEs are managed by the SQ object.
Starting from B

regex/mlx5: refactor HW queue objects

The mlx5 PMD for regex class uses an MMO WQE operated by the GGA engine
in BF devices.
Currently, all the MMO WQEs are managed by the SQ object.
Starting from BF3, the queue of the MMO WQEs should be connected to the
GGA engine using a new configuration, MMO, that will be supported only
in the QP object.
The FW introduced new capabilities to define whether the MMO
configuration should be configured for the GGA queue.
Replace all the GGA queue objects to QP, set MMO configuration according
to the new FW capabilities.

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

show more ...


# 0972b7ba 31-Aug-2021 Michael Baum <michaelba@nvidia.com>

regex/mlx5: fix leak after probing failure

In RegEx device probing, there is register read trying after context
device creation.

When the reading fails, the context device was not freed what caused

regex/mlx5: fix leak after probing failure

In RegEx device probing, there is register read trying after context
device creation.

When the reading fails, the context device was not freed what caused a
memory leak.

Free it.

Fixes: f324162e8e77 ("regex/mlx5: support combined rule file")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>

show more ...


# 34c84ebb 12-Jul-2021 Michael Baum <michaelba@nvidia.com>

regex/mlx5: fix redundancy in device removal

In the removal function, PMD releases all driver resources and
cancels the regexdev registry.

However, regexdev registration is accidentally canceled tw

regex/mlx5: fix redundancy in device removal

In the removal function, PMD releases all driver resources and
cancels the regexdev registry.

However, regexdev registration is accidentally canceled twice.
Remove one of them.

Fixes: b34d816363b5 ("regex/mlx5: support rules import")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>

show more ...


# a1fcde8c 12-Jul-2021 Michael Baum <michaelba@nvidia.com>

regex/mlx5: fix leak on device removal

In the removal function, PMD releases all driver resources allocated
in the probe function.

The MR btree memory is allocated in the probe function, but it is

regex/mlx5: fix leak on device removal

In the removal function, PMD releases all driver resources allocated
in the probe function.

The MR btree memory is allocated in the probe function, but it is not
freed in remove function what caused a memory leak.

Release it.

Fixes: cda883bbb655 ("regex/mlx5: add dynamic memory registration to datapath")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>

show more ...


# 29ca3215 12-Jul-2021 Michael Baum <michaelba@nvidia.com>

regex/mlx5: fix memory region unregistration

The issue can cause illegal physical address access while a huge-page A
is released and huge-page B is allocated on the same virtual address.
The old MR

regex/mlx5: fix memory region unregistration

The issue can cause illegal physical address access while a huge-page A
is released and huge-page B is allocated on the same virtual address.
The old MR can be matched using the virtual address of huge-page B but
the HW will access the physical address of huge-page A which is no more
part of the DPDK process.

Register a driver callback for memory event in order to free out all the
MRs of memory that is going to be freed from the DPDK process.

Fixes: cda883bbb655 ("regex/mlx5: add dynamic memory registration to datapath")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>

show more ...


# 0564ddea 21-Jul-2021 Xueming Li <xuemingl@nvidia.com>

regex/mlx5: migrate to bus-agnostic common interface

To support auxiliary bus, upgrades driver to use mlx5 common driver
structure.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viaches

regex/mlx5: migrate to bus-agnostic common interface

To support auxiliary bus, upgrades driver to use mlx5 common driver
structure.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

show more ...


12