1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_log.h> 7 #include <rte_errno.h> 8 #include <rte_pci.h> 9 #include <rte_regexdev.h> 10 #include <rte_regexdev_core.h> 11 #include <rte_regexdev_driver.h> 12 #include <rte_bus_pci.h> 13 14 #include <mlx5_common.h> 15 #include <mlx5_common_mr.h> 16 #include <mlx5_glue.h> 17 #include <mlx5_devx_cmds.h> 18 #include <mlx5_prm.h> 19 20 #include "mlx5_regex.h" 21 #include "mlx5_regex_utils.h" 22 #include "mlx5_rxp_csrs.h" 23 24 #define MLX5_REGEX_DRIVER_NAME regex_mlx5 25 26 int mlx5_regex_logtype; 27 28 const struct rte_regexdev_ops mlx5_regexdev_ops = { 29 .dev_info_get = mlx5_regex_info_get, 30 .dev_configure = mlx5_regex_configure, 31 .dev_db_import = mlx5_regex_rules_db_import, 32 .dev_qp_setup = mlx5_regex_qp_setup, 33 .dev_start = mlx5_regex_start, 34 .dev_stop = mlx5_regex_stop, 35 .dev_close = mlx5_regex_close, 36 }; 37 38 int 39 mlx5_regex_start(struct rte_regexdev *dev) 40 { 41 struct mlx5_regex_priv *priv = dev->data->dev_private; 42 43 return mlx5_dev_mempool_subscribe(priv->cdev); 44 } 45 46 int 47 mlx5_regex_stop(struct rte_regexdev *dev __rte_unused) 48 { 49 struct mlx5_regex_priv *priv = dev->data->dev_private; 50 51 mlx5_regex_clean_ctrl(dev); 52 rte_free(priv->qps); 53 priv->qps = NULL; 54 55 return 0; 56 } 57 58 int 59 mlx5_regex_close(struct rte_regexdev *dev __rte_unused) 60 { 61 return 0; 62 } 63 64 static void 65 mlx5_regex_get_name(char *name, struct rte_device *dev) 66 { 67 sprintf(name, "mlx5_regex_%s", dev->name); 68 } 69 70 static int 71 mlx5_regex_dev_probe(struct mlx5_common_device *cdev) 72 { 73 struct mlx5_regex_priv *priv = NULL; 74 struct mlx5_hca_attr *attr = &cdev->config.hca_attr; 75 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 76 77 if ((!attr->regexp_params && !attr->mmo_regex_sq_en && !attr->mmo_regex_qp_en) 78 || attr->regexp_num_of_engines == 0) { 79 DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe " 80 "old FW/OFED version?"); 81 rte_errno = ENOTSUP; 82 return -rte_errno; 83 } 84 priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv), 85 RTE_CACHE_LINE_SIZE); 86 if (!priv) { 87 DRV_LOG(ERR, "Failed to allocate private memory."); 88 rte_errno = ENOMEM; 89 return -rte_errno; 90 } 91 priv->mmo_regex_qp_cap = attr->mmo_regex_qp_en; 92 priv->mmo_regex_sq_cap = attr->mmo_regex_sq_en; 93 priv->cdev = cdev; 94 priv->nb_engines = 2; /* attr.regexp_num_of_engines */ 95 if (attr->regexp_version == MLX5_RXP_BF2_IDENTIFIER) 96 priv->is_bf2 = 1; 97 /* Default RXP programming mode to Shared. */ 98 priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE; 99 mlx5_regex_get_name(name, cdev->dev); 100 priv->regexdev = rte_regexdev_register(name); 101 if (priv->regexdev == NULL) { 102 DRV_LOG(ERR, "Failed to register RegEx device."); 103 rte_errno = rte_errno ? rte_errno : EINVAL; 104 goto dev_error; 105 } 106 /* 107 * This PMD always claims the write memory barrier on UAR 108 * registers writings, it is safe to allocate UAR with any 109 * memory mapping type. 110 */ 111 priv->uar = mlx5_devx_alloc_uar(priv->cdev->ctx, -1); 112 if (!priv->uar) { 113 DRV_LOG(ERR, "can't allocate uar."); 114 rte_errno = ENOMEM; 115 goto error; 116 } 117 priv->regexdev->dev_ops = &mlx5_regexdev_ops; 118 priv->regexdev->enqueue = mlx5_regexdev_enqueue; 119 #ifdef HAVE_MLX5_UMR_IMKEY 120 if (!attr->umr_indirect_mkey_disabled && 121 !attr->umr_modify_entity_size_disabled) 122 priv->has_umr = 1; 123 if (priv->has_umr) 124 priv->regexdev->enqueue = mlx5_regexdev_enqueue_gga; 125 #endif 126 priv->regexdev->dequeue = mlx5_regexdev_dequeue; 127 priv->regexdev->device = cdev->dev; 128 priv->regexdev->data->dev_private = priv; 129 priv->regexdev->state = RTE_REGEXDEV_READY; 130 DRV_LOG(INFO, "RegEx GGA is %s.", 131 priv->has_umr ? "supported" : "unsupported"); 132 return 0; 133 134 error: 135 if (priv->uar) 136 mlx5_glue->devx_free_uar(priv->uar); 137 if (priv->regexdev) 138 rte_regexdev_unregister(priv->regexdev); 139 dev_error: 140 if (priv) 141 rte_free(priv); 142 return -rte_errno; 143 } 144 145 static int 146 mlx5_regex_dev_remove(struct mlx5_common_device *cdev) 147 { 148 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 149 struct rte_regexdev *dev; 150 struct mlx5_regex_priv *priv = NULL; 151 152 mlx5_regex_get_name(name, cdev->dev); 153 dev = rte_regexdev_get_device_by_name(name); 154 if (!dev) 155 return 0; 156 priv = dev->data->dev_private; 157 if (priv) { 158 if (priv->uar) 159 mlx5_glue->devx_free_uar(priv->uar); 160 if (priv->regexdev) 161 rte_regexdev_unregister(priv->regexdev); 162 rte_free(priv); 163 } 164 return 0; 165 } 166 167 static const struct rte_pci_id mlx5_regex_pci_id_map[] = { 168 { 169 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, 170 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF) 171 }, 172 { 173 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, 174 PCI_DEVICE_ID_MELLANOX_CONNECTX7BF) 175 }, 176 { 177 .vendor_id = 0 178 } 179 }; 180 181 static struct mlx5_class_driver mlx5_regex_driver = { 182 .drv_class = MLX5_CLASS_REGEX, 183 .name = RTE_STR(MLX5_REGEX_DRIVER_NAME), 184 .id_table = mlx5_regex_pci_id_map, 185 .probe = mlx5_regex_dev_probe, 186 .remove = mlx5_regex_dev_remove, 187 }; 188 189 RTE_INIT(rte_mlx5_regex_init) 190 { 191 mlx5_common_init(); 192 if (mlx5_glue) 193 mlx5_class_driver_register(&mlx5_regex_driver); 194 } 195 196 RTE_LOG_REGISTER_DEFAULT(mlx5_regex_logtype, NOTICE) 197 RTE_PMD_EXPORT_NAME(MLX5_REGEX_DRIVER_NAME, __COUNTER__); 198 RTE_PMD_REGISTER_PCI_TABLE(MLX5_REGEX_DRIVER_NAME, mlx5_regex_pci_id_map); 199 RTE_PMD_REGISTER_KMOD_DEP(MLX5_REGEX_DRIVER_NAME, "* ib_uverbs & mlx5_core & mlx5_ib"); 200