1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_log.h> 7 #include <rte_errno.h> 8 #include <rte_pci.h> 9 #include <rte_regexdev.h> 10 #include <rte_regexdev_core.h> 11 #include <rte_regexdev_driver.h> 12 #include <rte_bus_pci.h> 13 14 #include <mlx5_common.h> 15 #include <mlx5_common_mr.h> 16 #include <mlx5_glue.h> 17 #include <mlx5_devx_cmds.h> 18 #include <mlx5_prm.h> 19 20 #include "mlx5_regex.h" 21 #include "mlx5_regex_utils.h" 22 #include "mlx5_rxp_csrs.h" 23 24 #define MLX5_REGEX_DRIVER_NAME regex_mlx5 25 26 int mlx5_regex_logtype; 27 28 const struct rte_regexdev_ops mlx5_regexdev_ops = { 29 .dev_info_get = mlx5_regex_info_get, 30 .dev_configure = mlx5_regex_configure, 31 .dev_db_import = mlx5_regex_rules_db_import, 32 .dev_qp_setup = mlx5_regex_qp_setup, 33 .dev_start = mlx5_regex_start, 34 .dev_stop = mlx5_regex_stop, 35 .dev_close = mlx5_regex_close, 36 }; 37 38 int 39 mlx5_regex_start(struct rte_regexdev *dev) 40 { 41 struct mlx5_regex_priv *priv = dev->data->dev_private; 42 43 return mlx5_dev_mempool_subscribe(priv->cdev); 44 } 45 46 int 47 mlx5_regex_stop(struct rte_regexdev *dev __rte_unused) 48 { 49 return 0; 50 } 51 52 int 53 mlx5_regex_close(struct rte_regexdev *dev __rte_unused) 54 { 55 return 0; 56 } 57 58 static int 59 mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines) 60 { 61 uint32_t fpga_ident = 0; 62 int err; 63 int i; 64 65 for (i = 0; i < num_engines; i++) { 66 err = mlx5_devx_regex_register_read(ctx, i, 67 MLX5_RXP_CSR_IDENTIFIER, 68 &fpga_ident); 69 fpga_ident = (fpga_ident & (0x0000FFFF)); 70 if (err || fpga_ident != MLX5_RXP_IDENTIFIER) { 71 DRV_LOG(ERR, "Failed setup RXP %d err %d database " 72 "memory 0x%x", i, err, fpga_ident); 73 if (!err) 74 err = EINVAL; 75 return err; 76 } 77 } 78 return 0; 79 } 80 81 static void 82 mlx5_regex_get_name(char *name, struct rte_device *dev) 83 { 84 sprintf(name, "mlx5_regex_%s", dev->name); 85 } 86 87 static int 88 mlx5_regex_dev_probe(struct mlx5_common_device *cdev) 89 { 90 struct mlx5_regex_priv *priv = NULL; 91 struct mlx5_hca_attr *attr = &cdev->config.hca_attr; 92 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 93 94 if ((!attr->regexp_params && !attr->mmo_regex_sq_en && !attr->mmo_regex_qp_en) 95 || attr->regexp_num_of_engines == 0) { 96 DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe " 97 "old FW/OFED version?"); 98 rte_errno = ENOTSUP; 99 return -rte_errno; 100 } 101 if (mlx5_regex_engines_status(cdev->ctx, 2)) { 102 DRV_LOG(ERR, "RegEx engine error."); 103 rte_errno = ENOMEM; 104 return -rte_errno; 105 } 106 priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv), 107 RTE_CACHE_LINE_SIZE); 108 if (!priv) { 109 DRV_LOG(ERR, "Failed to allocate private memory."); 110 rte_errno = ENOMEM; 111 return -rte_errno; 112 } 113 priv->mmo_regex_qp_cap = attr->mmo_regex_qp_en; 114 priv->mmo_regex_sq_cap = attr->mmo_regex_sq_en; 115 priv->cdev = cdev; 116 priv->nb_engines = 2; /* attr.regexp_num_of_engines */ 117 if (attr->regexp_version == MLX5_RXP_BF2_IDENTIFIER) 118 priv->is_bf2 = 1; 119 /* Default RXP programming mode to Shared. */ 120 priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE; 121 mlx5_regex_get_name(name, cdev->dev); 122 priv->regexdev = rte_regexdev_register(name); 123 if (priv->regexdev == NULL) { 124 DRV_LOG(ERR, "Failed to register RegEx device."); 125 rte_errno = rte_errno ? rte_errno : EINVAL; 126 goto dev_error; 127 } 128 /* 129 * This PMD always claims the write memory barrier on UAR 130 * registers writings, it is safe to allocate UAR with any 131 * memory mapping type. 132 */ 133 priv->uar = mlx5_devx_alloc_uar(priv->cdev->ctx, -1); 134 if (!priv->uar) { 135 DRV_LOG(ERR, "can't allocate uar."); 136 rte_errno = ENOMEM; 137 goto error; 138 } 139 priv->regexdev->dev_ops = &mlx5_regexdev_ops; 140 priv->regexdev->enqueue = mlx5_regexdev_enqueue; 141 #ifdef HAVE_MLX5_UMR_IMKEY 142 if (!attr->umr_indirect_mkey_disabled && 143 !attr->umr_modify_entity_size_disabled) 144 priv->has_umr = 1; 145 if (priv->has_umr) 146 priv->regexdev->enqueue = mlx5_regexdev_enqueue_gga; 147 #endif 148 priv->regexdev->dequeue = mlx5_regexdev_dequeue; 149 priv->regexdev->device = cdev->dev; 150 priv->regexdev->data->dev_private = priv; 151 priv->regexdev->state = RTE_REGEXDEV_READY; 152 DRV_LOG(INFO, "RegEx GGA is %s.", 153 priv->has_umr ? "supported" : "unsupported"); 154 return 0; 155 156 error: 157 if (priv->uar) 158 mlx5_glue->devx_free_uar(priv->uar); 159 if (priv->regexdev) 160 rte_regexdev_unregister(priv->regexdev); 161 dev_error: 162 if (priv) 163 rte_free(priv); 164 return -rte_errno; 165 } 166 167 static int 168 mlx5_regex_dev_remove(struct mlx5_common_device *cdev) 169 { 170 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 171 struct rte_regexdev *dev; 172 struct mlx5_regex_priv *priv = NULL; 173 174 mlx5_regex_get_name(name, cdev->dev); 175 dev = rte_regexdev_get_device_by_name(name); 176 if (!dev) 177 return 0; 178 priv = dev->data->dev_private; 179 if (priv) { 180 if (priv->uar) 181 mlx5_glue->devx_free_uar(priv->uar); 182 if (priv->regexdev) 183 rte_regexdev_unregister(priv->regexdev); 184 rte_free(priv); 185 } 186 return 0; 187 } 188 189 static const struct rte_pci_id mlx5_regex_pci_id_map[] = { 190 { 191 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, 192 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF) 193 }, 194 { 195 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, 196 PCI_DEVICE_ID_MELLANOX_CONNECTX7BF) 197 }, 198 { 199 .vendor_id = 0 200 } 201 }; 202 203 static struct mlx5_class_driver mlx5_regex_driver = { 204 .drv_class = MLX5_CLASS_REGEX, 205 .name = RTE_STR(MLX5_REGEX_DRIVER_NAME), 206 .id_table = mlx5_regex_pci_id_map, 207 .probe = mlx5_regex_dev_probe, 208 .remove = mlx5_regex_dev_remove, 209 }; 210 211 RTE_INIT(rte_mlx5_regex_init) 212 { 213 mlx5_common_init(); 214 if (mlx5_glue) 215 mlx5_class_driver_register(&mlx5_regex_driver); 216 } 217 218 RTE_LOG_REGISTER_DEFAULT(mlx5_regex_logtype, NOTICE) 219 RTE_PMD_EXPORT_NAME(MLX5_REGEX_DRIVER_NAME, __COUNTER__); 220 RTE_PMD_REGISTER_PCI_TABLE(MLX5_REGEX_DRIVER_NAME, mlx5_regex_pci_id_map); 221 RTE_PMD_REGISTER_KMOD_DEP(MLX5_REGEX_DRIVER_NAME, "* ib_uverbs & mlx5_core & mlx5_ib"); 222