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Searched refs:getLocReg (Results 1 – 25 of 32) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp115 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?"); in assignValueToReg()
165 assignValueToReg(NewRegs[0], VA.getLocReg(), VA); in assignCustomValue()
166 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA); in assignCustomValue()
170 assignValueToReg(NewRegs[0], VA.getLocReg(), VA); in assignCustomValue()
171 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA); in assignCustomValue()
286 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?"); in assignValueToReg()
333 assignValueToReg(NewRegs[0], VA.getLocReg(), VA); in assignCustomValue()
334 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA); in assignCustomValue()
H A DARMFastISel.cpp1981 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(Arg); in ProcessCallArgs()
1982 RegArgs.push_back(VA.getLocReg()); in ProcessCallArgs()
1995 TII.get(ARM::VMOVRRD), VA.getLocReg()) in ProcessCallArgs()
1996 .addReg(NextVA.getLocReg(), RegState::Define) in ProcessCallArgs()
1998 RegArgs.push_back(VA.getLocReg()); in ProcessCallArgs()
1999 RegArgs.push_back(NextVA.getLocReg()); in ProcessCallArgs()
2045 .addReg(RVLocs[0].getLocReg()) in FinishCall()
2046 .addReg(RVLocs[1].getLocReg())); in FinishCall()
2048 UsedRegs.push_back(RVLocs[0].getLocReg()); in FinishCall()
2049 UsedRegs.push_back(RVLocs[1].getLocReg()); in FinishCall()
[all …]
H A DARMISelLowering.cpp2198 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
2203 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
2217 Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); in LowerCallResult()
2221 Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); in LowerCallResult()
2231 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), in LowerCallResult()
2296 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id))); in PassF64ArgInRegs()
2299 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id))); in PassF64ArgInRegs()
2549 CSInfo.emplace_back(VA.getLocReg(), i); in LowerCall()
2550 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
3262 DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp177 auto CopyLo = MIRBuilder.buildCopy(LLT::scalar(32), VALo.getLocReg()); in assignCustomValue()
178 auto CopyHi = MIRBuilder.buildCopy(LLT::scalar(32), VAHi.getLocReg()); in assignCustomValue()
186 markPhysRegUsed(VALo.getLocReg()); in assignCustomValue()
187 markPhysRegUsed(VAHi.getLocReg()); in assignCustomValue()
283 MIRBuilder.buildCopy(VALo.getLocReg(), Lo); in assignCustomValue()
284 MIRBuilder.buildCopy(VAHi.getLocReg(), Hi); in assignCustomValue()
288 MIRBuilder.buildCopy(VALo.getLocReg(), Lo); in assignCustomValue()
289 MIRBuilder.buildCopy(VAHi.getLocReg(), Hi); in assignCustomValue()
H A DMipsFastISel.cpp1225 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
1226 CLI.OutRegs.push_back(VA.getLocReg()); in processCallArgs()
1296 ResultReg).addReg(RVLocs[0].getLocReg()); in finishCall()
1297 CLI.InRegs.push_back(RVLocs[0].getLocReg()); in finishCall()
1722 Register DestReg = VA.getLocReg(); in selectRet()
1763 RetRegs.push_back(VA.getLocReg()); in selectRet()
H A DMipsISelLowering.cpp3312 Register LocRegLo = VA.getLocReg(); in LowerCall()
3313 Register LocRegHigh = ArgLocs[++i].getLocReg(); in LowerCall()
3354 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
3358 if (Mips::AFGR64RegClass.contains(VA.getLocReg())) in LowerCall()
3364 CSInfo.emplace_back(VA.getLocReg(), i); in LowerCall()
3515 SDValue Val = DAG.getCopyFromReg(Chain, DL, RVLocs[i].getLocReg(), in LowerCallResult()
3682 Register ArgReg = VA.getLocReg(); in LowerFormalArguments()
3704 addLiveIn(DAG.getMachineFunction(), NextVA.getLocReg(), RC); in LowerFormalArguments()
3881 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Flag); in LowerReturn()
3885 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DCallingConvLower.cpp74 if (ValAssign.isRegLoc() && TRI.regsOverlap(ValAssign.getLocReg(), Reg)) in IsShadowAllocatedReg()
227 Regs.push_back(MCPhysReg(Locs[I].getLocReg())); in getRemainingRegParmsForType()
281 return Loc1.getLocReg() == Loc2.getLocReg(); in resultsCompatible()
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp251 RegInfo.addLiveIn(VA.getLocReg(), VReg); in unpackFromRegLoc()
304 RegInfo.addLiveIn(VA.getLocReg(), LoVReg); in unpack64()
307 if (VA.getLocReg() == CSKY::R3) { in unpack64()
316 RegInfo.addLiveIn(VA.getLocReg() + 1, HiVReg); in unpack64()
464 Register RegLo = VA.getLocReg(); in LowerReturn()
477 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue); in LowerReturn()
481 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
581 Register RegLo = VA.getLocReg(); in LowerCall()
609 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
722 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue); in LowerCall()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp297 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag); in LowerReturn_32()
299 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
301 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1, in LowerReturn_32()
304 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Arg, Flag); in LowerReturn_32()
308 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
391 if (i+1 < RVLocs.size() && RVLocs[i+1].getLocReg() == VA.getLocReg()) { in LowerReturn_64()
399 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn_64()
403 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_64()
467 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi); in LowerFormalArguments_32()
480 Register loReg = MF.addLiveIn(NextVA.getLocReg(), in LowerFormalArguments_32()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp335 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerFormalArguments()
443 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
529 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag); in LowerReturn()
534 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
567 Chain = DAG.getCopyFromReg(Chain, DL, Val.getLocReg(), in LowerCallResult()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp323 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
417 DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(), Glue); in lowerCallResult()
530 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCallArguments()
701 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); in LowerReturn()
706 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp808 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA); in handleAssignments()
811 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA); in handleAssignments()
993 MCRegister PhysReg = ArgLoc.getLocReg(); in parametersInCSRMatch()
1074 if (Loc1.getLocReg() != Loc2.getLocReg()) in resultsCompatible()
/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp460 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
562 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag); in LowerReturn()
566 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
691 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
788 Chain = DAG.getCopyFromReg(Chain, DL, RVLocs[I].getLocReg(), in LowerCallResult()
/openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp654 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
765 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
771 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
851 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
948 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), in LowerCallResult()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h126 Register getLocReg() const { return std::get<Register>(Data); } in getLocReg() function
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86FastISel.cpp1233 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) in X86SelectRet()
1263 Register DstReg = VA.getLocReg(); in X86SelectRet()
1272 RetRegs.push_back(VA.getLocReg()); in X86SelectRet()
3387 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in fastLowerCall()
3388 OutRegs.push_back(VA.getLocReg()); in fastLowerCall()
3538 Register SrcReg = VA.getLocReg(); in fastLowerCall()
3557 InRegs.push_back(VA.getLocReg()); in fastLowerCall()
/openbsd-src/gnu/llvm/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1066 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(), in LowerCallResult()
1159 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
1308 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
1494 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); in LowerReturn()
1499 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp662 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
881 Chain = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), CopyVT, InFlag) in LowerCallResult()
934 Register Reg = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments()
1083 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), ValToCopy, Flag); in LowerReturn()
1085 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
1310 Register Reg = VA.getLocReg(); in IsEligibleForTailCallOptimization()
/openbsd-src/gnu/llvm/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1357 Register Reg = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments()
1512 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
1618 Chain = DAG.getCopyFromReg(Chain, dl, RVLoc.getLocReg(), RVLoc.getValVT(), in LowerCallResult()
1674 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); in LowerReturn()
1678 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp247 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Val, Flag); in LowerReturn()
251 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
375 SDValue FR0 = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), in LowerCallResult()
389 RetVal = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), in LowerCallResult()
521 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
863 MRI.addLiveIn(VA.getLocReg(), VReg); in LowerFormalArguments()
864 HFL.FirstVarArgSavedReg = NextSingleReg(*RC, VA.getLocReg()); in LowerFormalArguments()
/openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp2105 RegInfo.addLiveIn(VA.getLocReg(), VReg); in unpackFromRegLoc()
2510 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
2606 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue); in LowerCall()
2662 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue); in LowerReturn()
2666 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVEISelLowering.cpp425 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn()
429 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
471 MF.addLiveIn(VA.getLocReg(), getRegClassFor(VA.getLocVT())); in LowerFormalArguments()
724 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
804 Register Reg = VA.getLocReg(); in LowerCall()
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp4125 Register RegLo = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments_32SVR4()
4126 Register RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC); in LowerFormalArguments_32SVR4()
4134 Register Reg = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments_32SVR4()
5164 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
5169 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
5178 VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
5898 RegsToPass.push_back(std::make_pair(VA.getLocReg(), SVal.getValue(0))); in LowerCall_32SVR4()
5901 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(), in LowerCall_32SVR4()
5904 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32SVR4()
7012 MF.addLiveIn(VA.getLocReg(), in LowerFormalArguments_AIX()
[all …]
H A DPPCFastISel.cpp1516 unsigned SourcePhysReg = VA.getLocReg(); in finishCall()
1723 Register RetReg = VA.getLocReg(); in SelectRet()
1747 RetRegs.push_back(VA.getLocReg()); in SelectRet()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3069 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
3070 CLI.OutRegs.push_back(VA.getLocReg()); in processCallArgs()
3134 .addReg(RVLocs[0].getLocReg()); in finishCall()
3135 CLI.InRegs.push_back(RVLocs[0].getLocReg()); in finishCall()
3846 Register DestReg = VA.getLocReg(); in selectRet()
3889 RetRegs.push_back(VA.getLocReg()); in selectRet()

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