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Searched refs:DRM_DEBUG (Results 1 – 25 of 127) sorted by relevance

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/openbsd-src/sys/dev/pci/drm/radeon/
H A Dradeon_ucode.c33 DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes)); in radeon_ucode_print_common_hdr()
34 DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes)); in radeon_ucode_print_common_hdr()
35 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major)); in radeon_ucode_print_common_hdr()
36 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor)); in radeon_ucode_print_common_hdr()
37 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major)); in radeon_ucode_print_common_hdr()
38 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor)); in radeon_ucode_print_common_hdr()
39 DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version)); in radeon_ucode_print_common_hdr()
40 DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes)); in radeon_ucode_print_common_hdr()
41 DRM_DEBUG("ucode_array_offset_bytes: %u\n", in radeon_ucode_print_common_hdr()
43 DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32)); in radeon_ucode_print_common_hdr()
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H A Dr600.c1677 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); in r600_gpu_check_soft_reset()
2441 DRM_DEBUG("\n"); in r600_init_microcode()
3815 DRM_DEBUG("dpm thermal\n"); in r600_irq_set()
3820 DRM_DEBUG("r600_irq_set: sw int\n"); in r600_irq_set()
3826 DRM_DEBUG("r600_irq_set: sw int dma\n"); in r600_irq_set()
3832 DRM_DEBUG("r600_irq_set: vblank 0\n"); in r600_irq_set()
3837 DRM_DEBUG("r600_irq_set: vblank 1\n"); in r600_irq_set()
3841 DRM_DEBUG("r600_irq_set: hpd 1\n"); in r600_irq_set()
3845 DRM_DEBUG("r600_irq_set: hpd 2\n"); in r600_irq_set()
3849 DRM_DEBUG("r600_irq_se in r600_irq_set()
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H A Dcik.c1979 DRM_DEBUG("\n"); in cik_init_microcode()
4907 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); in cik_gpu_check_soft_reset()
7062 DRM_DEBUG("cik_irq_set: sw int gfx\n"); in cik_irq_set()
7067 DRM_DEBUG("si_irq_set: sw int cp1\n"); in cik_irq_set()
7083 DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe); in cik_irq_set()
7101 DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe); in cik_irq_set()
7105 DRM_DEBUG("si_irq_set: sw int cp1 invalid me %d\n", ring->me); in cik_irq_set()
7110 DRM_DEBUG("si_irq_set: sw int cp2\n"); in cik_irq_set()
7126 DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe); in cik_irq_set()
7144 DRM_DEBUG("si_irq_se in cik_irq_set()
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H A Devergreen_hdmi.c335 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n", in dce4_hdmi_set_color_depth()
341 DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n", in dce4_hdmi_set_color_depth()
347 DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n", in dce4_hdmi_set_color_depth()
437 DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n", in evergreen_hdmi_enable()
H A Dradeon_i2c.c580 DRM_DEBUG("i2c write error 0x%08x\n", tmp); in r100_hw_i2c_xfer()
612 DRM_DEBUG("i2c read error 0x%08x\n", tmp); in r100_hw_i2c_xfer()
640 DRM_DEBUG("i2c write error 0x%08x\n", tmp); in r100_hw_i2c_xfer()
788 DRM_DEBUG("i2c write error 0x%08x\n", tmp); in r500_hw_i2c_xfer()
830 DRM_DEBUG("i2c read error 0x%08x\n", tmp); in r500_hw_i2c_xfer()
873 DRM_DEBUG("i2c write error 0x%08x\n", tmp); in r500_hw_i2c_xfer()
1180 DRM_DEBUG("val = 0x%02x\n", *val); in radeon_i2c_get_byte()
1182 DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n", in radeon_i2c_get_byte()
1204 DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", in radeon_i2c_put_byte()
H A Devergreen.c1640 DRM_DEBUG("Setting: vddc: %d\n", voltage->voltage); in evergreen_pm_misc()
1661 DRM_DEBUG("Setting: vddci: %d\n", voltage->vddci); in evergreen_pm_misc()
3890 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); in evergreen_gpu_check_soft_reset()
4526 DRM_DEBUG("evergreen_irq_set: sw int gfx\n"); in evergreen_irq_set()
4530 DRM_DEBUG("evergreen_irq_set: sw int cp1\n"); in evergreen_irq_set()
4534 DRM_DEBUG("evergreen_irq_set: sw int cp2\n"); in evergreen_irq_set()
4539 DRM_DEBUG("evergreen_irq_set: sw int gfx\n"); in evergreen_irq_set()
4546 DRM_DEBUG("r600_irq_set: sw int dma\n"); in evergreen_irq_set()
4553 DRM_DEBUG("r600_irq_set: sw int dma1\n"); in evergreen_irq_set()
4559 DRM_DEBUG("dp in evergreen_irq_set()
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H A Dr600_hdmi.c429 DRM_DEBUG("%s with %d channels, %d Hz sampling rate, %d bits per sample,\n", in r600_hdmi_update_audio_settings()
432 DRM_DEBUG("0x%02X IEC60958 status bits and 0x%02X category code\n", in r600_hdmi_update_audio_settings()
533 DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n", in r600_hdmi_enable()
/openbsd-src/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_ucode.c33 DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes)); in amdgpu_ucode_print_common_hdr()
34 DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes)); in amdgpu_ucode_print_common_hdr()
35 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major)); in amdgpu_ucode_print_common_hdr()
36 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor)); in amdgpu_ucode_print_common_hdr()
37 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major)); in amdgpu_ucode_print_common_hdr()
38 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor)); in amdgpu_ucode_print_common_hdr()
39 DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version)); in amdgpu_ucode_print_common_hdr()
40 DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes)); in amdgpu_ucode_print_common_hdr()
41 DRM_DEBUG("ucode_array_offset_bytes: %u\n", in amdgpu_ucode_print_common_hdr()
43 DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32)); in amdgpu_ucode_print_common_hdr()
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H A Dpsp_v11_0.c94 DRM_DEBUG("\n"); in psp_v11_0_init_microcode()
433 DRM_DEBUG("training %s %s, cost %d @ %d ms\n", in psp_v11_0_memory_training_send_msg()
454 DRM_DEBUG("Memory training is not supported.\n"); in psp_v11_0_memory_training()
462 DRM_DEBUG("SOS is alive, skip memory training.\n"); in psp_v11_0_memory_training()
467 DRM_DEBUG("sys_cache[%08x,%08x,%08x,%08x] p2c_header[%08x,%08x,%08x,%08x]\n", in psp_v11_0_memory_training()
472 DRM_DEBUG("Short training depends on restore.\n"); in psp_v11_0_memory_training()
478 DRM_DEBUG("sys_cache[0] is invalid, restore depends on save.\n"); in psp_v11_0_memory_training()
485 DRM_DEBUG("sys_cache is invalid or out-of-date, need save training data to sys_cache.\n"); in psp_v11_0_memory_training()
491 DRM_DEBUG("p2c_header[0] is invalid, save depends on long training.\n"); in psp_v11_0_memory_training()
500 DRM_DEBUG("Memory training ops:%x.\n", ops); in psp_v11_0_memory_training()
H A Damdgpu_irq.c325 DRM_DEBUG("amdgpu: irq initialized.\n"); in amdgpu_irq_init()
465 DRM_DEBUG("Invalid client_id in IV: %d\n", client_id); in amdgpu_irq_dispatch()
468 DRM_DEBUG("Invalid src_id in IV: %d\n", src_id); in amdgpu_irq_dispatch()
478 DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n", in amdgpu_irq_dispatch()
489 DRM_DEBUG("Unregistered interrupt src_id: %d of client_id:%d\n", in amdgpu_irq_dispatch()
H A Dsdma_v5_0.c295 DRM_DEBUG("rptr before shift == 0x%016llx\n", *rptr); in sdma_v5_0_ring_get_rptr()
314 DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr); in sdma_v5_0_ring_get_wptr()
319 DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr); in sdma_v5_0_ring_get_wptr()
340 DRM_DEBUG("Setting write pointer\n"); in sdma_v5_0_ring_set_wptr()
354 DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n", in sdma_v5_0_ring_set_wptr()
358 DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n", in sdma_v5_0_ring_set_wptr()
368 DRM_DEBUG("Using doorbell -- " in sdma_v5_0_ring_set_wptr()
378 DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n", in sdma_v5_0_ring_set_wptr()
382 DRM_DEBUG("Not using doorbell -- " in sdma_v5_0_ring_set_wptr()
1381 DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i, in sdma_v5_0_sw_init()
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H A Dsdma_v6_0.c125 DRM_DEBUG("rptr before shift == 0x%016llx\n", *rptr); in sdma_v6_0_ring_get_rptr()
143 DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr); in sdma_v6_0_ring_get_wptr()
164 DRM_DEBUG("Setting write pointer\n"); in sdma_v6_0_ring_set_wptr()
179 DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n", in sdma_v6_0_ring_set_wptr()
183 DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n", in sdma_v6_0_ring_set_wptr()
193 DRM_DEBUG("Using doorbell -- " in sdma_v6_0_ring_set_wptr()
203 DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n", in sdma_v6_0_ring_set_wptr()
207 DRM_DEBUG("Not using doorbell -- " in sdma_v6_0_ring_set_wptr()
1298 DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i, in sdma_v6_0_sw_init()
1475 DRM_DEBUG("IH: SDMA trap\n"); in sdma_v6_0_process_trap_irq()
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H A Dsdma_v5_2.c135 DRM_DEBUG("rptr before shift == 0x%016llx\n", *rptr); in sdma_v5_2_ring_get_rptr()
154 DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr); in sdma_v5_2_ring_get_wptr()
159 DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr); in sdma_v5_2_ring_get_wptr()
176 DRM_DEBUG("Setting write pointer\n"); in sdma_v5_2_ring_set_wptr()
178 DRM_DEBUG("Using doorbell -- " in sdma_v5_2_ring_set_wptr()
188 DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n", in sdma_v5_2_ring_set_wptr()
200 DRM_DEBUG("Not using doorbell -- " in sdma_v5_2_ring_set_wptr()
720 DRM_DEBUG("GRBM_SOFT_RESET=0x%08X\n", tmp); in sdma_v5_2_soft_reset()
1429 DRM_DEBUG("IH: SDMA trap\n"); in sdma_v5_2_process_trap_irq()
1439 DRM_DEBUG("proces in sdma_v5_2_process_trap_irq()
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H A Damdgpu_afmt.c84 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", in amdgpu_afmt_calc_cts()
H A Damdgpu_i2c.c418 DRM_DEBUG("val = 0x%02x\n", *val); in amdgpu_i2c_get_byte()
420 DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n", in amdgpu_i2c_get_byte()
442 DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", in amdgpu_i2c_put_byte()
/openbsd-src/sys/dev/pci/drm/
H A Ddrm_bufs.c174 DRM_DEBUG("offset = 0x%08llx, size = 0x%08lx, type = %d\n", in drm_addmap_core()
208 DRM_DEBUG("Matching maps of type %d with " in drm_addmap_core()
242 DRM_DEBUG("Matching maps of type %d with " in drm_addmap_core()
253 DRM_DEBUG("%lu %d %p\n", in drm_addmap_core()
311 DRM_DEBUG("AGP offset = 0x%08llx, size = 0x%08lx\n", in drm_addmap_core()
748 DRM_DEBUG("count: %d\n", count); in drm_legacy_addbufs_agp()
749 DRM_DEBUG("order: %d\n", order); in drm_legacy_addbufs_agp()
750 DRM_DEBUG("size: %d\n", size); in drm_legacy_addbufs_agp()
751 DRM_DEBUG("agp_offset: %lx\n", agp_offset); in drm_legacy_addbufs_agp()
752 DRM_DEBUG("alignment: %d\n", alignment); in drm_legacy_addbufs_agp()
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H A Ddrm_scatter.c85 DRM_DEBUG("\n"); in drm_legacy_sg_alloc()
104 DRM_DEBUG("size=%ld pages=%ld\n", request->size, pages); in drm_legacy_sg_alloc()
135 DRM_DEBUG("handle = %08lx\n", entry->handle); in drm_legacy_sg_alloc()
136 DRM_DEBUG("virtual = %p\n", entry->virtual); in drm_legacy_sg_alloc()
215 DRM_DEBUG("virtual = %p\n", entry->virtual); in drm_legacy_sg_free()
H A Ddrm_context.c277 DRM_DEBUG("Context switch from %d to %d\n", old, new); in drm_context_switch()
374 DRM_DEBUG("%d\n", tmp_handle); in drm_legacy_addctx()
376 DRM_DEBUG("Not enough free contexts.\n"); in drm_legacy_addctx()
385 DRM_DEBUG("out of memory\n"); in drm_legacy_addctx()
442 DRM_DEBUG("%d\n", ctx->handle); in drm_legacy_switchctx()
465 DRM_DEBUG("%d\n", ctx->handle); in drm_legacy_newctx()
490 DRM_DEBUG("%d\n", ctx->handle); in drm_legacy_rmctx()
H A Ddrm_vm.c171 DRM_DEBUG in drm_vm_fault()
218 DRM_DEBUG("shm_fault 0x%lx\n", offset); in drm_vm_shm_fault()
239 DRM_DEBUG("0x%08lx,0x%08lx\n", in drm_vm_shm_close()
322 DRM_DEBUG("dma_fault 0x%lx (page %lu)\n", offset, page_nr); in drm_vm_dma_fault()
394 DRM_DEBUG("0x%08lx,0x%08lx\n", in drm_vm_open_locked()
420 DRM_DEBUG("0x%08lx,0x%08lx\n", in drm_vm_close_locked()
469 DRM_DEBUG("start = 0x%lx, end = 0x%lx, page offset = 0x%lx\n", in drm_mmap_dma()
531 DRM_DEBUG("start = 0x%lx, end = 0x%lx, page offset = 0x%lx\n", in drm_mmap_locked()
603 DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx," in drm_mmap_locked()
H A Ddrm_pci.c96 DRM_DEBUG("%d:%d:%d => IRQ %d\n", p->busnum, p->devnum, p->funcnum, in drm_legacy_pci_irq_by_busid()
162 DRM_DEBUG("\n"); in drm_legacy_get_pci_dev()
214 DRM_DEBUG("\n"); in drm_legacy_pci_init()
258 DRM_DEBUG("\n"); in drm_legacy_pci_exit()
H A Ddrm_legacy_misc.c73 DRM_DEBUG("\n"); in drm_legacy_setup()
98 DRM_DEBUG("lastclose completed\n"); in drm_legacy_dev_reinit()
H A Ddrm_lock.c183 DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n", in drm_legacy_lock()
222 DRM_DEBUG("%d %s\n", lock->context, in drm_legacy_lock()
237 DRM_DEBUG("%d waiting for DMA quiescent\n", in drm_legacy_lock()
348 DRM_DEBUG("File %p released, freeing lock for context %d\n", in drm_legacy_lock_release()
H A Ddrm_irq.c81 DRM_DEBUG("irq=%d\n", irq); in drm_legacy_irq_install()
149 DRM_DEBUG("irq=%d\n", dev->irq); in drm_legacy_irq_uninstall()
H A Ddrm_hashtab.c70 DRM_DEBUG("Key is 0x%08lx, Hashed key is 0x%08x\n", key, hashed_key); in drm_ht_verbose_list()
73 DRM_DEBUG("count %d, key: 0x%08lx\n", count++, entry->key); in drm_ht_verbose_list()
/openbsd-src/sys/dev/pci/drm/i915/
H A Di915_cmd_parser.c751 DRM_DEBUG("CMD: Abnormal rcs cmd length! 0x%08X\n", cmd_header); in gen7_render_get_cmd_length_mask()
774 DRM_DEBUG("CMD: Abnormal bsd cmd length! 0x%08X\n", cmd_header); in gen7_bsd_get_cmd_length_mask()
787 DRM_DEBUG("CMD: Abnormal blt cmd length! 0x%08X\n", cmd_header); in gen7_blt_get_cmd_length_mask()
798 DRM_DEBUG("CMD: Abnormal blt cmd length! 0x%08X\n", cmd_header); in gen9_blt_get_cmd_length_mask()
1255 DRM_DEBUG("CMD: Rejected command: 0x%08X\n", *cmd); in check_cmd()
1275 DRM_DEBUG("CMD: Rejected register 0x%08X in command: 0x%08X (%s)\n", in check_cmd()
1286 DRM_DEBUG("CMD: Rejected LRM to masked register 0x%08X\n", in check_cmd()
1292 DRM_DEBUG("CMD: Rejected LRR to masked register 0x%08X\n", in check_cmd()
1300 DRM_DEBUG("CMD: Rejected LRI to masked register 0x%08X\n", in check_cmd()
1328 DRM_DEBUG("CMD: Rejected command 0x%08X, too short to check bitmask (%s)\n", in check_cmd()
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