xref: /openbsd-src/sys/dev/pci/drm/amd/amdgpu/amdgpu_afmt.c (revision 4fc378f72524874fa13154b260ffae8d3cfd27ea)
1fb4d8502Sjsg /*
2fb4d8502Sjsg  * Copyright 2008 Advanced Micro Devices, Inc.
3fb4d8502Sjsg  * Copyright 2008 Red Hat Inc.
4fb4d8502Sjsg  * Copyright 2009 Christian König.
5fb4d8502Sjsg  *
6fb4d8502Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
7fb4d8502Sjsg  * copy of this software and associated documentation files (the "Software"),
8fb4d8502Sjsg  * to deal in the Software without restriction, including without limitation
9fb4d8502Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10fb4d8502Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
11fb4d8502Sjsg  * Software is furnished to do so, subject to the following conditions:
12fb4d8502Sjsg  *
13fb4d8502Sjsg  * The above copyright notice and this permission notice shall be included in
14fb4d8502Sjsg  * all copies or substantial portions of the Software.
15fb4d8502Sjsg  *
16fb4d8502Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17fb4d8502Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18fb4d8502Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19fb4d8502Sjsg  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20fb4d8502Sjsg  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21fb4d8502Sjsg  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22fb4d8502Sjsg  * OTHER DEALINGS IN THE SOFTWARE.
23fb4d8502Sjsg  *
24fb4d8502Sjsg  * Authors: Christian König
25fb4d8502Sjsg  */
26fb4d8502Sjsg #include <linux/hdmi.h>
27fb4d8502Sjsg #include <linux/gcd.h>
28c349dbc7Sjsg 
29fb4d8502Sjsg #include <drm/amdgpu_drm.h>
30fb4d8502Sjsg #include "amdgpu.h"
31fb4d8502Sjsg 
32fb4d8502Sjsg static const struct amdgpu_afmt_acr amdgpu_afmt_predefined_acr[] = {
33fb4d8502Sjsg     /*	     32kHz	  44.1kHz	48kHz    */
34fb4d8502Sjsg     /* Clock      N     CTS      N     CTS      N     CTS */
35fb4d8502Sjsg     {  25175,  4096,  25175, 28224, 125875,  6144,  25175 }, /*  25,20/1.001 MHz */
36fb4d8502Sjsg     {  25200,  4096,  25200,  6272,  28000,  6144,  25200 }, /*  25.20       MHz */
37fb4d8502Sjsg     {  27000,  4096,  27000,  6272,  30000,  6144,  27000 }, /*  27.00       MHz */
38fb4d8502Sjsg     {  27027,  4096,  27027,  6272,  30030,  6144,  27027 }, /*  27.00*1.001 MHz */
39fb4d8502Sjsg     {  54000,  4096,  54000,  6272,  60000,  6144,  54000 }, /*  54.00       MHz */
40fb4d8502Sjsg     {  54054,  4096,  54054,  6272,  60060,  6144,  54054 }, /*  54.00*1.001 MHz */
41fb4d8502Sjsg     {  74176,  4096,  74176,  5733,  75335,  6144,  74176 }, /*  74.25/1.001 MHz */
42fb4d8502Sjsg     {  74250,  4096,  74250,  6272,  82500,  6144,  74250 }, /*  74.25       MHz */
43fb4d8502Sjsg     { 148352,  4096, 148352,  5733, 150670,  6144, 148352 }, /* 148.50/1.001 MHz */
44fb4d8502Sjsg     { 148500,  4096, 148500,  6272, 165000,  6144, 148500 }, /* 148.50       MHz */
45fb4d8502Sjsg };
46fb4d8502Sjsg 
47fb4d8502Sjsg 
48fb4d8502Sjsg /*
49fb4d8502Sjsg  * calculate CTS and N values if they are not found in the table
50fb4d8502Sjsg  */
51fb4d8502Sjsg static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq)
52fb4d8502Sjsg {
53fb4d8502Sjsg 	int n, cts;
54fb4d8502Sjsg 	unsigned long div, mul;
55fb4d8502Sjsg 
56fb4d8502Sjsg 	/* Safe, but overly large values */
57fb4d8502Sjsg 	n = 128 * freq;
58fb4d8502Sjsg 	cts = clock * 1000;
59fb4d8502Sjsg 
60fb4d8502Sjsg 	/* Smallest valid fraction */
61fb4d8502Sjsg 	div = gcd(n, cts);
62fb4d8502Sjsg 
63fb4d8502Sjsg 	n /= div;
64fb4d8502Sjsg 	cts /= div;
65fb4d8502Sjsg 
66fb4d8502Sjsg 	/*
67fb4d8502Sjsg 	 * The optimal N is 128*freq/1000. Calculate the closest larger
68fb4d8502Sjsg 	 * value that doesn't truncate any bits.
69fb4d8502Sjsg 	 */
70fb4d8502Sjsg 	mul = ((128*freq/1000) + (n-1))/n;
71fb4d8502Sjsg 
72fb4d8502Sjsg 	n *= mul;
73fb4d8502Sjsg 	cts *= mul;
74fb4d8502Sjsg 
75fb4d8502Sjsg 	/* Check that we are in spec (not always possible) */
76fb4d8502Sjsg 	if (n < (128*freq/1500))
77fb4d8502Sjsg 		pr_warn("Calculated ACR N value is too small. You may experience audio problems.\n");
78fb4d8502Sjsg 	if (n > (128*freq/300))
79fb4d8502Sjsg 		pr_warn("Calculated ACR N value is too large. You may experience audio problems.\n");
80fb4d8502Sjsg 
81fb4d8502Sjsg 	*N = n;
82fb4d8502Sjsg 	*CTS = cts;
83fb4d8502Sjsg 
84fb4d8502Sjsg 	DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
85fb4d8502Sjsg 		  *N, *CTS, freq);
86fb4d8502Sjsg }
87fb4d8502Sjsg 
88fb4d8502Sjsg struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock)
89fb4d8502Sjsg {
90fb4d8502Sjsg 	struct amdgpu_afmt_acr res;
91fb4d8502Sjsg 	u8 i;
92fb4d8502Sjsg 
93fb4d8502Sjsg 	/* Precalculated values for common clocks */
94fb4d8502Sjsg 	for (i = 0; i < ARRAY_SIZE(amdgpu_afmt_predefined_acr); i++) {
95fb4d8502Sjsg 		if (amdgpu_afmt_predefined_acr[i].clock == clock)
96fb4d8502Sjsg 			return amdgpu_afmt_predefined_acr[i];
97fb4d8502Sjsg 	}
98fb4d8502Sjsg 
99fb4d8502Sjsg 	/* And odd clocks get manually calculated */
100fb4d8502Sjsg 	amdgpu_afmt_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
101fb4d8502Sjsg 	amdgpu_afmt_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
102fb4d8502Sjsg 	amdgpu_afmt_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
103*4fc378f7Sjsg 	res.clock = clock;
104fb4d8502Sjsg 
105fb4d8502Sjsg 	return res;
106fb4d8502Sjsg }
107