| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | DAGISelMatcher.cpp | |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DIE.cpp | 36 void DIEAbbrevData::Profile(FoldingSetNodeID &ID) const { in Profile() argument
51 void DIEAbbrev::Profile(FoldingSetNodeID &ID) const { in Profile() argument
62 void DIEAbbrev::Emit(const AsmPrinter *AP) const { in Emit() argument
103 print(raw_ostream & O) const print() argument
164 Emit(const AsmPrinter * AP,MCSection * Section) const Emit() argument
214 findAttribute(dwarf::Attribute Attribute) const findAttribute() argument
240 print(raw_ostream & O,unsigned IndentCount) const print() argument
319 emitValue(const AsmPrinter * AP) const emitValue() argument
331 sizeOf(const dwarf::FormParams & FormParams) const sizeOf() argument
344 print(raw_ostream & O) const print() argument
368 emitValue(const AsmPrinter * Asm,dwarf::Form Form) const emitValue() argument
426 sizeOf(const dwarf::FormParams & FormParams,dwarf::Form Form) const sizeOf() argument
447 print(raw_ostream & O) const print() argument
458 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
465 sizeOf(const dwarf::FormParams & FormParams,dwarf::Form Form) const sizeOf() argument
479 print(raw_ostream & O) const print() argument
487 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
496 sizeOf(const dwarf::FormParams & FormParams,dwarf::Form Form) const sizeOf() argument
513 print(raw_ostream & O) const print() argument
519 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
525 sizeOf(const dwarf::FormParams &,dwarf::Form) const sizeOf() argument
530 print(raw_ostream & O) const print() argument
538 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
546 sizeOf(const dwarf::FormParams & FormParams,dwarf::Form Form) const sizeOf() argument
560 print(raw_ostream & O) const print() argument
570 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
595 sizeOf(const dwarf::FormParams & FormParams,dwarf::Form Form) const sizeOf() argument
615 print(raw_ostream & O) const print() argument
622 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
631 sizeOf(const dwarf::FormParams &,dwarf::Form) const sizeOf() argument
637 print(raw_ostream & O) const print() argument
647 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
681 sizeOf(const dwarf::FormParams & FormParams,dwarf::Form Form) const sizeOf() argument
702 print(raw_ostream & O) const print() argument
710 computeSize(const dwarf::FormParams & FormParams) const computeSize() argument
721 emitValue(const AsmPrinter * Asm,dwarf::Form Form) const emitValue() argument
739 sizeOf(const dwarf::FormParams &,dwarf::Form Form) const sizeOf() argument
752 print(raw_ostream & O) const print() argument
760 computeSize(const dwarf::FormParams & FormParams) const computeSize() argument
771 emitValue(const AsmPrinter * Asm,dwarf::Form Form) const emitValue() argument
791 sizeOf(const dwarf::FormParams &,dwarf::Form Form) const sizeOf() argument
804 print(raw_ostream & O) const print() argument
813 sizeOf(const dwarf::FormParams & FormParams,dwarf::Form Form) const sizeOf() argument
836 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
847 print(raw_ostream & O) const print() argument
854 sizeOf(const dwarf::FormParams & FormParams,dwarf::Form) const sizeOf() argument
861 emitValue(const AsmPrinter * AP,dwarf::Form Form) const emitValue() argument
867 print(raw_ostream & O) const print() argument
[all...] |
| H A D | AsmPrinterDwarf.cpp | 90 void AsmPrinter::emitEncodingByte(unsigned Val, const char *Desc) const { in emitEncodingByte() argument
103 unsigned AsmPrinter::GetSizeOfEncodedValue(unsigned Encoding) const { in GetSizeOfEncodedValue()
133 bool ForceOffset) const { in emitDwarfSymbolReference()
155 void AsmPrinter::emitDwarfStringOffset(DwarfStringPoolEntry S) const { in emitDwarfStringOffset()
166 void AsmPrinter::emitDwarfOffset(const MCSymbol *Label, uint64_t Offset) const { in emitDwarfOffset()
170 void AsmPrinter::emitDwarfLengthOrOffset(uint64_t Value) const { in emitDwarfLengthOrOffset()
176 const Twine &Comment) const { in emitDwarfUnitLength() argument
181 const Twine &Comment) const { in emitDwarfUnitLength() argument
186 unsigned Encoding) const { in emitCallSiteOffset()
194 void AsmPrinter::emitCallSiteValue(uint64_t Value, unsigned Encoding) const { in emitCallSiteValue()
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Demangle/ |
| H A D | MicrosoftDemangleNodes.cpp | 120 std::string Node::toString(OutputFlags Flags) const { in toString()
129 void PrimitiveTypeNode::outputPre(OutputBuffer &OB, OutputFlags Flags) const { in outputPre()
156 void NodeArrayNode::output(OutputBuffer &OB, OutputFlags Flags) const { in output()
161 std::string_view Separator) const { in output()
173 OutputFlags Flags) const { in output()
193 void IntegerLiteralNode::output(OutputBuffer &OB, OutputFlags Flags) const { in output()
200 OutputFlags Flags) const { in output()
222 OutputFlags Flags) const { in outputTemplateParameters()
231 OutputFlags Flags) const { in output()
248 void NamedIdentifierNode::output(OutputBuffer &OB, OutputFlags Flags) const { in output()
[all …]
|
| /freebsd-src/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | CheckerDocumentation.cpp | 97 void checkPreObjCMessage(const ObjCMethodCall &M, CheckerContext &C) const {} in checkPostObjCMessage() argument
72 checkPreStmt(const ReturnStmt * DS,CheckerContext & C) const checkPreStmt() argument
91 checkPreObjCMessage(const ObjCMethodCall & M,CheckerContext & C) const checkPreObjCMessage() argument
106 checkObjCMessageNil(const ObjCMethodCall & M,CheckerContext & C) const checkObjCMessageNil() argument
118 checkPreCall(const CallEvent & Call,CheckerContext & C) const checkPreCall() argument
124 checkPostCall(const CallEvent & Call,CheckerContext & C) const checkPostCall() argument
127 checkBranchCondition(const Stmt * Condition,CheckerContext & Ctx) const checkBranchCondition() argument
143 checkNewAllocator(const CXXNewExpr * NE,SVal Target,CheckerContext &) const checkNewAllocator() argument
155 checkLocation(SVal Loc,bool IsLoad,const Stmt * S,CheckerContext &) const checkLocation() argument
164 checkBind(SVal Loc,SVal Val,const Stmt * S,CheckerContext &) const checkBind() argument
180 checkDeadSymbols(SymbolReaper & SR,CheckerContext & C) const checkDeadSymbols() argument
187 checkBeginFunction(CheckerContext & Ctx) const checkBeginFunction() argument
194 checkEndFunction(const ReturnStmt * RS,CheckerContext & Ctx) const checkEndFunction() argument
207 checkEndAnalysis(ExplodedGraph & G,BugReporter & BR,ExprEngine & Eng) const checkEndAnalysis() argument
214 checkEndOfTranslationUnit(const TranslationUnitDecl * TU,AnalysisManager & Mgr,BugReporter & BR) const checkEndOfTranslationUnit() argument
229 evalCall(const CallExpr * CE,CheckerContext & C) const evalCall() argument
241 evalAssume(ProgramStateRef State,SVal Cond,bool Assumption) const evalAssume() argument
248 checkLiveSymbols(ProgramStateRef State,SymbolReaper & SR) const checkLiveSymbols() argument
278 checkRegionChanges(ProgramStateRef State,const InvalidatedSymbols * Invalidated,ArrayRef<const MemRegion * > ExplicitRegions,ArrayRef<const MemRegion * > Regions,const LocationContext * LCtx,const CallEvent * Call) const checkRegionChanges() argument
298 checkPointerEscape(ProgramStateRef State,const InvalidatedSymbols & Escaped,const CallEvent * Call,PointerEscapeKind Kind) const checkPointerEscape() argument
309 checkConstPointerEscape(ProgramStateRef State,const InvalidatedSymbols & Escaped,const CallEvent * Call,PointerEscapeKind Kind) const checkConstPointerEscape() argument
314 checkEvent(ImplicitNullDerefEvent Event) const checkEvent() argument
326 checkASTDecl(const FunctionDecl * D,AnalysisManager & Mgr,BugReporter & BR) const checkASTDecl() argument
330 checkPostStmt(const DeclStmt * DS,CheckerContext & C) const checkPostStmt() argument
[all...] |
| H A D | AnalysisOrderChecker.cpp | 44 StringRef CallbackName) const { in isCallbackEnabled()
49 bool isCallbackEnabled(CheckerContext &C, StringRef CallbackName) const { in isCallbackEnabled()
54 bool isCallbackEnabled(ProgramStateRef State, StringRef CallbackName) const { in isCallbackEnabled()
61 void checkPreStmt(const CastExpr *CE, CheckerContext &C) const { in checkPreStmt()
67 void checkPostStmt(const CastExpr *CE, CheckerContext &C) const { in checkPostStmt()
74 CheckerContext &C) const { in checkPreStmt()
80 CheckerContext &C) const { in checkPostStmt()
85 void checkPreStmt(const CXXNewExpr *NE, CheckerContext &C) const { in checkPreStmt()
90 void checkPostStmt(const CXXNewExpr *NE, CheckerContext &C) const { in checkPostStmt()
95 void checkPreStmt(const CXXDeleteExpr *NE, CheckerContext &C) const { in checkPreStmt()
[all …]
|
| /freebsd-src/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/MPI-Checker/ |
| H A D | MPIFunctionClassifier.cpp | 203 bool MPIFunctionClassifier::isMPIType(const IdentifierInfo *IdentInfo) const { in isMPIType() argument
208 const IdentifierInfo *IdentInfo) const { in isNonBlockingType() argument
214 const IdentifierInfo *IdentInfo) const { in isPointToPointType() argument
220 const IdentifierInfo *IdentInfo) const { in isCollectiveType() argument
225 const IdentifierInfo *IdentInfo) const { in isCollToColl() argument
230 const IdentifierInfo *IdentInfo) const { in isScatterType() argument
236 const IdentifierInfo *IdentInfo) const { in isGatherType() argument
244 const IdentifierInfo *IdentInfo) const { in isAllgatherType() argument
250 const IdentifierInfo *IdentInfo) const { in isAlltoallType() argument
255 bool MPIFunctionClassifier::isBcastType(const IdentifierInfo *IdentInfo) const { in isBcastType() argument
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 231 adjustInliningThreshold(const CallBase * CB) const adjustInliningThreshold() argument
236 getCallerAllocaCost(const CallBase * CB,const AllocaInst * AI) const getCallerAllocaCost() argument
246 getGEPCost(Type * PointeeType,const Value * Ptr,ArrayRef<const Value * > Operands,Type * AccessType,TTI::TargetCostKind CostKind) const getGEPCost() argument
253 getPointersChainCost(ArrayRef<const Value * > Ptrs,const Value * Base,const TTI::PointersChainInfo & Info,Type * AccessTy,TTI::TargetCostKind CostKind) const getPointersChainCost() argument
261 getEstimatedNumberOfCaseClusters(const SwitchInst & SI,unsigned & JTSize,ProfileSummaryInfo * PSI,BlockFrequencyInfo * BFI) const getEstimatedNumberOfCaseClusters() argument
268 getInstructionCost(const User * U,ArrayRef<const Value * > Operands,enum TargetCostKind CostKind) const getInstructionCost() argument
281 hasBranchDivergence(const Function * F) const hasBranchDivergence() argument
285 isSourceOfDivergence(const Value * V) const isSourceOfDivergence() argument
289 isAlwaysUniform(const Value * V) const isAlwaysUniform() argument
294 isValidAddrSpaceCast(unsigned FromAS,unsigned ToAS) const isValidAddrSpaceCast() argument
299 addrspacesMayAlias(unsigned FromAS,unsigned ToAS) const addrspacesMayAlias() argument
308 collectFlatAddressOperands(SmallVectorImpl<int> & OpIndexes,Intrinsic::ID IID) const collectFlatAddressOperands() argument
313 isNoopAddrSpaceCast(unsigned FromAS,unsigned ToAS) const isNoopAddrSpaceCast() argument
318 canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const canHaveNonUndefGlobalInitializerInAddressSpace() argument
322 getAssumedAddrSpace(const Value * V) const getAssumedAddrSpace() argument
331 getPredicatedAddrSpace(const Value * V) const getPredicatedAddrSpace() argument
336 rewriteIntrinsicWithAddressSpace(IntrinsicInst * II,Value * OldV,Value * NewV) const rewriteIntrinsicWithAddressSpace() argument
340 isLoweredToCall(const Function * F) const isLoweredToCall() argument
346 isHardwareLoopProfitable(Loop * L,ScalarEvolution & SE,AssumptionCache & AC,TargetLibraryInfo * LibInfo,HardwareLoopInfo & HWLoopInfo) const isHardwareLoopProfitable() argument
351 preferPredicateOverEpilogue(TailFoldingInfo * TFI) const preferPredicateOverEpilogue() argument
356 getPreferredTailFoldingStyle(bool IVUpdateMayOverflow) const getPreferredTailFoldingStyle() argument
362 instCombineIntrinsic(InstCombiner & IC,IntrinsicInst & II) const instCombineIntrinsic() argument
368 simplifyDemandedUseBitsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedMask,KnownBits & Known,bool & KnownBitsComputed) const simplifyDemandedUseBitsIntrinsic() argument
377 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) const simplifyDemandedVectorEltsIntrinsic() argument
385 getUnrollingPreferences(Loop * L,ScalarEvolution & SE,UnrollingPreferences & UP,OptimizationRemarkEmitter * ORE) const getUnrollingPreferences() argument
390 getPeelingPreferences(Loop * L,ScalarEvolution & SE,PeelingPreferences & PP) const getPeelingPreferences() argument
394 isLegalAddImmediate(int64_t Imm) const isLegalAddImmediate() argument
398 isLegalICmpImmediate(int64_t Imm) const isLegalICmpImmediate() argument
406 isLegalAddressingMode(Type * Ty,GlobalValue * BaseGV,int64_t BaseOffset,bool HasBaseReg,int64_t Scale,unsigned AddrSpace,Instruction * I) const isLegalAddressingMode() argument
412 isLSRCostLess(const LSRCost & C1,const LSRCost & C2) const isLSRCostLess() argument
424 isProfitableLSRChainElement(Instruction * I) const isProfitableLSRChainElement() argument
435 canSaveCmp(Loop * L,BranchInst ** BI,ScalarEvolution * SE,LoopInfo * LI,DominatorTree * DT,AssumptionCache * AC,TargetLibraryInfo * LibInfo) const canSaveCmp() argument
441 getPreferredAddressingMode(const Loop * L,ScalarEvolution * SE) const getPreferredAddressingMode() argument
446 isLegalMaskedStore(Type * DataType,Align Alignment) const isLegalMaskedStore() argument
451 isLegalMaskedLoad(Type * DataType,Align Alignment) const isLegalMaskedLoad() argument
456 isLegalNTStore(Type * DataType,Align Alignment) const isLegalNTStore() argument
460 isLegalNTLoad(Type * DataType,Align Alignment) const isLegalNTLoad() argument
465 isLegalBroadcastLoad(Type * ElementTy,ElementCount NumElements) const isLegalBroadcastLoad() argument
470 isLegalMaskedGather(Type * DataType,Align Alignment) const isLegalMaskedGather() argument
476 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) const isLegalAltInstr() argument
481 isLegalMaskedScatter(Type * DataType,Align Alignment) const isLegalMaskedScatter() argument
486 forceScalarizeMaskedGather(VectorType * DataType,Align Alignment) const forceScalarizeMaskedGather() argument
491 forceScalarizeMaskedScatter(VectorType * DataType,Align Alignment) const forceScalarizeMaskedScatter() argument
495 isLegalMaskedCompressStore(Type * DataType) const isLegalMaskedCompressStore() argument
499 isLegalMaskedExpandLoad(Type * DataType) const isLegalMaskedExpandLoad() argument
507 hasDivRemOp(Type * DataType,bool IsSigned) const hasDivRemOp() argument
512 hasVolatileVariant(Instruction * I,unsigned AddrSpace) const hasVolatileVariant() argument
522 getScalingFactorCost(Type * Ty,GlobalValue * BaseGV,int64_t BaseOffset,bool HasBaseReg,int64_t Scale,unsigned AddrSpace) const getScalingFactorCost() argument
533 isTruncateFree(Type * Ty1,Type * Ty2) const isTruncateFree() argument
537 isProfitableToHoist(Instruction * I) const isProfitableToHoist() argument
543 isTypeLegal(Type * Ty) const isTypeLegal() argument
547 getRegUsageForType(Type * Ty) const getRegUsageForType() argument
556 shouldBuildLookupTablesForConstant(Constant * C) const shouldBuildLookupTablesForConstant() argument
564 useColdCCForColdCall(Function & F) const useColdCCForColdCall() argument
570 getScalarizationOverhead(VectorType * Ty,const APInt & DemandedElts,bool Insert,bool Extract,TTI::TargetCostKind CostKind) const getScalarizationOverhead() argument
577 getOperandsScalarizationOverhead(ArrayRef<const Value * > Args,ArrayRef<Type * > Tys,TTI::TargetCostKind CostKind) const getOperandsScalarizationOverhead() argument
589 supportsTailCallFor(const CallBase * CB) const supportsTailCallFor() argument
594 enableAggressiveInterleaving(bool LoopHasReductions) const enableAggressiveInterleaving() argument
599 enableMemCmpExpansion(bool OptSize,bool IsZeroCmp) const enableMemCmpExpansion() argument
608 shouldTreatInstructionLikeSelect(const Instruction * I) const shouldTreatInstructionLikeSelect() argument
629 allowsMisalignedMemoryAccesses(LLVMContext & Context,unsigned BitWidth,unsigned AddressSpace,Align Alignment,unsigned * Fast) const allowsMisalignedMemoryAccesses() argument
635 getPopcntSupport(unsigned IntTyWidthInBit) const getPopcntSupport() argument
639 haveFastSqrt(Type * Ty) const haveFastSqrt() argument
644 isExpensiveToSpeculativelyExecute(const Instruction * I) const isExpensiveToSpeculativelyExecute() argument
648 isFCmpOrdCheaperThanFCmpZero(Type * Ty) const isFCmpOrdCheaperThanFCmpZero() argument
652 getFPOpCost(Type * Ty) const getFPOpCost() argument
661 getIntImmCodeSizeCost(unsigned Opcode,unsigned Idx,const APInt & Imm,Type * Ty) const getIntImmCodeSizeCost() argument
669 getIntImmCost(const APInt & Imm,Type * Ty,TTI::TargetCostKind CostKind) const getIntImmCost() argument
677 getIntImmCostInst(unsigned Opcode,unsigned Idx,const APInt & Imm,Type * Ty,TTI::TargetCostKind CostKind,Instruction * Inst) const getIntImmCostInst() argument
687 getIntImmCostIntrin(Intrinsic::ID IID,unsigned Idx,const APInt & Imm,Type * Ty,TTI::TargetCostKind CostKind) const getIntImmCostIntrin() argument
695 preferToKeepConstantsAttached(const Instruction & Inst,const Function & Fn) const preferToKeepConstantsAttached() argument
699 getNumberOfRegisters(unsigned ClassID) const getNumberOfRegisters() argument
704 getRegisterClassForType(bool Vector,Type * Ty) const getRegisterClassForType() argument
708 getRegisterClassName(unsigned ClassID) const getRegisterClassName() argument
713 getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const getRegisterBitWidth() argument
734 shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const shouldMaximizeVectorBandwidth() argument
739 getMinimumVF(unsigned ElemWidth,bool IsScalable) const getMinimumVF() argument
744 getMaximumVF(unsigned ElemWidth,unsigned Opcode) const getMaximumVF() argument
749 getStoreMinimumVF(unsigned VF,Type * ScalarMemTy,Type * ScalarValTy) const getStoreMinimumVF() argument
754 shouldConsiderAddressTypePromotion(const Instruction & I,bool & AllowPromotionWithoutCommonHeader) const shouldConsiderAddressTypePromotion() argument
765 getCacheSize(CacheLevel Level) const getCacheSize() argument
770 getCacheAssociativity(CacheLevel Level) const getCacheAssociativity() argument
785 getMinPrefetchStride(unsigned NumMemAccesses,unsigned NumStridedMemAccesses,unsigned NumPrefetches,bool HasCall) const getMinPrefetchStride() argument
798 shouldPrefetchAddressSpace(unsigned AS) const shouldPrefetchAddressSpace() argument
802 getMaxInterleaveFactor(ElementCount VF) const getMaxInterleaveFactor() argument
870 getArithmeticInstrCost(unsigned Opcode,Type * Ty,TTI::TargetCostKind CostKind,OperandValueInfo Op1Info,OperandValueInfo Op2Info,ArrayRef<const Value * > Args,const Instruction * CxtI) const getArithmeticInstrCost() argument
881 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) const getAltInstrCost() argument
891 getShuffleCost(ShuffleKind Kind,VectorType * Ty,ArrayRef<int> Mask,TTI::TargetCostKind CostKind,int Index,VectorType * SubTp,ArrayRef<const Value * > Args) const getShuffleCost() argument
944 getCastInstrCost(unsigned Opcode,Type * Dst,Type * Src,CastContextHint CCH,TTI::TargetCostKind CostKind,const Instruction * I) const getCastInstrCost() argument
954 getExtractWithExtendCost(unsigned Opcode,Type * Dst,VectorType * VecTy,unsigned Index) const getExtractWithExtendCost() argument
962 getCFInstrCost(unsigned Opcode,TTI::TargetCostKind CostKind,const Instruction * I) const getCFInstrCost() argument
972 getCmpSelInstrCost(unsigned Opcode,Type * ValTy,Type * CondTy,CmpInst::Predicate VecPred,TTI::TargetCostKind CostKind,const Instruction * I) const getCmpSelInstrCost() argument
983 getVectorInstrCost(unsigned Opcode,Type * Val,TTI::TargetCostKind CostKind,unsigned Index,Value * Op0,Value * Op1) const getVectorInstrCost() argument
996 getVectorInstrCost(const Instruction & I,Type * Val,TTI::TargetCostKind CostKind,unsigned Index) const getVectorInstrCost() argument
1017 getMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) const getMemoryOpCost() argument
1028 getMaskedMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind) const getMaskedMemoryOpCost() argument
1037 getGatherScatterOpCost(unsigned Opcode,Type * DataTy,const Value * Ptr,bool VariableMask,Align Alignment,TTI::TargetCostKind CostKind,const Instruction * I) const getGatherScatterOpCost() argument
1047 getInterleavedMemoryOpCost(unsigned Opcode,Type * VecTy,unsigned Factor,ArrayRef<unsigned> Indices,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,bool UseMaskForCond,bool UseMaskForGaps) const getInterleavedMemoryOpCost() argument
1057 getIntrinsicInstrCost(const IntrinsicCostAttributes & ICA,TTI::TargetCostKind CostKind) const getIntrinsicInstrCost() argument
1066 getCallInstrCost(Function * F,Type * RetTy,ArrayRef<Type * > Tys,TTI::TargetCostKind CostKind) const getCallInstrCost() argument
1072 getNumberOfParts(Type * Tp) const getNumberOfParts() argument
1078 getAddressComputationCost(Type * Tp,ScalarEvolution * SE,const SCEV * Ptr) const getAddressComputationCost() argument
1084 getMemcpyCost(const Instruction * I) const getMemcpyCost() argument
1096 getArithmeticReductionCost(unsigned Opcode,VectorType * Ty,std::optional<FastMathFlags> FMF,TTI::TargetCostKind CostKind) const getArithmeticReductionCost() argument
1105 getMinMaxReductionCost(Intrinsic::ID IID,VectorType * Ty,FastMathFlags FMF,TTI::TargetCostKind CostKind) const getMinMaxReductionCost() argument
1114 getExtendedReductionCost(unsigned Opcode,bool IsUnsigned,Type * ResTy,VectorType * Ty,FastMathFlags FMF,TTI::TargetCostKind CostKind) const getExtendedReductionCost() argument
1121 getMulAccReductionCost(bool IsUnsigned,Type * ResTy,VectorType * Ty,TTI::TargetCostKind CostKind) const getMulAccReductionCost() argument
1126 getCostOfKeepingLiveOverCall(ArrayRef<Type * > Tys) const getCostOfKeepingLiveOverCall() argument
1131 getTgtMemIntrinsic(IntrinsicInst * Inst,MemIntrinsicInfo & Info) const getTgtMemIntrinsic() argument
1140 getOrCreateResultFromMemIntrinsic(IntrinsicInst * Inst,Type * ExpectedType) const getOrCreateResultFromMemIntrinsic() argument
1147 getMemcpyLoopLoweringType(LLVMContext & Context,Value * Length,unsigned SrcAddrSpace,unsigned DestAddrSpace,unsigned SrcAlign,unsigned DestAlign,std::optional<uint32_t> AtomicElementSize) const getMemcpyLoopLoweringType() argument
1157 getMemcpyLoopResidualLoweringType(SmallVectorImpl<Type * > & OpsOut,LLVMContext & Context,unsigned RemainingBytes,unsigned SrcAddrSpace,unsigned DestAddrSpace,unsigned SrcAlign,unsigned DestAlign,std::optional<uint32_t> AtomicCpySize) const getMemcpyLoopResidualLoweringType() argument
1164 areInlineCompatible(const Function * Caller,const Function * Callee) const areInlineCompatible() argument
1171 getInlineCallPenalty(const Function * F,const CallBase & Call,unsigned DefaultCallPenalty) const getInlineCallPenalty() argument
1177 areTypesABICompatible(const Function * Caller,const Function * Callee,const ArrayRef<Type * > & Types) const areTypesABICompatible() argument
1182 isIndexedLoadLegal(MemIndexedMode Mode,Type * Ty) const isIndexedLoadLegal() argument
1187 isIndexedStoreLegal(MemIndexedMode Mode,Type * Ty) const isIndexedStoreLegal() argument
1191 getLoadStoreVecRegBitWidth(unsigned AS) const getLoadStoreVecRegBitWidth() argument
1195 isLegalToVectorizeLoad(LoadInst * LI) const isLegalToVectorizeLoad() argument
1199 isLegalToVectorizeStore(StoreInst * SI) const isLegalToVectorizeStore() argument
1204 isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,Align Alignment,unsigned AddrSpace) const isLegalToVectorizeLoadChain() argument
1210 isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,Align Alignment,unsigned AddrSpace) const isLegalToVectorizeStoreChain() argument
1216 isLegalToVectorizeReduction(const RecurrenceDescriptor & RdxDesc,ElementCount VF) const isLegalToVectorizeReduction() argument
1220 isElementTypeLegalForScalableVector(Type * Ty) const isElementTypeLegalForScalableVector() argument
1227 getLoadVectorFactor(unsigned VF,unsigned LoadSize,unsigned ChainSizeInBytes,VectorType * VecTy) const getLoadVectorFactor() argument
1234 getStoreVectorFactor(unsigned VF,unsigned StoreSize,unsigned ChainSizeInBytes,VectorType * VecTy) const getStoreVectorFactor() argument
1239 preferInLoopReduction(unsigned Opcode,Type * Ty,ReductionFlags Flags) const preferInLoopReduction() argument
1244 preferPredicatedReductionSelect(unsigned Opcode,Type * Ty,ReductionFlags Flags) const preferPredicatedReductionSelect() argument
1253 getVPLegalizationStrategy(const VPIntrinsic & VPI) const getVPLegalizationStrategy() argument
1257 hasArmWideBranch(bool Thumb) const hasArmWideBranch() argument
1265 shouldExpandReduction(const IntrinsicInst * II) const shouldExpandReduction() argument
1286 hasActiveVectorLength(unsigned Opcode,Type * DataType,Align Alignment) const hasActiveVectorLength() argument
[all...] |
| /freebsd-src/contrib/llvm-project/clang/lib/Basic/ |
| H A D | SourceLocation.cpp | 33 void PrettyStackTraceLoc::print(raw_ostream &OS) const { in print()
62 void SourceLocation::print(raw_ostream &OS, const SourceManager &SM)const{ in print() argument
89 SourceLocation::printToString(const SourceManager &SM) const { in printToString() argument
96 LLVM_DUMP_METHOD void SourceLocation::dump(const SourceManager &SM) const { in dump() argument
101 LLVM_DUMP_METHOD void SourceRange::dump(const SourceManager &SM) const { in dump() argument
136 void SourceRange::print(raw_ostream &OS, const SourceManager &SM) const { in print() argument
148 SourceRange::printToString(const SourceManager &SM) const { in printToString() argument
183 PresumedLoc FullSourceLoc::getPresumedLoc(bool UseLineDirectives) const { in getPresumedLoc()
190 bool FullSourceLoc::isMacroArgExpansion(FullSourceLoc *StartLoc) const { in isMacroArgExpansion()
215 unsigned FullSourceLoc::getLineNumber(bool *Invalid) const { in getLineNumber()
[all …]
|
| H A D | TargetInfo.cpp | 195 checkCFProtectionBranchSupported(DiagnosticsEngine & Diags) const checkCFProtectionBranchSupported() argument
201 checkCFProtectionReturnSupported(DiagnosticsEngine & Diags) const checkCFProtectionReturnSupported() argument
226 getTypeConstantSuffix(IntType T) const getTypeConstantSuffix() argument
269 getTypeWidth(IntType T) const getTypeWidth() argument
286 getIntTypeByWidth(unsigned BitWidth,bool IsSigned) const getIntTypeByWidth() argument
301 getLeastIntTypeByWidth(unsigned BitWidth,bool IsSigned) const getLeastIntTypeByWidth() argument
316 getRealTypeByWidth(unsigned BitWidth,FloatModeKind ExplicitType) const getRealTypeByWidth() argument
351 getTypeAlign(IntType T) const getTypeAlign() argument
523 initFeatureMap(llvm::StringMap<bool> & Features,DiagnosticsEngine & Diags,StringRef CPU,const std::vector<std::string> & FeatureVec) const initFeatureMap() argument
537 parseTargetAttr(StringRef Features) const parseTargetAttr() argument
582 getCallingConvKind(bool ClangABICompat4) const getCallingConvKind() argument
589 areDefaultedSMFStillPOD(const LangOptions & LangOpts) const areDefaultedSMFStillPOD() argument
593 getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const getOpenCLTypeAddrSpace() argument
620 isValidClobber(StringRef Name) const isValidClobber() argument
628 isValidGCCRegisterName(StringRef Name) const isValidGCCRegisterName() argument
674 getNormalizedGCCRegisterName(StringRef Name,bool ReturnCanonical) const getNormalizedGCCRegisterName() argument
714 validateOutputConstraint(ConstraintInfo & Info) const validateOutputConstraint() argument
790 resolveSymbolicName(const char * & Name,ArrayRef<ConstraintInfo> OutputConstraints,unsigned & Index) const resolveSymbolicName() argument
813 validateInputConstraint(MutableArrayRef<ConstraintInfo> OutputConstraints,ConstraintInfo & Info) const validateInputConstraint() argument
[all...] |
| /freebsd-src/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | SystemZ.cpp | 84 const uint8_t *loc) const { in getRelExpr() argument
179 void SystemZ::writeGotHeader(uint8_t *buf) const { in writeGotHeader()
185 void SystemZ::writeGotPlt(uint8_t *buf, const Symbol &s) const { in writeGotPlt() argument
189 void SystemZ::writeIgotPlt(uint8_t *buf, const Symbol &s) const { in writeIgotPlt() argument
194 void SystemZ::writePltHeader(uint8_t *buf) const { in writePltHeader()
211 void SystemZ::addPltHeaderSymbols(InputSection &isec) const { in addPltHeaderSymbols()
218 uint64_t pltEntryAddr) const { in writePlt()
235 int64_t SystemZ::getImplicitAddend(const uint8_t *buf, RelType type) const { in getImplicitAddend()
270 RelType SystemZ::getDynRel(RelType type) const { in getDynRel()
276 RelExpr SystemZ::adjustTlsExpr(RelType type, RelExpr expr) const { in adjustTlsExpr()
[all …]
|
| /freebsd-src/contrib/kyua/utils/fs/ |
| H A D | path.cpp | 100 fs::path::c_str(void) const in c_str()
110 fs::path::str(void) const in str()
122 fs::path::branch_path(void) const in branch_path()
138 fs::path::leaf_name(void) const in leaf_name()
155 fs::path::to_absolute(void) const in to_absolute()
164 fs::path::is_absolute(void) const in is_absolute()
176 fs::path::is_parent_of(path p) const in is_parent_of()
191 fs::path::ncomponents(void) const in ncomponents()
216 fs::path::operator<(const fs::path& p) const in operator <() argument
233 fs::path::operator==(const fs::path& p) const in operator ==() argument
[all …]
|
| /freebsd-src/contrib/atf/atf-c++/detail/ |
| H A D | fs.cpp | 136 const in c_str()
143 const in c_path()
150 const in str()
157 const in is_absolute()
164 const in is_root()
171 const in branch_path()
187 const in leaf_name()
203 const in to_absolute()
233 impl::path::operator==(const path& p) in operator ==()
240 impl::path::operator!=(const path& p) in operator !=()
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 155 isAsCheapAsAMove(const MachineInstr & MI) const isAsCheapAsAMove() argument
186 shouldSink(const MachineInstr & MI) const shouldSink() argument
200 findLoopInstr(MachineBasicBlock * BB,unsigned EndLoopOp,MachineBasicBlock * TargetBB,SmallPtrSet<MachineBasicBlock *,8> & Visited) const findLoopInstr() argument
290 isLoadFromStackSlot(const MachineInstr & MI,int & FrameIndex) const isLoadFromStackSlot() argument
338 isStoreToStackSlot(const MachineInstr & MI,int & FrameIndex) const isStoreToStackSlot() argument
389 hasLoadFromStackSlot(const MachineInstr & MI,SmallVectorImpl<const MachineMemOperand * > & Accesses) const hasLoadFromStackSlot() argument
407 hasStoreToStackSlot(const MachineInstr & MI,SmallVectorImpl<const MachineMemOperand * > & Accesses) const hasStoreToStackSlot() argument
439 analyzeBranch(MachineBasicBlock & MBB,MachineBasicBlock * & TBB,MachineBasicBlock * & FBB,SmallVectorImpl<MachineOperand> & Cond,bool AllowModify) const analyzeBranch() argument
606 removeBranch(MachineBasicBlock & MBB,int * BytesRemoved) const removeBranch() argument
633 insertBranch(MachineBasicBlock & MBB,MachineBasicBlock * TBB,MachineBasicBlock * FBB,ArrayRef<MachineOperand> Cond,const DebugLoc & DL,int * BytesAdded) const insertBranch() argument
750 shouldIgnoreForPipelining(const MachineInstr * MI) const shouldIgnoreForPipelining() argument
805 analyzeLoopForPipelining(MachineBasicBlock * LoopBB) const analyzeLoopForPipelining() argument
821 isProfitableToIfCvt(MachineBasicBlock & MBB,unsigned NumCycles,unsigned ExtraPredCycles,BranchProbability Probability) const isProfitableToIfCvt() argument
827 isProfitableToIfCvt(MachineBasicBlock & TMBB,unsigned NumTCycles,unsigned ExtraTCycles,MachineBasicBlock & FMBB,unsigned NumFCycles,unsigned ExtraFCycles,BranchProbability Probability) const isProfitableToIfCvt() argument
833 isProfitableToDupForIfCvt(MachineBasicBlock & MBB,unsigned NumInstrs,BranchProbability Probability) const isProfitableToDupForIfCvt() argument
859 copyPhysReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc) const copyPhysReg() argument
962 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
1010 loadRegFromStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register DestReg,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const loadRegFromStackSlot() argument
1051 expandPostRAPseudo(MachineInstr & MI) const expandPostRAPseudo() argument
1443 isConstant(const MachineFrameInfo *) const expandPostRAPseudo() argument
1446 isAliased(const MachineFrameInfo *) const expandPostRAPseudo() argument
1449 mayAlias(const MachineFrameInfo *) const expandPostRAPseudo() argument
1452 printCustom(raw_ostream & OS) const expandPostRAPseudo() argument
1545 expandVGatherPseudo(MachineInstr & MI) const expandVGatherPseudo() argument
1634 reverseBranchCondition(SmallVectorImpl<MachineOperand> & Cond) const reverseBranchCondition() argument
1649 insertNoop(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI) const insertNoop() argument
1654 isPostIncrement(const MachineInstr & MI) const isPostIncrement() argument
1666 isPredicated(const MachineInstr & MI) const isPredicated() argument
1672 PredicateInstruction(MachineInstr & MI,ArrayRef<MachineOperand> Cond) const PredicateInstruction() argument
1724 SubsumesPredicate(ArrayRef<MachineOperand> Pred1,ArrayRef<MachineOperand> Pred2) const SubsumesPredicate() argument
1731 ClobbersPredicate(MachineInstr & MI,std::vector<MachineOperand> & Pred,bool SkipDead) const ClobbersPredicate() argument
1756 isPredicable(const MachineInstr & MI) const isPredicable() argument
1794 isSchedulingBoundary(const MachineInstr & MI,const MachineBasicBlock * MBB,const MachineFunction & MF) const isSchedulingBoundary() argument
1842 getInlineAsmLength(const char * Str,const MCAsmInfo & MAI,const TargetSubtargetInfo * STI) const getInlineAsmLength() argument
1869 CreateTargetPostRAHazardRecognizer(const InstrItineraryData * II,const ScheduleDAG * DAG) const CreateTargetPostRAHazardRecognizer() argument
1881 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & Mask,int64_t & Value) const analyzeCompare() argument
1971 getInstrLatency(const InstrItineraryData * ItinData,const MachineInstr & MI,unsigned * PredCost) const getInstrLatency() argument
1976 CreateTargetScheduleState(const TargetSubtargetInfo & STI) const CreateTargetScheduleState() argument
1986 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) const areMemAccessesTriviallyDisjoint() argument
2044 getIncrementValue(const MachineInstr & MI,int & Value) const getIncrementValue() argument
2066 decomposeMachineOperandsTargetFlags(unsigned TF) const decomposeMachineOperandsTargetFlags() argument
2100 createVR(MachineFunction * MF,MVT VT) const createVR() argument
2117 isAbsoluteSet(const MachineInstr & MI) const isAbsoluteSet() argument
2121 isAccumulator(const MachineInstr & MI) const isAccumulator() argument
2126 isBaseImmOffset(const MachineInstr & MI) const isBaseImmOffset() argument
2130 isComplex(const MachineInstr & MI) const isComplex() argument
2139 isCompoundBranchInstr(const MachineInstr & MI) const isCompoundBranchInstr() argument
2145 isConstExtended(const MachineInstr & MI) const isConstExtended() argument
2194 isDeallocRet(const MachineInstr & MI) const isDeallocRet() argument
2210 isDependent(const MachineInstr & ProdMI,const MachineInstr & ConsMI) const isDependent() argument
2240 isDotCurInst(const MachineInstr & MI) const isDotCurInst() argument
2251 isDotNewInst(const MachineInstr & MI) const isDotNewInst() argument
2260 isDuplexPair(const MachineInstr & MIa,const MachineInstr & MIb) const isDuplexPair() argument
2266 isEndLoopN(unsigned Opcode) const isEndLoopN() argument
2271 isExpr(unsigned OpType) const isExpr() argument
2285 isExtendable(const MachineInstr & MI) const isExtendable() argument
2307 isExtended(const MachineInstr & MI) const isExtended() argument
2320 isFloat(const MachineInstr & MI) const isFloat() argument
2328 isHVXMemWithAIndirect(const MachineInstr & I,const MachineInstr & J) const isHVXMemWithAIndirect() argument
2336 isIndirectCall(const MachineInstr & MI) const isIndirectCall() argument
2347 isIndirectL4Return(const MachineInstr & MI) const isIndirectL4Return() argument
2361 isJumpR(const MachineInstr & MI) const isJumpR() argument
2380 isJumpWithinBranchRange(const MachineInstr & MI,unsigned offset) const isJumpWithinBranchRange() argument
2421 isLateSourceInstr(const MachineInstr & MI) const isLateSourceInstr() argument
2427 isLoopN(const MachineInstr & MI) const isLoopN() argument
2439 isMemOp(const MachineInstr & MI) const isMemOp() argument
2471 isNewValue(const MachineInstr & MI) const isNewValue() argument
2476 isNewValue(unsigned Opcode) const isNewValue() argument
2481 isNewValueInst(const MachineInstr & MI) const isNewValueInst() argument
2485 isNewValueJump(const MachineInstr & MI) const isNewValueJump() argument
2489 isNewValueJump(unsigned Opcode) const isNewValueJump() argument
2493 isNewValueStore(const MachineInstr & MI) const isNewValueStore() argument
2498 isNewValueStore(unsigned Opcode) const isNewValueStore() argument
2505 isOperandExtended(const MachineInstr & MI,unsigned OperandNum) const isOperandExtended() argument
2511 isPredicatedNew(const MachineInstr & MI) const isPredicatedNew() argument
2517 isPredicatedNew(unsigned Opcode) const isPredicatedNew() argument
2523 isPredicatedTrue(const MachineInstr & MI) const isPredicatedTrue() argument
2529 isPredicatedTrue(unsigned Opcode) const isPredicatedTrue() argument
2537 isPredicated(unsigned Opcode) const isPredicated() argument
2542 isPredicateLate(unsigned Opcode) const isPredicateLate() argument
2547 isPredictedTaken(unsigned Opcode) const isPredictedTaken() argument
2554 isSaveCalleeSavedRegsCall(const MachineInstr & MI) const isSaveCalleeSavedRegsCall() argument
2561 isSignExtendingLoad(const MachineInstr & MI) const isSignExtendingLoad() argument
2639 isSolo(const MachineInstr & MI) const isSolo() argument
2644 isSpillPredRegOp(const MachineInstr & MI) const isSpillPredRegOp() argument
2654 isTailCall(const MachineInstr & MI) const isTailCall() argument
2665 isTC1(const MachineInstr & MI) const isTC1() argument
2670 isTC2(const MachineInstr & MI) const isTC2() argument
2675 isTC2Early(const MachineInstr & MI) const isTC2Early() argument
2680 isTC4x(const MachineInstr & MI) const isTC4x() argument
2687 isToBeScheduledASAP(const MachineInstr & MI1,const MachineInstr & MI2) const isToBeScheduledASAP() argument
2704 isHVXVec(const MachineInstr & MI) const isHVXVec() argument
2710 isValidAutoIncImm(const EVT VT,int Offset) const isValidAutoIncImm() argument
2748 isValidOffset(unsigned Opcode,int Offset,const TargetRegisterInfo * TRI,bool Extend) const isValidOffset() argument
2929 isVecAcc(const MachineInstr & MI) const isVecAcc() argument
2933 isVecALU(const MachineInstr & MI) const isVecALU() argument
2942 isVecUsableNextPacket(const MachineInstr & ProdMI,const MachineInstr & ConsMI) const isVecUsableNextPacket() argument
2955 isZeroExtendingLoad(const MachineInstr & MI) const isZeroExtendingLoad() argument
3035 addLatencyToSchedule(const MachineInstr & MI1,const MachineInstr & MI2) const addLatencyToSchedule() argument
3046 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
3057 canExecuteInBundle(const MachineInstr & First,const MachineInstr & Second) const canExecuteInBundle() argument
3081 doesNotReturn(const MachineInstr & CallMI) const doesNotReturn() argument
3086 hasEHLabel(const MachineBasicBlock * B) const hasEHLabel() argument
3095 hasNonExtEquivalent(const MachineInstr & MI) const hasNonExtEquivalent() argument
3130 hasPseudoInstrPair(const MachineInstr & MI) const hasPseudoInstrPair() argument
3135 hasUncondBranch(const MachineBasicBlock * B) const hasUncondBranch() argument
3147 mayBeCurLoad(const MachineInstr & MI) const mayBeCurLoad() argument
3154 mayBeNewStore(const MachineInstr & MI) const mayBeNewStore() argument
3163 producesStall(const MachineInstr & ProdMI,const MachineInstr & ConsMI) const producesStall() argument
3181 producesStall(const MachineInstr & MI,MachineBasicBlock::const_instr_iterator BII) const producesStall() argument
3201 predCanBeUsedAsDotNew(const MachineInstr & MI,Register PredReg) const predCanBeUsedAsDotNew() argument
3235 PredOpcodeHasJMP_c(unsigned Opcode) const PredOpcodeHasJMP_c() argument
3246 predOpcodeHasNot(ArrayRef<MachineOperand> Cond) const predOpcodeHasNot() argument
3252 getAddrMode(const MachineInstr & MI) const getAddrMode() argument
3263 getBaseAndOffset(const MachineInstr & MI,int64_t & Offset,unsigned & AccessSize) const getBaseAndOffset() argument
3295 getBaseAndOffsetPosition(const MachineInstr & MI,unsigned & BasePos,unsigned & OffsetPos) const getBaseAndOffsetPosition() argument
3332 getBranchingInstrs(MachineBasicBlock & MBB) const getBranchingInstrs() argument
3389 getCExtOpNum(const MachineInstr & MI) const getCExtOpNum() argument
3397 getCompoundCandidateGroup(const MachineInstr & MI) const getCompoundCandidateGroup() argument
3485 getCompoundOpcode(const MachineInstr & GA,const MachineInstr & GB) const getCompoundOpcode() argument
3512 getDuplexOpcode(const MachineInstr & MI,bool ForBigCore) const getDuplexOpcode() argument
3568 getCondOpcode(int Opc,bool invertPredicate) const getCondOpcode() argument
3580 getDotCurOp(const MachineInstr & MI) const getDotCurOp() argument
3600 getNonDotCurOp(const MachineInstr & MI) const getNonDotCurOp() argument
3701 getDotNewOp(const MachineInstr & MI) const getDotNewOp() argument
3743 getDotNewPredJumpOp(const MachineInstr & MI,const MachineBranchProbabilityInfo * MBPI) const getDotNewPredJumpOp() argument
3829 getDotNewPredOp(const MachineInstr & MI,const MachineBranchProbabilityInfo * MBPI) const getDotNewPredOp() argument
3843 getDotOldOp(const MachineInstr & MI) const getDotOldOp() argument
3895 getDuplexCandidateGroup(const MachineInstr & MI) const getDuplexCandidateGroup() argument
4274 getEquivalentHWInstr(const MachineInstr & MI) const getEquivalentHWInstr() argument
4279 getInstrTimingClassLatency(const InstrItineraryData * ItinData,const MachineInstr & MI) const getInstrTimingClassLatency() argument
4300 getOperandLatency(const InstrItineraryData * ItinData,const MachineInstr & DefMI,unsigned DefIdx,const MachineInstr & UseMI,unsigned UseIdx) const getOperandLatency() argument
4343 getInvertedPredSense(SmallVectorImpl<MachineOperand> & Cond) const getInvertedPredSense() argument
4351 getInvertedPredicatedOpcode(const int Opc) const getInvertedPredicatedOpcode() argument
4362 getMaxValue(const MachineInstr & MI) const getMaxValue() argument
4376 isAddrModeWithOffset(const MachineInstr & MI) const isAddrModeWithOffset() argument
4404 isPureSlot0(const MachineInstr & MI) const isPureSlot0() argument
4416 isRestrictNoSlot1Store(const MachineInstr & MI) const isRestrictNoSlot1Store() argument
4423 changeDuplexOpcode(MachineBasicBlock::instr_iterator MII,bool ToBigInstrs) const changeDuplexOpcode() argument
4441 translateInstrsForDup(MachineFunction & MF,bool ToBigInstrs) const translateInstrsForDup() argument
4451 translateInstrsForDup(MachineBasicBlock::instr_iterator MII,bool ToBigInstrs) const translateInstrsForDup() argument
4459 getMemAccessSize(const MachineInstr & MI) const getMemAccessSize() argument
4482 getMinValue(const MachineInstr & MI) const getMinValue() argument
4496 getNonExtOpcode(const MachineInstr & MI) const getNonExtOpcode() argument
4521 getPredReg(ArrayRef<MachineOperand> Cond,Register & PredReg,unsigned & PredRegPos,unsigned & PredRegFlags) const getPredReg() argument
4540 getPseudoInstrPair(const MachineInstr & MI) const getPseudoInstrPair() argument
4544 getRegForm(const MachineInstr & MI) const getRegForm() argument
4552 getSize(const MachineInstr & MI) const getSize() argument
4586 getType(const MachineInstr & MI) const getType() argument
4591 getUnits(const MachineInstr & MI) const getUnits() argument
4599 nonDbgBBSize(const MachineBasicBlock * BB) const nonDbgBBSize() argument
4604 nonDbgBundleSize(MachineBasicBlock::const_iterator BundleHead) const nonDbgBundleSize() argument
4613 immediateExtend(MachineInstr & MI) const immediateExtend() argument
4627 invertAndChangeJumpTarget(MachineInstr & MI,MachineBasicBlock * NewTarget) const invertAndChangeJumpTarget() argument
4647 genAllInsnTimingClasses(MachineFunction & MF) const genAllInsnTimingClasses() argument
4669 reversePredSense(MachineInstr & MI) const reversePredSense() argument
4676 reversePrediction(unsigned Opcode) const reversePrediction() argument
4687 validateBranchCond(const ArrayRef<MachineOperand> & Cond) const validateBranchCond() argument
4693 setBundleNoShuf(MachineBasicBlock::instr_iterator MIB) const setBundleNoShuf() argument
4702 getBundleNoShuf(const MachineInstr & MIB) const getBundleNoShuf() argument
4709 changeAddrMode_abs_io(short Opc) const changeAddrMode_abs_io() argument
4713 changeAddrMode_io_abs(short Opc) const changeAddrMode_io_abs() argument
4717 changeAddrMode_io_pi(short Opc) const changeAddrMode_io_pi() argument
4721 changeAddrMode_io_rr(short Opc) const changeAddrMode_io_rr() argument
4725 changeAddrMode_pi_io(short Opc) const changeAddrMode_pi_io() argument
4729 changeAddrMode_rr_io(short Opc) const changeAddrMode_rr_io() argument
4733 changeAddrMode_rr_ur(short Opc) const changeAddrMode_rr_ur() argument
4737 changeAddrMode_ur_rr(short Opc) const changeAddrMode_ur_rr() argument
[all...] |
| /freebsd-src/contrib/kyua/utils/ |
| H A D | datetime.cpp | 110 datetime::delta::to_microseconds(void) const in to_microseconds()
122 datetime::delta::operator==(const datetime::delta& other) const in operator ==() argument
134 datetime::delta::operator!=(const datetime::delta& other) const in operator !=() argument
146 datetime::delta::operator<(const datetime::delta& other) const in operator <() argument
160 datetime::delta::operator<=(const datetime::delta& other) const in operator <=() argument
172 datetime::delta::operator>(const datetime::delta& other) const in operator >() argument
186 datetime::delta::operator>=(const datetime::delta& other) const in operator >=() argument
198 datetime::delta::operator+(const datetime::delta& other) const in operator +() argument
224 datetime::delta::operator*(const std::size_t factor) const in operator *() argument
384 datetime::timestamp::strftime(const std::string& format) const in strftime() argument
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 53 unsigned &RegToUseForCFI) const { in regNeedsCFI() argument
71 AArch64RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { in getCalleeSavedRegs() argument
138 getDarwinCalleeSavedRegs(const MachineFunction * MF) const getDarwinCalleeSavedRegs() argument
184 getCalleeSavedRegsViaCopy(const MachineFunction * MF) const getCalleeSavedRegsViaCopy() argument
193 UpdateCustomCalleeSavedRegs(MachineFunction & MF) const UpdateCustomCalleeSavedRegs() argument
211 getSubClassWithSubReg(const TargetRegisterClass * RC,unsigned Idx) const getSubClassWithSubReg() argument
224 getDarwinCallPreservedMask(const MachineFunction & MF,CallingConv::ID CC) const getDarwinCallPreservedMask() argument
262 getCallPreservedMask(const MachineFunction & MF,CallingConv::ID CC) const getCallPreservedMask() argument
310 getCustomEHPadPreservedMask(const MachineFunction & MF) const getCustomEHPadPreservedMask() argument
326 UpdateCustomCallPreservedMask(MachineFunction & MF,const uint32_t ** Mask) const UpdateCustomCallPreservedMask() argument
359 getThisReturnPreservedMask(const MachineFunction & MF,CallingConv::ID CC) const getThisReturnPreservedMask() argument
379 explainReservedReg(const MachineFunction & MF,MCRegister PhysReg) const explainReservedReg() argument
405 getStrictlyReservedRegs(const MachineFunction & MF) const getStrictlyReservedRegs() argument
466 getReservedRegs(const MachineFunction & MF) const getReservedRegs() argument
479 isReservedReg(const MachineFunction & MF,MCRegister Reg) const isReservedReg() argument
484 isStrictlyReservedReg(const MachineFunction & MF,MCRegister Reg) const isStrictlyReservedReg() argument
488 isAnyArgRegReserved(const MachineFunction & MF) const isAnyArgRegReserved() argument
495 emitReservedArgRegCallError(const MachineFunction & MF) const emitReservedArgRegCallError() argument
502 isAsmClobberable(const MachineFunction & MF,MCRegister PhysReg) const isAsmClobberable() argument
519 getPointerRegClass(const MachineFunction & MF,unsigned Kind) const getPointerRegClass() argument
524 getCrossCopyRegClass(const TargetRegisterClass * RC) const getCrossCopyRegClass() argument
532 hasBasePointer(const MachineFunction & MF) const hasBasePointer() argument
569 isArgumentRegister(const MachineFunction & MF,MCRegister Reg) const isArgumentRegister() argument
643 getFrameRegister(const MachineFunction & MF) const getFrameRegister() argument
649 requiresRegisterScavenging(const MachineFunction & MF) const requiresRegisterScavenging() argument
654 requiresVirtualBaseRegisters(const MachineFunction & MF) const requiresVirtualBaseRegisters() argument
659 useFPForScavengingIndex(const MachineFunction & MF) const useFPForScavengingIndex() argument
677 requiresFrameIndexScavenging(const MachineFunction & MF) const requiresFrameIndexScavenging() argument
682 cannotEliminateFrame(const MachineFunction & MF) const cannotEliminateFrame() argument
694 needsFrameBaseReg(MachineInstr * MI,int64_t Offset) const needsFrameBaseReg() argument
759 isFrameOffsetLegal(const MachineInstr * MI,Register BaseReg,int64_t Offset) const isFrameOffsetLegal() argument
770 materializeFrameBaseRegister(MachineBasicBlock * MBB,int FrameIdx,int64_t Offset) const materializeFrameBaseRegister() argument
793 resolveFrameIndex(MachineInstr & MI,Register BaseReg,int64_t Offset) const resolveFrameIndex() argument
841 getOffsetOpcodes(const StackOffset & Offset,SmallVectorImpl<uint64_t> & Ops) const getOffsetOpcodes() argument
869 eliminateFrameIndex(MachineBasicBlock::iterator II,int SPAdj,unsigned FIOperandNum,RegScavenger * RS) const eliminateFrameIndex() argument
961 getRegPressureLimit(const TargetRegisterClass * RC,MachineFunction & MF) const getRegPressureLimit() argument
1008 getLocalAddressRegister(const MachineFunction & MF) const getLocalAddressRegister() argument
1021 shouldCoalesce(MachineInstr * MI,const TargetRegisterClass * SrcRC,unsigned SubReg,const TargetRegisterClass * DstRC,unsigned DstSubReg,const TargetRegisterClass * NewRC,LiveIntervals & LIS) const shouldCoalesce() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelDAGToDAG.cpp | 52 void MipsDAGToDAGISelLegacy::getAnalysisUsage(AnalysisUsage &AU) const { in getAnalysisUsage() argument
80 SDValue &Offset) const { in selectAddrRegImm() argument
86 SDValue &Offset) const { in selectAddrDefault() argument
92 SDValue &Offset) const { in selectIntAddr() argument
98 SDValue &Offset) const { in selectIntAddr11MM() argument
104 SDValue &Offset) const { in selectIntAddr12MM() argument
110 SDValue &Offset) const { in selectIntAddr16MM() argument
116 SDValue &Offset) const { in selectIntAddrLSL2MM() argument
122 SDValue &Offset) const { in selectIntAddrSImm10() argument
128 SDValue &Offset) const { in selectIntAddrSImm10Lsl1() argument
134 selectIntAddrSImm10Lsl2(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl2() argument
140 selectIntAddrSImm10Lsl3(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl3() argument
158 selectVSplat(SDNode * N,APInt & Imm,unsigned MinSizeInBits) const selectVSplat() argument
163 selectVSplatUimm1(SDValue N,SDValue & Imm) const selectVSplatUimm1() argument
168 selectVSplatUimm2(SDValue N,SDValue & Imm) const selectVSplatUimm2() argument
173 selectVSplatUimm3(SDValue N,SDValue & Imm) const selectVSplatUimm3() argument
178 selectVSplatUimm4(SDValue N,SDValue & Imm) const selectVSplatUimm4() argument
183 selectVSplatUimm5(SDValue N,SDValue & Imm) const selectVSplatUimm5() argument
188 selectVSplatUimm6(SDValue N,SDValue & Imm) const selectVSplatUimm6() argument
193 selectVSplatUimm8(SDValue N,SDValue & Imm) const selectVSplatUimm8() argument
198 selectVSplatSimm5(SDValue N,SDValue & Imm) const selectVSplatSimm5() argument
203 selectVSplatUimmPow2(SDValue N,SDValue & Imm) const selectVSplatUimmPow2() argument
208 selectVSplatUimmInvPow2(SDValue N,SDValue & Imm) const selectVSplatUimmInvPow2() argument
213 selectVSplatMaskL(SDValue N,SDValue & Imm) const selectVSplatMaskL() argument
218 selectVSplatMaskR(SDValue N,SDValue & Imm) const selectVSplatMaskR() argument
330 isUnneededShiftMask(SDNode * N,unsigned ShAmtBits) const isUnneededShiftMask() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Option/ |
| H A D | ArgList.cpp | 57 ArgList::getRange(std::initializer_list<OptSpecifier> Ids) const { in getRange()
72 bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier Neg, bool Default) const { in hasFlag()
79 bool Default) const { in hasFlagNoClaim()
86 bool Default) const { in hasFlag()
92 StringRef ArgList::getLastArgValue(OptSpecifier Id, StringRef Default) const { in getLastArgValue()
98 std::vector<std::string> ArgList::getAllArgValues(OptSpecifier Id) const { in getAllArgValues()
105 OptSpecifier Neg) const { in addOptInFlag()
113 ArrayRef<OptSpecifier> ExcludeIds) const { in AddAllArgsExcept()
136 ArrayRef<OptSpecifier> Ids) const { in addAllArgs()
141 void ArgList::AddAllArgs(ArgStringList &Output, OptSpecifier Id0) const { in AddAllArgs()
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Support/ |
| H A D | DataExtractor.cpp | 19 Error *E) const { in prepareRead()
41 T DataExtractor::getU(uint64_t *offset_ptr, Error *Err) const { in getU()
61 Error *Err) const { in getUs()
80 uint8_t DataExtractor::getU8(uint64_t *offset_ptr, llvm::Error *Err) const { in getU8()
85 uint32_t count) const { in getU8()
89 uint8_t *DataExtractor::getU8(Cursor &C, uint8_t *Dst, uint32_t Count) const { in getU8()
93 uint16_t DataExtractor::getU16(uint64_t *offset_ptr, llvm::Error *Err) const { in getU16()
98 uint32_t count) const { in getU16()
102 uint32_t DataExtractor::getU24(uint64_t *OffsetPtr, Error *Err) const { in getU24()
108 uint32_t DataExtractor::getU32(uint64_t *offset_ptr, llvm::Error *Err) const { in getU32()
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.cpp | 28 bool SPIRVInstrInfo::isConstantInstr(const MachineInstr &MI) const { in isConstantInstr() argument
49 isTypeDeclInstr(const MachineInstr & MI) const isTypeDeclInstr() argument
59 isDecorationInstr(const MachineInstr & MI) const isDecorationInstr() argument
72 isHeaderInstr(const MachineInstr & MI) const isHeaderInstr() argument
94 canUseFastMathFlags(const MachineInstr & MI) const canUseFastMathFlags() argument
113 canUseNSW(const MachineInstr & MI) const canUseNSW() argument
130 canUseNUW(const MachineInstr & MI) const canUseNUW() argument
175 analyzeBranch(MachineBasicBlock & MBB,MachineBasicBlock * & TBB,MachineBasicBlock * & FBB,SmallVectorImpl<MachineOperand> & Cond,bool AllowModify) const analyzeBranch() argument
204 removeBranch(MachineBasicBlock & MBB,int * BytesRemoved) const removeBranch() argument
224 insertBranch(MachineBasicBlock & MBB,MachineBasicBlock * TBB,MachineBasicBlock * FBB,ArrayRef<MachineOperand> Cond,const DebugLoc & DL,int * BytesAdded) const insertBranch() argument
233 copyPhysReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc) const copyPhysReg() argument
247 expandPostRAPseudo(MachineInstr & MI) const expandPostRAPseudo() argument
[all...] |
| /freebsd-src/contrib/lutok/ |
| H A D | debug.cpp | 93 lutok::debug::event(void) const in event()
103 lutok::debug::name(void) const in name()
114 lutok::debug::name_what(void) const in name_what()
125 lutok::debug::what(void) const in what()
136 lutok::debug::source(void) const in source()
147 lutok::debug::current_line(void) const in current_line()
157 lutok::debug::n_ups(void) const in n_ups()
167 lutok::debug::line_defined(void) const in line_defined()
178 lutok::debug::last_line_defined(void) const in last_line_defined()
188 lutok::debug::short_src(void) const in short_src()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.cpp | 36 bool R600InstrInfo::isVector(const MachineInstr &MI) const { in isVector() argument
43 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() argument
76 MachineBasicBlock::iterator MBBI) const { in isLegalToSplitMBBAt() argument
86 bool R600InstrInfo::isMov(unsigned Opcode) const { in isMov() argument
97 bool R600InstrInfo::isReductionOp(unsigned Opcode) const { in isReductionOp() argument
101 bool R600InstrInfo::isCubeOp(unsigned Opcode) const { in isCubeOp() argument
112 bool R600InstrInfo::isALUInstr(unsigned Opcode) const { in isALUInstr() argument
118 hasInstrModifiers(unsigned Opcode) const hasInstrModifiers() argument
126 isLDSInstr(unsigned Opcode) const isLDSInstr() argument
134 isLDSRetInstr(unsigned Opcode) const isLDSRetInstr() argument
138 canBeConsideredALU(const MachineInstr & MI) const canBeConsideredALU() argument
156 isTransOnly(unsigned Opcode) const isTransOnly() argument
162 isTransOnly(const MachineInstr & MI) const isTransOnly() argument
166 isVectorOnly(unsigned Opcode) const isVectorOnly() argument
170 isVectorOnly(const MachineInstr & MI) const isVectorOnly() argument
174 isExport(unsigned Opcode) const isExport() argument
178 usesVertexCache(unsigned Opcode) const usesVertexCache() argument
182 usesVertexCache(const MachineInstr & MI) const usesVertexCache() argument
188 usesTextureCache(unsigned Opcode) const usesTextureCache() argument
192 usesTextureCache(const MachineInstr & MI) const usesTextureCache() argument
199 mustBeLastInClause(unsigned Opcode) const mustBeLastInClause() argument
209 usesAddressRegister(MachineInstr & MI) const usesAddressRegister() argument
213 definesAddressRegister(MachineInstr & MI) const definesAddressRegister() argument
217 readsLDSSrcReg(const MachineInstr & MI) const readsLDSSrcReg() argument
233 getSelIdx(unsigned Opcode,unsigned SrcIdx) const getSelIdx() argument
257 getSrcs(MachineInstr & MI) const getSrcs() argument
319 ExtractSrcs(MachineInstr & MI,const DenseMap<unsigned,unsigned> & PV,unsigned & ConstCount) const ExtractSrcs() argument
409 isLegalUpTo(const std::vector<std::vector<std::pair<int,unsigned>>> & IGSrcs,const std::vector<R600InstrInfo::BankSwizzle> & Swz,const std::vector<std::pair<int,unsigned>> & TransSrcs,R600InstrInfo::BankSwizzle TransSwz) const isLegalUpTo() argument
478 FindSwizzleForVectorSlot(const std::vector<std::vector<std::pair<int,unsigned>>> & IGSrcs,std::vector<R600InstrInfo::BankSwizzle> & SwzCandidate,const std::vector<std::pair<int,unsigned>> & TransSrcs,R600InstrInfo::BankSwizzle TransSwz) const FindSwizzleForVectorSlot() argument
514 fitsReadPortLimitations(const std::vector<MachineInstr * > & IG,const DenseMap<unsigned,unsigned> & PV,std::vector<BankSwizzle> & ValidSwizzle,bool isLastAluTrans) const fitsReadPortLimitations() argument
557 fitsConstReadLimitations(const std::vector<unsigned> & Consts) const fitsConstReadLimitations() argument
582 fitsConstReadLimitations(const std::vector<MachineInstr * > & MIs) const fitsConstReadLimitations() argument
609 CreateTargetScheduleState(const TargetSubtargetInfo & STI) const CreateTargetScheduleState() argument
651 analyzeBranch(MachineBasicBlock & MBB,MachineBasicBlock * & TBB,MachineBasicBlock * & FBB,SmallVectorImpl<MachineOperand> & Cond,bool AllowModify) const analyzeBranch() argument
734 insertBranch(MachineBasicBlock & MBB,MachineBasicBlock * TBB,MachineBasicBlock * FBB,ArrayRef<MachineOperand> Cond,const DebugLoc & DL,int * BytesAdded) const insertBranch() argument
777 removeBranch(MachineBasicBlock & MBB,int * BytesRemoved) const removeBranch() argument
835 isPredicated(const MachineInstr & MI) const isPredicated() argument
850 isPredicable(const MachineInstr & MI) const isPredicable() argument
876 isProfitableToIfCvt(MachineBasicBlock & MBB,unsigned NumCycles,unsigned ExtraPredCycles,BranchProbability Probability) const isProfitableToIfCvt() argument
887 isProfitableToIfCvt(MachineBasicBlock & TMBB,unsigned NumTCycles,unsigned ExtraTCycles,MachineBasicBlock & FMBB,unsigned NumFCycles,unsigned ExtraFCycles,BranchProbability Probability) const isProfitableToIfCvt() argument
895 isProfitableToDupForIfCvt(MachineBasicBlock & MBB,unsigned NumCycles,BranchProbability Probability) const isProfitableToDupForIfCvt() argument
901 isProfitableToUnpredicate(MachineBasicBlock & TMBB,MachineBasicBlock & FMBB) const isProfitableToUnpredicate() argument
906 reverseBranchCondition(SmallVectorImpl<MachineOperand> & Cond) const reverseBranchCondition() argument
941 ClobbersPredicate(MachineInstr & MI,std::vector<MachineOperand> & Pred,bool SkipDead) const ClobbersPredicate() argument
946 PredicateInstruction(MachineInstr & MI,ArrayRef<MachineOperand> Pred) const PredicateInstruction() argument
979 getPredicationCost(const MachineInstr &) const getPredicationCost() argument
985 getInstrLatency(const InstrItineraryData * ItinData,const MachineInstr &,unsigned * PredCost) const getInstrLatency() argument
992 calculateIndirectAddress(unsigned RegIndex,unsigned Channel) const calculateIndirectAddress() argument
997 expandPostRAPseudo(MachineInstr & MI) const expandPostRAPseudo() argument
1065 reserveIndirectRegisters(BitVector & Reserved,const MachineFunction & MF,const R600RegisterInfo & TRI) const reserveIndirectRegisters() argument
1090 buildIndirectWrite(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg) const buildIndirectWrite() argument
1098 buildIndirectWrite(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg,unsigned AddrChan) const buildIndirectWrite() argument
1122 buildIndirectRead(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg) const buildIndirectRead() argument
1130 buildIndirectRead(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg,unsigned AddrChan) const buildIndirectRead() argument
1153 getIndirectIndexBegin(const MachineFunction & MF) const getIndirectIndexBegin() argument
1185 getIndirectIndexEnd(const MachineFunction & MF) const getIndirectIndexEnd() argument
1216 buildDefaultInstruction(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,unsigned Opcode,unsigned DstReg,unsigned Src0Reg,unsigned Src1Reg) const buildDefaultInstruction() argument
1291 buildSlotOfVectorInstruction(MachineBasicBlock & MBB,MachineInstr * MI,unsigned Slot,unsigned DstReg) const buildSlotOfVectorInstruction() argument
1341 buildMovImm(MachineBasicBlock & BB,MachineBasicBlock::iterator I,unsigned DstReg,uint64_t Imm) const buildMovImm() argument
1350 buildMovInstr(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned DstReg,unsigned SrcReg) const buildMovInstr() argument
1354 getOperandIdx(const MachineInstr & MI,unsigned Op) const getOperandIdx() argument
1358 getOperandIdx(unsigned Opcode,unsigned Op) const getOperandIdx() argument
1363 setImmOperand(MachineInstr & MI,unsigned Op,int64_t Imm) const setImmOperand() argument
1375 getFlagOp(MachineInstr & MI,unsigned SrcIdx,unsigned Flag) const getFlagOp() argument
1440 addFlag(MachineInstr & MI,unsigned Operand,unsigned Flag) const addFlag() argument
1461 clearFlag(MachineInstr & MI,unsigned Operand,unsigned Flag) const clearFlag() argument
[all...] |
| H A D | R600RegisterInfo.cpp | 36 BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const { in getReservedRegs() argument
69 const MachineFunction *) const { in getCalleeSavedRegs() argument
73 Register R600RegisterInfo::getFrameRegister(const MachineFunction &MF) const { in getFrameRegister() argument
77 unsigned R600RegisterInfo::getHWRegChan(unsigned reg) const { in getHWRegChan()
81 unsigned R600RegisterInfo::getHWRegIndex(unsigned Reg) const { in getHWRegIndex()
86 MVT VT) const { in getCFGStructurizerRegClass()
93 bool R600RegisterInfo::isPhysRegLiveAcrossClauses(Register Reg) const { in isPhysRegLiveAcrossClauses()
109 RegScavenger *RS) const { in eliminateFrameIndex()
113 void R600RegisterInfo::reserveRegisterTuples(BitVector &Reserved, unsigned Reg) const { in reserveRegisterTuples()
|
| /freebsd-src/contrib/llvm-project/llvm/tools/llvm-cov/ |
| H A D | CoverageFilters.cpp | 22 const coverage::FunctionRecord &Function) const { in matches() argument
29 const coverage::FunctionRecord &Function) const { in matches() argument
33 bool NameRegexCoverageFilter::matchesFilename(StringRef Filename) const { in matchesFilename()
39 const coverage::FunctionRecord &Function) const { in matches() argument
45 const coverage::FunctionRecord &Function) const { in matches() argument
52 const coverage::FunctionRecord &Function) const { in matches() argument
62 const coverage::FunctionRecord &Function) const { in matches() argument
70 bool CoverageFilters::matchesFilename(StringRef Filename) const { in matchesFilename()
80 const coverage::FunctionRecord &Function) const { in matches() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Object/ |
| H A D | COFFObjectFile.cpp | 102 const coff_symbol_type *Addr = in toSymb() argument
119 toSec(DataRefImpl Ref) const toSec() argument
136 moveSymbolNext(DataRefImpl & Ref) const moveSymbolNext() argument
151 getSymbolName(DataRefImpl Ref) const getSymbolName() argument
155 getSymbolValueImpl(DataRefImpl Ref) const getSymbolValueImpl() argument
159 getSymbolAlignment(DataRefImpl Ref) const getSymbolAlignment() argument
166 getSymbolAddress(DataRefImpl Ref) const getSymbolAddress() argument
187 getSymbolType(DataRefImpl Ref) const getSymbolType() argument
210 getSymbolFlags(DataRefImpl Ref) const getSymbolFlags() argument
241 getCommonSymbolSizeImpl(DataRefImpl Ref) const getCommonSymbolSizeImpl() argument
247 getSymbolSection(DataRefImpl Ref) const getSymbolSection() argument
259 getSymbolSectionID(SymbolRef Sym) const getSymbolSectionID() argument
264 moveSectionNext(DataRefImpl & Ref) const moveSectionNext() argument
270 getSectionName(DataRefImpl Ref) const getSectionName() argument
275 getSectionAddress(DataRefImpl Ref) const getSectionAddress() argument
285 getSectionIndex(DataRefImpl Sec) const getSectionIndex() argument
289 getSectionSize(DataRefImpl Ref) const getSectionSize() argument
294 getSectionContents(DataRefImpl Ref) const getSectionContents() argument
302 getSectionAlignment(DataRefImpl Ref) const getSectionAlignment() argument
307 isSectionCompressed(DataRefImpl Sec) const isSectionCompressed() argument
311 isSectionText(DataRefImpl Ref) const isSectionText() argument
316 isSectionData(DataRefImpl Ref) const isSectionData() argument
321 isSectionBSS(DataRefImpl Ref) const isSectionBSS() argument
331 isDebugSection(DataRefImpl Ref) const isDebugSection() argument
342 getSectionID(SectionRef Sec) const getSectionID() argument
349 isSectionVirtual(DataRefImpl Ref) const isSectionVirtual() argument
396 section_rel_begin(DataRefImpl Ref) const section_rel_begin() argument
406 section_rel_end(DataRefImpl Ref) const section_rel_end() argument
465 getVaPtr(uint64_t Addr,uintptr_t & Res) const getVaPtr() argument
474 getRvaPtr(uint32_t Addr,uintptr_t & Res,const char * ErrorContext) const getRvaPtr() argument
509 getRvaAndSizeAsBytes(uint32_t RVA,uint32_t Size,ArrayRef<uint8_t> & Contents,const char * ErrorContext) const getRvaAndSizeAsBytes() argument
536 getHintName(uint32_t Rva,uint16_t & Hint,StringRef & Name) const getHintName() argument
548 getDebugPDBInfo(const debug_directory * DebugDir,const codeview::DebugInfo * & PDBInfo,StringRef & PDBFileName) const getDebugPDBInfo() argument
566 getDebugPDBInfo(const codeview::DebugInfo * & PDBInfo,StringRef & PDBFileName) const getDebugPDBInfo() argument
1117 getDataDirectory(uint32_t Index) const getDataDirectory() argument
1128 getSection(int32_t Index) const getSection() argument
1141 getString(uint32_t Offset) const getString() argument
1150 getSymbolName(COFFSymbolRef Symbol) const getSymbolName() argument
1155 getSymbolName(const coff_symbol_generic * Symbol) const getSymbolName() argument
1169 getSymbolAuxData(COFFSymbolRef Symbol) const getSymbolAuxData() argument
1191 getSymbolIndex(COFFSymbolRef Symbol) const getSymbolIndex() argument
1202 getSectionName(const coff_section * Sec) const getSectionName() argument
1223 getSectionSize(const coff_section * Sec) const getSectionSize() argument
1240 getSectionContents(const coff_section * Sec,ArrayRef<uint8_t> & Res) const getSectionContents() argument
1257 toRel(DataRefImpl Rel) const toRel() argument
1261 moveRelocationNext(DataRefImpl & Rel) const moveRelocationNext() argument
1266 getRelocationOffset(DataRefImpl Rel) const getRelocationOffset() argument
1271 getRelocationSymbol(DataRefImpl Rel) const getRelocationSymbol() argument
1285 getRelocationType(DataRefImpl Rel) const getRelocationType() argument
1291 getCOFFSection(const SectionRef & Section) const getCOFFSection() argument
1295 getCOFFSymbol(const DataRefImpl & Ref) const getCOFFSymbol() argument
1303 getCOFFSymbol(const SymbolRef & Symbol) const getCOFFSymbol() argument
1308 getCOFFRelocation(const RelocationRef & Reloc) const getCOFFRelocation() argument
1313 getRelocations(const coff_section * Sec) const getRelocations() argument
1322 getRelocationTypeName(uint16_t Type) const getRelocationTypeName() argument
1421 getRelocationTypeName(DataRefImpl Rel,SmallVectorImpl<char> & Result) const getRelocationTypeName() argument
1431 mapDebugSectionName(StringRef Name) const mapDebugSectionName() argument
1438 operator ==(const ImportDirectoryEntryRef & Other) const operator ==() argument
1451 getImportTableEntry(const coff_import_directory_table_entry * & Result) const getImportTableEntry() argument
1525 getName(StringRef & Result) const getName() argument
1535 getImportLookupTableRVA(uint32_t & Result) const getImportLookupTableRVA() argument
1541 getImportAddressTableRVA(uint32_t & Result) const getImportAddressTableRVA() argument
1547 operator ==(const DelayImportDirectoryEntryRef & Other) const operator ==() argument
1572 getName(StringRef & Result) const getName() argument
1582 getDelayImportTable(const delay_import_directory_table_entry * & Result) const getDelayImportTable() argument
1588 getImportAddress(int AddrIndex,uint64_t & Result) const getImportAddress() argument
1602 operator ==(const ExportDirectoryEntryRef & Other) const operator ==() argument
1612 getDllName(StringRef & Result) const getDllName() argument
1622 getOrdinalBase(uint32_t & Result) const getOrdinalBase() argument
1628 getOrdinal(uint32_t & Result) const getOrdinal() argument
1634 getExportRVA(uint32_t & Result) const getExportRVA() argument
1648 getSymbolName(StringRef & Result) const getSymbolName() argument
1675 isForwarder(bool & Result) const isForwarder() argument
1690 getForwardTo(StringRef & Result) const getForwardTo() argument
1702 operator ==(const ImportedSymbolRef & Other) const operator ==() argument
1711 getSymbolName(StringRef & Result) const getSymbolName() argument
1731 isOrdinal(bool & Result) const isOrdinal() argument
1739 getHintNameRVA(uint32_t & Result) const getHintNameRVA() argument
1747 getOrdinal(uint16_t & Result) const getOrdinal() argument
1774 operator ==(const BaseRelocRef & Other) const operator ==() argument
1796 getType(uint8_t & Type) const getType() argument
1802 getRVA(uint32_t & Result) const getRVA() argument
[all...] |