| /llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanTransforms.cpp | 1018 unsigned ExtOpcode = match(R.getOperand(0), m_SExt(m_VPValue())) simplifyRecipe() local
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| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 800 auto ExtOpcode = (I.getOpcode() == Instruction::AShr) ? Instruction::SExt FoldShiftByConstant() local
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| H A D | InstCombineSelect.cpp | 2221 auto ExtOpcode = ExtInst->getOpcode(); foldSelectExtConst() local
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1768 widenScalarSrc(MachineInstr & MI,LLT WideTy,unsigned OpIdx,unsigned ExtOpcode) widenScalarSrc() argument
1791 narrowScalarDst(MachineInstr & MI,LLT NarrowTy,unsigned OpIdx,unsigned ExtOpcode) narrowScalarDst() argument
2169 unsigned ExtOpcode; widenScalarAddSubOverflow() local
2794 unsigned ExtOpcode = CmpInst::isSigned(static_cast<CmpInst::Predicate>( widenScalar() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1722 unpackV2S16ToS32(MachineIRBuilder & B,Register Src,unsigned ExtOpcode) unpackV2S16ToS32() argument
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4936 addRequiredExtensionForVectorMULL(SDValue N,SelectionDAG & DAG,const EVT & OrigTy,const EVT & ExtTy,unsigned ExtOpcode) addRequiredExtensionForVectorMULL() argument
6215 unsigned ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; LowerMGATHER() local
6305 unsigned ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; LowerMSCATTER() local
17529 unsigned ExtOpcode = Op0.getOpcode(); performVecReduceAddCombine() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12352 auto ExtOpcode = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; visitVSELECT() local
12760 isCompatibleLoad(SDValue N,unsigned ExtOpcode) isCompatibleLoad() argument
13456 unsigned ExtOpcode = IsSignedCmp ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; foldSextSetcc() local
[all...] |
| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 7466 unsigned ExtOpcode = combineINT_TO_FP() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6586 unsigned ExtOpcode = (Op.getOpcode() == ISD::UINT_TO_FP || LowerOperation() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9526 AddRequiredExtensionForVMULL(SDValue N,SelectionDAG & DAG,const EVT & OrigTy,const EVT & ExtTy,unsigned ExtOpcode) AddRequiredExtensionForVMULL() argument
|