Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger!

llvm-svn: 124472

Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.

llvm-svn: 124203

Speculatively revert r124138.

llvm-svn: 124142

Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.

llvm-svn: 124138

Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.

llvm-svn: 123170

Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.

These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

llvm-svn: 1

Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.

These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

llvm-svn: 123155

show more ...

Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister.

llvm-svn: 123096

Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnm

Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.

llvm-svn: 123044

show more ...

Add ARM patterns to match EXTRACT_SUBVECTOR nodes.
Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover

Add ARM patterns to match EXTRACT_SUBVECTOR nodes.
Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.

The test changes are needed to keep those spill-q tests from testing aligned
spills and restores. If the only aligned stack objects are spill slots, we
no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.

llvm-svn: 122995

show more ...

Avoid zero extend bit test operands to pointer type if all the masks fit in
the original type of the switch statement key.
rdar://8781238

llvm-svn: 122935

rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.

llvm-svn: 122310

reduce indentation by using continue, no functionality change.

llvm-svn: 121662

PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead

PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.

llvm-svn: 121120

show more ...

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

llvm-svn: 121059

add TLI support indicating that jumps are more expensive than logical operations
and use this to disable a specific optimization. Patch by Micah Villmow!

llvm-svn: 120435

Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.

llvm-svn: 119990

Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.

This currently only catches the most basic case, a two-case switch, but can be
extended later.

llvm-svn: 119964

Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test.

llvm-svn: 119898

Bug 8621 fix - pointer cast stripped from inline asm constraint argument.

llvm-svn: 119590

typo (4th checkin for one fix)

llvm-svn: 118913

Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to d

Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.

llvm-svn: 118904

show more ...

tidy up.

llvm-svn: 118896

Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.

llvm-svn: 118789

Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this

Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.

llvm-svn: 118167

show more ...

If value map does not have register for an argument then try to find frame index before giving up.

llvm-svn: 118022