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Searched refs:PTEVALID (Results 1 – 25 of 27) sorted by relevance

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/plan9/sys/src/9/pcboot/
H A Dmmu.c91 m->pdb[PDX(VPT)] = PADDR(m->pdb)|PTEWRITE|PTEVALID; in mmuinit()
172 if(pde[i] & PTEVALID){ in memglobal()
177 if(pte[j] & PTEVALID) in memglobal()
233 pdb[PDX(VPT)] = page->pa|PTEWRITE|PTEVALID; /* set up VPT */ in mmupdballoc()
442 if(!(vpd[PDX(va)]&PTEVALID)){ in putmmu()
452 vpd[PDX(va)] = PPN(page->pa)|PTEUSER|PTEWRITE|PTEVALID; in putmmu()
460 vpt[VPTX(va)] = pa|PTEUSER|PTEVALID; in putmmu()
461 if(old&PTEVALID) in putmmu()
477 if(!(vpd[PDX(va)]&PTEVALID) || !(vpt[VPTX(va)]&PTEVALID)) in checkmmu()
501 if(!(*table & PTEVALID) && create == 0) in mmuwalk()
[all …]
H A Dl32p.s111 MOVL $(PTEWRITE|PTEVALID), BX/* page permissions */
163 MOVL $(PTEWRITE|PTEVALID), BX/* page permissions */
H A Dmemory.c408 flags = PTEWRITE|PTEVALID; in map()
412 flags = PTEWRITE|PTEUNCACHED|PTEVALID; in map()
454 PTEVALID | PTEKERNEL | PTEWRITE | (physpte + i * BY2PG); in meminit()
H A Dmem.h188 #define PTEVALID (1<<0) macro
/plan9/sys/src/9/pc/
H A Dmmu.c88 m->pdb[PDX(VPT)] = PADDR(m->pdb)|PTEWRITE|PTEVALID; in mmuinit()
163 if(pde[i] & PTEVALID){ in memglobal()
168 if(pte[j] & PTEVALID) in memglobal()
224 pdb[PDX(VPT)] = page->pa|PTEWRITE|PTEVALID; /* set up VPT */ in mmupdballoc()
433 if(!(vpd[PDX(va)]&PTEVALID)){ in putmmu()
443 vpd[PDX(va)] = PPN(page->pa)|PTEUSER|PTEWRITE|PTEVALID; in putmmu()
451 vpt[VPTX(va)] = pa|PTEUSER|PTEVALID; in putmmu()
452 if(old&PTEVALID) in putmmu()
468 if(!(vpd[PDX(va)]&PTEVALID) || !(vpt[VPTX(va)]&PTEVALID)) in checkmmu()
492 if(!(*table & PTEVALID) && create == 0) in mmuwalk()
[all …]
H A Dmemory.c456 *table = map|PTEWRITE|PTEVALID; in ramscan()
462 *pte = pa|PTEWRITE|PTEUNCACHED|PTEVALID; in ramscan()
480 *pte++ = pa|PTEWRITE|PTEVALID; in ramscan()
491 *pte++ = pa|PTEWRITE|PTEUNCACHED|PTEVALID; in ramscan()
525 *table = (pa - 4*MB)|PTESIZE|PTEWRITE|PTEVALID; in ramscan()
527 *table = (pa - 4*MB)|PTESIZE|PTEWRITE|PTEUNCACHED|PTEVALID; in ramscan()
529 *table = map|PTEWRITE|PTEVALID; in ramscan()
541 m->pdb[PDX(KADDR(pa))] = map|PTEWRITE|PTEVALID; in ramscan()
667 flags = PTEWRITE|PTEVALID; in map()
671 flags = PTEWRITE|PTEUNCACHED|PTEVALID; in map()
H A Dmem.h144 #define PTEVALID (1<<0) macro
H A Dmp.c453 *pte = PADDR(p)|PTEWRITE|PTEVALID; in mpstartap()
461 *pte = PADDR(mach)|PTEWRITE|PTEVALID; in mpstartap()
H A Dl.s151 MOVL $(PTEWRITE|PTEVALID), BX /* page permissions */
156 MOVL $(PTEWRITE|PTEVALID), BX /* page permissions */
178 MOVL $(PTEWRITE|PTEVALID), BX /* page permissions */
/plan9/sys/src/9/ppc/
H A Ducu.h18 #define PTEVALID (PTE1_M|PTE1_W) /* write through */ macro
H A Dlucu.h24 MOVW $(PTEVALID|PTEWRITE), R4 /* PTEVALID => Cache coherency on */
H A Dblast.h54 #define PTEVALID PTE1_M macro
H A Dlblast.h23 MOVW $(PTEVALID|PTEWRITE), R4 /* PTEVALID => Cache coherency on */
H A Dl.s136 MOVW $(PTEVALID|PTEWRITE), R4 /* PTEVALID => Cache coherency on */
174 MOVW $(PTEVALID|PTEWRITE), R4 /* PTEVALID => Cache coherency on */
/plan9/sys/src/9/port/
H A Dfault.c98 mmuphys = PPN((*pg)->pa) | PTERONLY|PTEVALID; in fixfault()
124 mmuphys = PPN((*pg)->pa)|PTERONLY|PTEVALID; in fixfault()
150 mmuphys = PPN((*pg)->pa) | PTEWRITE | PTEVALID; in fixfault()
170 mmuphys = PPN((*pg)->pa) |PTEWRITE|PTEUNCACHED|PTEVALID; in fixfault()
/plan9/sys/src/9/bcm/
H A Dmem.h79 #define PTEVALID (1<<0) macro
/plan9/sys/src/9/kw/
H A Dmem.h105 #define PTEVALID (1<<0) macro
/plan9/sys/src/9/teg2/
H A Dmem.h111 #define PTEVALID (1<<0) macro
/plan9/sys/src/9/omap/
H A Dmem.h93 #define PTEVALID (1<<0) macro
/plan9/sys/src/9/mtx/
H A Dmem.h163 #define PTEVALID 0 macro
H A Dl.s90 MOVW $(PTEVALID|PTEWRITE), R4
/plan9/sys/src/cmd/8a/
H A Dl.s110 #define PTEVALID (1<<0) macro
227 MOVL $((((4*1024)-1)<<PGSHIFT)|PTEVALID|PTEKERNEL|PTEWRITE),BX
239 ADDL $(PTEVALID|PTEKERNEL|PTEWRITE),BX
/plan9/sys/src/9/rb/
H A Dmmu.c185 pte = PPN(pg->pa)|PTECACHABILITY|PTEGLOBL|PTEWRITE|PTEVALID; in kmap()
310 wired[i].pl = (addr >> 6) | PTEUNCACHED|PTEGLOBL|PTEWRITE|PTEVALID; in wiredpte()
H A Dmem.h277 #define PTEVALID (1<<1) macro
/plan9/sys/src/cmd/ka/
H A Dl.s86 #define PTEVALID (1<<31) macro

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