1 /* 2 * on return from this function we will be running in virtual mode. 3 * We set up the Block Address Translation (BAT) registers thus: 4 * 1) first 3 BATs are 256M blocks, starting from KZERO->0 5 * 2) remaining BAT maps last 256M directly 6 */ 7 TEXT mmuinit0(SB), $0 8 /* reset all the tlbs */ 9 MOVW $64, R3 10 MOVW R3, CTR 11 MOVW $0, R4 12 13 tlbloop: 14 TLBIE R4 15 SYNC 16 ADD $BIT(19), R4 17 BDNZ tlbloop 18 TLBSYNC 19 20 /* BATs 0 and 1 cover memory from 0x00000000 to 0x20000000 */ 21 22 /* KZERO -> 0, IBAT2 and DBAT2, 256 MB */ 23 MOVW $(KZERO|(0x7ff<<2)|2), R3 24 MOVW $(PTEVALID|PTEWRITE), R4 /* PTEVALID => Cache coherency on */ 25 MOVW R3, SPR(DBATU(2)) 26 MOVW R4, SPR(DBATL(2)) 27 MOVW R3, SPR(IBATU(2)) 28 MOVW R4, SPR(IBATL(2)) 29 30 /* enable MMU */ 31 MOVW LR, R3 32 OR $KZERO, R3 33 MOVW R3, SPR(SRR0) /* Stored PC for RFI instruction */ 34 MOVW MSR, R4 35 OR $(MSR_IR|MSR_DR|MSR_RI|MSR_FP), R4 36 MOVW R4, SPR(SRR1) 37 RFI /* resume in kernel mode in caller */ 38 39 RETURN 40