13de6a9c0SDavid du Colombier /* 23de6a9c0SDavid du Colombier * Memory and machine-specific definitions. Used in C and assembler. 33de6a9c0SDavid du Colombier */ 43de6a9c0SDavid du Colombier #define KiB 1024u /* Kibi 0x0000000000000400 */ 53de6a9c0SDavid du Colombier #define MiB 1048576u /* Mebi 0x0000000000100000 */ 63de6a9c0SDavid du Colombier #define GiB 1073741824u /* Gibi 000000000040000000 */ 73de6a9c0SDavid du Colombier 83de6a9c0SDavid du Colombier /* 93de6a9c0SDavid du Colombier * Not sure where these macros should go. 103de6a9c0SDavid du Colombier * This probably isn't right but will do for now. 113de6a9c0SDavid du Colombier * The macro names are problematic too. 123de6a9c0SDavid du Colombier */ 133de6a9c0SDavid du Colombier /* 14*12009bffSDavid du Colombier * In BITN(o), 'o' is the bit offset in the register. 153de6a9c0SDavid du Colombier * For multi-bit fields use F(v, o, w) where 'v' is the value 163de6a9c0SDavid du Colombier * of the bit-field of width 'w' with LSb at bit offset 'o'. 173de6a9c0SDavid du Colombier */ 18*12009bffSDavid du Colombier #define BITN(o) (1<<(o)) 193de6a9c0SDavid du Colombier #define F(v, o, w) (((v) & ((1<<(w))-1))<<(o)) 203de6a9c0SDavid du Colombier 213de6a9c0SDavid du Colombier /* 223de6a9c0SDavid du Colombier * Sizes 233de6a9c0SDavid du Colombier */ 243de6a9c0SDavid du Colombier #define BY2PG (4*KiB) /* bytes per page */ 253de6a9c0SDavid du Colombier #define PGSHIFT 12 /* log(BY2PG) */ 263de6a9c0SDavid du Colombier 273de6a9c0SDavid du Colombier /* max # of cpus system can run. tegra2 cpu ids are two bits wide. */ 283de6a9c0SDavid du Colombier #define MAXMACH 4 293de6a9c0SDavid du Colombier #define MACHSIZE BY2PG 303de6a9c0SDavid du Colombier #define L1SIZE (4 * BY2PG) 313de6a9c0SDavid du Colombier 323de6a9c0SDavid du Colombier #define KSTKSIZE (16*KiB) /* was 8K */ 333de6a9c0SDavid du Colombier #define STACKALIGN(sp) ((sp) & ~7) /* bug: assure with alloc */ 343de6a9c0SDavid du Colombier 353de6a9c0SDavid du Colombier /* 363de6a9c0SDavid du Colombier * Magic registers 373de6a9c0SDavid du Colombier */ 383de6a9c0SDavid du Colombier 393de6a9c0SDavid du Colombier #define USER 9 /* R9 is up-> */ 403de6a9c0SDavid du Colombier #define MACH 10 /* R10 is m-> */ 413de6a9c0SDavid du Colombier 423de6a9c0SDavid du Colombier /* 433de6a9c0SDavid du Colombier * Address spaces. 443de6a9c0SDavid du Colombier * KTZERO is used by kprof and dumpstack (if any). 453de6a9c0SDavid du Colombier * 463de6a9c0SDavid du Colombier * KZERO (0xc0000000) is mapped to physical 0 (start of dram). 473de6a9c0SDavid du Colombier * u-boot claims to occupy the first 4 MB of dram, but we're willing to 483de6a9c0SDavid du Colombier * step on it once we're loaded. 493de6a9c0SDavid du Colombier * 503de6a9c0SDavid du Colombier * L2 PTEs are stored in 4K before cpu0's Mach (8K to 12K above KZERO). 513de6a9c0SDavid du Colombier * cpu0's Mach struct is at L1 - MACHSIZE(4K) to L1 (12K to 16K above KZERO). 523de6a9c0SDavid du Colombier * L1 PTEs are stored from L1 to L1+32K (16K to 48K above KZERO). 533de6a9c0SDavid du Colombier * plan9.ini is loaded at CONFADDR (4MB). 543de6a9c0SDavid du Colombier * KTZERO may be anywhere after that. 553de6a9c0SDavid du Colombier */ 563de6a9c0SDavid du Colombier #define KSEG0 0xC0000000 /* kernel segment */ 573de6a9c0SDavid du Colombier /* mask to check segment; good for 1GB dram */ 583de6a9c0SDavid du Colombier #define KSEGM 0xC0000000 593de6a9c0SDavid du Colombier #define KZERO KSEG0 /* kernel address space */ 603de6a9c0SDavid du Colombier #define L1 (KZERO+16*KiB) /* cpu0 l1 page table; 16KiB aligned */ 613de6a9c0SDavid du Colombier #define CONFADDR (KZERO+0x400000) /* unparsed plan9.ini */ 623de6a9c0SDavid du Colombier #define CACHECONF (CONFADDR+48*KiB) 633de6a9c0SDavid du Colombier /* KTZERO must match loadaddr in mkfile */ 643de6a9c0SDavid du Colombier #define KTZERO (KZERO+0x410000) /* kernel text start */ 653de6a9c0SDavid du Colombier 663de6a9c0SDavid du Colombier #define L2pages (2*MiB) /* high memory reserved for l2 page tables */ 673de6a9c0SDavid du Colombier #define RESRVDHIMEM (64*KiB + MiB + L2pages) /* avoid HVECTOR, l2 pages */ 683de6a9c0SDavid du Colombier /* we assume that we have 1 GB of ram, which is true for all trimslices. */ 693de6a9c0SDavid du Colombier #define DRAMSIZE GiB 703de6a9c0SDavid du Colombier 713de6a9c0SDavid du Colombier #define UZERO 0 /* user segment */ 723de6a9c0SDavid du Colombier #define UTZERO (UZERO+BY2PG) /* user text start */ 733de6a9c0SDavid du Colombier #define UTROUND(t) ROUNDUP((t), BY2PG) 743de6a9c0SDavid du Colombier /* 753de6a9c0SDavid du Colombier * moved USTKTOP down to 1GB to keep MMIO space out of user space. 763de6a9c0SDavid du Colombier * moved it down another MB to utterly avoid KADDR(stack_base) mapping 773de6a9c0SDavid du Colombier * to high exception vectors. see confinit(). 783de6a9c0SDavid du Colombier */ 793de6a9c0SDavid du Colombier #define USTKTOP (0x40000000 - 64*KiB - MiB) /* user segment end +1 */ 803de6a9c0SDavid du Colombier #define USTKSIZE (8*1024*1024) /* user stack size */ 813de6a9c0SDavid du Colombier #define TSTKTOP (USTKTOP-USTKSIZE) /* sysexec temporary stack */ 823de6a9c0SDavid du Colombier #define TSTKSIZ 256 833de6a9c0SDavid du Colombier 843de6a9c0SDavid du Colombier /* address at which to copy and execute rebootcode */ 853de6a9c0SDavid du Colombier #define REBOOTADDR KADDR(0x100) 863de6a9c0SDavid du Colombier 873de6a9c0SDavid du Colombier /* 883de6a9c0SDavid du Colombier * Legacy... 893de6a9c0SDavid du Colombier */ 903de6a9c0SDavid du Colombier #define BLOCKALIGN CACHELINESZ /* only used in allocb.c */ 913de6a9c0SDavid du Colombier #define KSTACK KSTKSIZE 923de6a9c0SDavid du Colombier 933de6a9c0SDavid du Colombier /* 943de6a9c0SDavid du Colombier * Sizes 953de6a9c0SDavid du Colombier */ 963de6a9c0SDavid du Colombier #define BI2BY 8 /* bits per byte */ 973de6a9c0SDavid du Colombier #define BY2SE 4 983de6a9c0SDavid du Colombier #define BY2WD 4 993de6a9c0SDavid du Colombier #define BY2V 8 /* only used in xalloc.c */ 1003de6a9c0SDavid du Colombier 1013de6a9c0SDavid du Colombier #define CACHELINESZ 32 /* bytes per cache line */ 1023de6a9c0SDavid du Colombier #define PTEMAPMEM (1024*1024) 1033de6a9c0SDavid du Colombier #define PTEPERTAB (PTEMAPMEM/BY2PG) 1043de6a9c0SDavid du Colombier #define SEGMAPSIZE 1984 /* magic 16*124 */ 1053de6a9c0SDavid du Colombier #define SSEGMAPSIZE 16 /* magic */ 1063de6a9c0SDavid du Colombier #define PPN(x) ((x)&~(BY2PG-1)) /* pure page number? */ 1073de6a9c0SDavid du Colombier 1083de6a9c0SDavid du Colombier /* 1093de6a9c0SDavid du Colombier * With a little work these move to port. 1103de6a9c0SDavid du Colombier */ 1113de6a9c0SDavid du Colombier #define PTEVALID (1<<0) 1123de6a9c0SDavid du Colombier #define PTERONLY 0 1133de6a9c0SDavid du Colombier #define PTEWRITE (1<<1) 1143de6a9c0SDavid du Colombier #define PTEUNCACHED (1<<2) 1153de6a9c0SDavid du Colombier #define PTEKERNEL (1<<3) 1163de6a9c0SDavid du Colombier 1173de6a9c0SDavid du Colombier /* 1183de6a9c0SDavid du Colombier * Physical machine information from here on. 1193de6a9c0SDavid du Colombier */ 1203de6a9c0SDavid du Colombier 1213de6a9c0SDavid du Colombier #define PHYSDRAM 0 1223de6a9c0SDavid du Colombier 1233de6a9c0SDavid du Colombier #define PHYSIO 0x50000000 /* cpu */ 1243de6a9c0SDavid du Colombier #define VIRTIO PHYSIO 1253de6a9c0SDavid du Colombier #define PHYSL2BAG 0x50043000 /* l2 cache bag-on-the-side */ 1263de6a9c0SDavid du Colombier #define PHYSEVP 0x6000f100 /* undocumented `exception vector' */ 1273de6a9c0SDavid du Colombier #define PHYSCONS 0x70006000 /* uart console */ 1283de6a9c0SDavid du Colombier #define PHYSIOEND 0xc0000000 /* end of ahb mem & pcie */ 1293de6a9c0SDavid du Colombier 1303de6a9c0SDavid du Colombier #define PHYSAHB 0xc0000000 /* ahb bus */ 1313de6a9c0SDavid du Colombier #define VIRTAHB 0xb0000000 1323de6a9c0SDavid du Colombier #define P2VAHB(pa) ((pa) - PHYSAHB + VIRTAHB) 1333de6a9c0SDavid du Colombier 1343de6a9c0SDavid du Colombier #define PHYSNOR 0xd0000000 1353de6a9c0SDavid du Colombier #define VIRTNOR 0x40000000 136