| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dsc/ |
| H A D | rc_calc.c | 47 int slice_width = pps->slice_width; in calc_rc_params() local
60 slice_width, slice_height, in calc_rc_params()
|
| H A D | rc_calc_dpi.c | 34 to->slice_width = from->slice_width; in copy_pps_fields()
115 tmp = (unsigned long long)dsc_cfg.slice_chunk_size * 0x10000000 + (dsc_cfg.slice_width - 1); in dscc_compute_dsc_parameters()
116 do_div(tmp, (uint32_t)dsc_cfg.slice_width); //ROUND-UP in dscc_compute_dsc_parameters()
|
| H A D | dc_dsc.c | 853 int slice_width; in setup_dsc_config() local
1012 slice_width = pic_width / num_slices_h; in setup_dsc_config()
1014 is_dsc_possible = slice_width <= dsc_common_caps.max_slice_width; in setup_dsc_config()
|
| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dml/dsc/ |
| H A D | rc_calc_fpu.c | 170 int slice_width, in _do_calc_rc_params() argument
217 slice_width /= 2; in _do_calc_rc_params()
219 …padding_pixels = ((slice_width % 3) != 0) ? (3 - (slice_width % 3)) * (rc->initial_xmit_delay / sl… in _do_calc_rc_params()
|
| H A D | rc_calc_fpu.h | 86 int slice_width,
|
| /openbsd-src/sys/dev/pci/drm/display/ |
| H A D | drm_dsc_helper.c | 150 pps_payload->slice_width = cpu_to_be16(dsc_cfg->slice_width); in drm_dsc_pps_payload_pack()
1323 groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width / 2, in drm_dsc_compute_rc_parameters()
1327 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width / 2 * in drm_dsc_compute_rc_parameters()
1332 groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width, in drm_dsc_compute_rc_parameters()
1336 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width * in drm_dsc_compute_rc_parameters()
|
| /openbsd-src/sys/dev/pci/drm/include/drm/display/ |
| H A D | drm_dsc.h | 98 u16 slice_width; member
358 __be16 slice_width; member
|
| /openbsd-src/sys/dev/pci/drm/i915/display/ |
| H A D | intel_vdsc.c | 224 if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 15000) in intel_dsc_slice_dimensions_valid()
227 if (vdsc_cfg->slice_width % 2) in intel_dsc_slice_dimensions_valid()
233 if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 30000) in intel_dsc_slice_dimensions_valid()
250 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, in intel_dsc_compute_params()
469 DSC_SLICE_WIDTH(vdsc_cfg->slice_width); in intel_dsc_pps_configure()
674 vdsc_cfg->slice_width) | in intel_dsc_pps_configure()
|
| H A D | intel_hdmi.h | 54 int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
|
| H A D | intel_vdsc_regs.h | 141 #define DSC_SLICE_WIDTH(slice_width) ((slice_width) << 16) argument
|
| H A D | intel_hdmi.c | 3162 int slice_width; in intel_hdmi_dsc_get_num_slices() local
3212 slice_width = max_slice_width; in intel_hdmi_dsc_get_num_slices()
3230 slice_width = DIV_ROUND_UP(crtc_state->hw.adjusted_mode.hdisplay, target_slices); in intel_hdmi_dsc_get_num_slices()
3231 if (slice_width >= max_slice_width) in intel_hdmi_dsc_get_num_slices()
3233 } while (slice_width >= max_slice_width); in intel_hdmi_dsc_get_num_slices()
3252 intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices, in intel_hdmi_dsc_get_bpp() argument
3323 target_bytes = DIV_ROUND_UP((num_slices * slice_width * bpp), 8); in intel_hdmi_dsc_get_bpp()
|
| H A D | intel_dp.c | 2851 int num_slices, int slice_width) in intel_dp_pcon_dsc_enc_bpp() argument
2861 return intel_hdmi_dsc_get_bpp(pcon_fractional_bpp, slice_width, in intel_dp_pcon_dsc_enc_bpp()
2872 int slice_width; in intel_dp_pcon_dsc_configure() local
2901 slice_width = DIV_ROUND_UP(crtc_state->hw.adjusted_mode.hdisplay, in intel_dp_pcon_dsc_configure()
2905 num_slices, slice_width); in intel_dp_pcon_dsc_configure()
2911 pps_param[2] = slice_width & 0xFF; in intel_dp_pcon_dsc_configure()
2912 pps_param[3] = slice_width >> 8; in intel_dp_pcon_dsc_configure()
|
| H A D | icl_dsi.c | 1600 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
|
| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dsc.c | 302 DC_LOG_DSC("\tslice_width %d", pps->slice_width); in dsc_log_pps()
415 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
448 dsc_optc_cfg->slice_width = dsc_reg_vals->pps.slice_width; in dsc_prepare_config()
542 reg_vals->pps.slice_width = 0; in dsc_init_reg_values()
651 SLICE_WIDTH, reg_vals->pps.slice_width, in dsc_write_to_registers()
|
| /openbsd-src/sys/dev/pci/drm/amd/display/dc/inc/hw/ |
| H A D | dsc.h | 49 uint32_t slice_width; /* Slice width in pixels */ member
|
| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_hwseq.c | 140 dsc_optc_cfg.slice_width); in update_dsc_on_stream()
|
| /openbsd-src/sys/dev/pci/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 756 DC_LOG_DSC("\tslice_width %d", config->slice_width); in dsc_optc_config_log()
821 dsc_optc_cfg.slice_width); in link_set_dsc_on_stream()
832 dsc_optc_cfg.slice_width); in link_set_dsc_on_stream()
|
| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_hwseq.c | 1048 dsc_optc_cfg.slice_width); in update_dsc_on_stream()
|