Searched refs:current_sclk (Results 1 – 22 of 22) sorted by relevance
223 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()240 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()244 rdev->pm.current_sclk = sclk; in radeon_set_power_state()1268 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()1336 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()1404 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()1920 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info()
1410 u32 current_sclk; in trinity_patch_thermal_state() local1415 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()1418 current_sclk = pi->boot_pl.sclk; in trinity_patch_thermal_state()1423 if (ps->levels[0].sclk > current_sclk) in trinity_patch_thermal_state()1424 ps->levels[0].sclk = current_sclk; in trinity_patch_thermal_state()
1054 u32 current_sclk; in sumo_patch_thermal_state() local1059 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()1062 current_sclk = pi->boot_pl.sclk; in sumo_patch_thermal_state()1067 if (ps->levels[0].sclk > current_sclk) in sumo_patch_thermal_state()1068 ps->levels[0].sclk = current_sclk; in sumo_patch_thermal_state()
350 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_get_clock_info()
578 *value = rdev->pm.current_sclk / 100; in radeon_info_ioctl()
248 u32 sclk = rdev->pm.current_sclk; in radeon_get_i2c_prescale()
299 selected_sclk = rdev->pm.current_sclk; in rs690_crtc_bandwidth_compute()
983 selected_sclk = rdev->pm.current_sclk; in rv515_crtc_bandwidth_compute()
758 u32 sclk = rdev->pm.current_sclk; in radeon_update_bandwidth_info()
2192 wm_high.sclk = rdev->pm.current_sclk * 10; in evergreen_program_watermarks()2219 wm_low.sclk = rdev->pm.current_sclk * 10; in evergreen_program_watermarks()
2343 wm_high.sclk = rdev->pm.current_sclk * 10; in dce6_program_watermarks()2370 wm_low.sclk = rdev->pm.current_sclk * 10; in dce6_program_watermarks()
1663 u32 current_sclk; member
9339 wm_high.sclk = rdev->pm.current_sclk * 10; in dce8_program_watermarks()9379 wm_low.sclk = rdev->pm.current_sclk * 10; in dce8_program_watermarks()
425 u32 current_sclk; member
369 adev->pm.current_sclk = adev->clock.default_sclk; in amdgpu_atomfirmware_get_clock_info()
992 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v8_0_program_watermarks()1031 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v8_0_program_watermarks()
864 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v6_0_program_watermarks()891 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v6_0_program_watermarks()
1057 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v10_0_program_watermarks()1096 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v10_0_program_watermarks()
1083 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v11_0_program_watermarks()1122 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v11_0_program_watermarks()
709 adev->pm.current_sclk = adev->clock.default_sclk; in amdgpu_atombios_get_clock_info()
3021 adev->pm.current_sclk = adev->clock.default_sclk; in kv_dpm_sw_init()
7714 adev->pm.current_sclk = adev->clock.default_sclk; in si_dpm_sw_init()