| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_nbio.c | 57 r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0); in amdgpu_nbio_ras_late_init()
60 r = amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0); in amdgpu_nbio_ras_late_init()
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| H A D | amdgpu_mxgpu_ai.c | 361 r = amdgpu_irq_get(adev, &adev->virt.rcv_irq, 0); in xgpu_ai_mailbox_get_irq()
364 r = amdgpu_irq_get(adev, &adev->virt.ack_irq, 0); in xgpu_ai_mailbox_get_irq()
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| H A D | amdgpu_mxgpu_nv.c | 363 r = amdgpu_irq_get(adev, &adev->virt.rcv_irq, 0); in xgpu_nv_mailbox_get_irq()
366 r = amdgpu_irq_get(adev, &adev->virt.ack_irq, 0); in xgpu_nv_mailbox_get_irq()
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| H A D | amdgpu_irq.h | 116 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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| H A D | amdgpu_mxgpu_vi.c | 604 r = amdgpu_irq_get(adev, &adev->virt.rcv_irq, 0); in xgpu_vi_mailbox_get_irq()
607 r = amdgpu_irq_get(adev, &adev->virt.ack_irq, 0); in xgpu_vi_mailbox_get_irq()
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| H A D | amdgpu_umc.c | 60 r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0); in amdgpu_umc_ras_late_init()
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| H A D | amdgpu_sdma.c | 124 r = amdgpu_irq_get(adev, &adev->sdma.ecc_irq, in amdgpu_sdma_ras_late_init()
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| H A D | amdgpu_fence.c | 418 amdgpu_irq_get(adev, irq_src, irq_type); in amdgpu_fence_driver_start_ring()
609 amdgpu_irq_get(adev, ring->fence_drv.irq_src, in amdgpu_fence_driver_resume()
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| H A D | amdgpu_irq.c | 546 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src, in amdgpu_irq_get() function
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| H A D | amdgpu_gfx.c | 597 r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); in amdgpu_gfx_ras_late_init()
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| H A D | amdgpu_gmc_v10_0.c | 656 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v10_0_late_init()
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| H A D | amdgpu_gmc_v6_0.c | 817 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v6_0_late_init()
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| H A D | amdgpu_gmc_v9_0.c | 924 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v9_0_late_init()
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| H A D | amdgpu_gmc_v7_0.c | 975 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v7_0_late_init()
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| H A D | amdgpu_dce_v8_0.c | 166 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v8_0_pageflip_interrupt_init()
311 amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); in dce_v8_0_hpd_init()
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| H A D | amdgpu_kms.c | 1199 return amdgpu_irq_get(adev, &adev->crtc_irq, idx); in amdgpu_enable_vblank_kms()
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| H A D | amdgpu_gmc_v8_0.c | 1087 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v8_0_late_init()
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| H A D | amdgpu_kv_dpm.c | 1366 amdgpu_irq_get(adev, &adev->pm.dpm.thermal.irq, in kv_dpm_enable()
1368 amdgpu_irq_get(adev, &adev->pm.dpm.thermal.irq, in kv_dpm_enable()
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| H A D | amdgpu_dce_v6_0.c | 170 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v6_0_pageflip_interrupt_init()
317 amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); in dce_v6_0_hpd_init()
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| H A D | amdgpu_gfx_v8_0.c | 5300 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v8_0_late_init()
5304 r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); in gfx_v8_0_late_init()
5313 r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); in gfx_v8_0_late_init()
5319 r = amdgpu_irq_get(adev, &adev->gfx.sq_irq, 0); in gfx_v8_0_late_init()
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| H A D | amdgpu_dce_v10_0.c | 218 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v10_0_pageflip_interrupt_init()
375 amdgpu_irq_get(adev, &adev->hpd_irq, in dce_v10_0_hpd_init()
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| H A D | amdgpu_dce_v11_0.c | 236 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v11_0_pageflip_interrupt_init()
393 amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); in dce_v11_0_hpd_init()
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| H A D | amdgpu_gfx_v7_0.c | 4255 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v7_0_late_init()
4259 r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); in gfx_v7_0_late_init()
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| H A D | amdgpu_gfx_v10_0.c | 3993 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v10_0_late_init()
3997 r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); in gfx_v10_0_late_init()
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| H A D | amdgpu_gfx_v9_0.c | 4422 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v9_0_late_init()
4426 r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); in gfx_v9_0_late_init()
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