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Searched refs:v_dot4c_i32_i8 (Results 1 – 24 of 24) sorted by relevance

/llvm-project/llvm/test/MC/AMDGPU/
H A Dgfx1011_dlops.s47 v_dot4c_i32_i8 v5, v1, v2 label
50 v_dot4c_i32_i8 v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
53 v_dot4c_i32_i8 v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 fi:1 label
56 v_dot4c_i32_i8 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] label
59 v_dot4c_i32_i8 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 label
H A Dxdl-insts-err.s25 v_dot4c_i32_i8 v0, v1, v2 label
H A Dgfx12_err.s25 v_dot4c_i32_i8 v0, v1, v2
39 v_dot4c_i32_i8 v0, v1, v2 global() label
H A Dgfx11_asm_err.s78 v_dot4c_i32_i8 v0, v1, v2
92 v_dot4c_i32_i8 v0, v1, v2 global() label
H A Dxdl-insts-gfx908.s240 v_dot4c_i32_i8 v5, v1, v2 label
243 v_dot4c_i32_i8 v255, v1, v2 label
H A Dgfx9_unsupported.s673 v_dot4c_i32_i8 v0, v1, v2 label
H A Dgfx8_unsupported.s1276 v_dot4c_i32_i8 v0, v1, v2 label
H A Dgfx11_unsupported.s1192 v_dot4c_i32_i8 v0, v1, v2
1189 v_dot4c_i32_i8 v0, v1, v2 global() label
H A Dgfx10_unsupported.s1913 v_dot4c_i32_i8 v0, v1, v2
1910 v_dot4c_i32_i8 v0, v1, v2 global() label
H A Dgfx7_unsupported.s1645 v_dot4c_i32_i8 v0, v1, v2 label
/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.sdot4.ll16 ; GFX10-NEXT: v_dot4c_i32_i8 v2, v0, v1
81 ; GFX10-NEXT: v_dot4c_i32_i8 v8, v0, v1
102 ; GFX10-NEXT: v_dot4c_i32_i8 v2, v0, v1
123 ; GFX10-NEXT: v_dot4c_i32_i8 v2, v0, v1
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.sdot4.ll32 ; GFX10: v_dot4c_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
H A Didot4s.ll132 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v0, v1, v2
341 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v4, v2, v3
717 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v0, v1, v2
915 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v0, v1, v2
1347 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v2, v1, v0
1527 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v2, v1, v0
1714 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v2, v1, v0
1887 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v0, v1, v2
2086 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v1, v3, v0
2291 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v
[all...]
H A Didot2.ll2896 ; GFX10-DL-NEXT: v_dot4c_i32_i8 v2, v1, v0
/llvm-project/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX1011.rst64 …v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid…
H A DAMDGPUAsmGFX908.rst67 …v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gf…
H A DAMDGPUAsmGFX90a.rst1005 …v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_…
H A DAMDGPUAsmGFX940.rst1001 …v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx940_vdst_89680f>`, :ref:`src0<amdgpu_synid_…
H A DAMDGPUAsmGFX1030.rst1361 …v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`…
/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
H A Dgfx1011_dlops.txt47 # GFX10: v_dot4c_i32_i8 v5, v1, v2
H A Dgfx1011-xdl-insts.txt88 # CHECK: v_dot4c_i32_i8 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x1a]
91 # CHECK: v_dot4c_i32_i8 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x1b]
/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPU.td740 "Has v_dot4c_i32_i8 instruction"
H A DVOP2Instructions.td1207 defm V_DOT4C_I32_I8 : VOP2Inst<"v_dot4c_i32_i8", VOP_DOT_ACC_I32_I32>;
/llvm-project/llvm/docs/
H A DAMDGPUUsage.rst601 - ``v_dot4c_i32_i8``
1302 into v_dot4c_i32_i8 for targets which support it.
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