1// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GFX12-ERR --implicit-check-not=error: -strict-whitespace %s 2 3v_cubesc_f32_e64_dpp v5, v1, v2, 12345678 row_shr:4 row_mask:0xf bank_mask:0xf 4// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 5 6v_add3_u32_e64_dpp v5, v1, v2, 49812340 dpp8:[7,6,5,4,3,2,1,0] 7// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 8 9v_cvt_f32_i32_e64_dpp v5, s1 dpp8:[7,6,5,4,3,2,1,0] 10// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 11 12v_cvt_f32_i32_e64_dpp v5, s1 row_shl:15 row_mask:0xf bank_mask:0xf 13// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 14 15v_cvt_f16_u16_e64_dpp v5, s1 dpp8:[7,6,5,4,3,2,1,0] 16// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 17 18v_cvt_f16_u16_e64_dpp v5, s1 row_shl:1 row_mask:0xf bank_mask:0xf 19// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 20 21; disallow space between colons 22v_dual_mul_f32 v0, v0, v2 : : v_dual_mul_f32 v1, v1, v3 23// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: unknown token in expression 24 25v_dot4c_i32_i8 v0, v1, v2 26// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU 27 28v_cmp_class_f16_e64_dpp s105, s2, v2 row_ror:15 29// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 30 31v_cmpx_class_f32_e64_dpp s1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 32// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 33 34v_fma_mix_f32_e64_dpp v5, s1, v3, v4 quad_perm:[3,2,1,0] 35// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 36 37v_fma_mix_f32_e64_dpp v5, v1, s3, v4 quad_perm:[3,2,1,0] 38// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 39 40v_fma_mix_f32_e64_dpp v5, s1, v3, v4 dpp8:[7,6,5,4,3,2,1,0] 41// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 42 43v_fma_mix_f32_e64_dpp v5, v1, s3, v4 dpp8:[7,6,5,4,3,2,1,0] 44// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 45 46v_fma_mixhi_f16_e64_dpp v5, v1, 0, v4 quad_perm:[3,2,1,0] 47// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 48 49v_fma_mixlo_f16_e64_dpp v5, v1, 1, v4 dpp8:[7,6,5,4,3,2,1,0] 50// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 51 52v_lshlrev_b64 v[5:6], s2, s[0:1] 53// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions) 54 55v_lshrrev_b64 v[5:6], s2, s[0:1] 56// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions) 57 58v_ashrrev_i64 v[5:6], s2, s[0:1] 59// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions) 60 61image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:0x7 62// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: expected an identifier 63 64image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_STORE_NT 65// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value for load instructions 66 67image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT 68// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value for load instructions 69 70image_store v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_LOAD_NT 71// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value for store instructions 72 73image_store v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_ATOMIC_NT 74// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value for store instructions 75 76image_atomic_swap v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_LOAD_NT 77// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value for atomic instructions 78 79image_atomic_swap v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_STORE_NT 80// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value for atomic instructions 81 82image_store v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_STORE_LU 83// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value 84 85image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_LOAD_RT_WB 86// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value 87 88image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_LOAD_NT_WB 89// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid th value 90 91image_store v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_STORE_RT_WB scope:SCOPE_SYS 92// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: scope and th combination is not valid 93 94image_store v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_STORE_BYPASS scope:SCOPE_DEV 95// GFX12-ERR: [[@LINE-1]]:{{[0-9]+}}: error: scope and th combination is not valid 96 97s_load_b32 s5, s[4:5], s0 offset:0x0 th:TH_LOAD_NT_RT 98// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid th value for SMEM instruction 99 100s_buffer_load_b64 s[10:11], s[4:7], s0 offset:0x0 th:TH_LOAD_RT_NT 101// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid th value for SMEM instruction 102 103s_load_b128 s[20:23], s[2:3], vcc_lo th:TH_LOAD_NT_HT 104// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid th value for SMEM instruction 105 106image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D th:TH_LOAD_HT scope:SCOPE_SE th:TH_LOAD_HT 107// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 108 109image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D scope:SCOPE_SE th:TH_LOAD_HT scope:SCOPE_SE 110// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction 111 112s_prefetch_inst s[14:15], 0xffffff, m0, 7 113// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: expected a 24-bit signed offset 114// GFX12-ERR: s_prefetch_inst s[14:15], 0xffffff, m0, 7 115// GFX12-ERR: ^ 116 117s_endpgm_ordered_ps_done 118// GFX12-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU 119