| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsMCInstLower.cpp | 133 Symbol = MO.getMBB()->getSymbol(); in LowerSymbolOperand()
251 MCSymbolRefExpr::create(MI->getOperand(1).getMBB()->getSymbol(), *Ctx); in lowerLongBranchADDiu()
256 OutMI.addOperand(createSub(MI->getOperand(1).getMBB(), in lowerLongBranchADDiu()
257 MI->getOperand(2).getMBB(), Kind)); in lowerLongBranchADDiu()
293 MCSymbolRefExpr::create(MI->getOperand(2).getMBB()->getSymbol(), *Ctx); in lowerLongBranch()
298 OutMI.addOperand(createSub(MI->getOperand(2).getMBB(), in lowerLongBranch()
299 MI->getOperand(3).getMBB(), Kind)); in lowerLongBranch()
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| /llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.cpp | 106 TBB = LastInst.getOperand(0).getMBB(); in analyzeBranch()
110 TBB = LastInst.getOperand(1).getMBB(); in analyzeBranch()
128 TBB = SecondLastInst.getOperand(1).getMBB(); in analyzeBranch()
130 FBB = LastInst.getOperand(0).getMBB(); in analyzeBranch()
138 TBB = SecondLastInst.getOperand(0).getMBB(); in analyzeBranch()
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| /llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.cpp | 295 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
306 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) { in analyzeBranch()
315 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
327 MachineBasicBlock *TargetBB = I->getOperand(0).getMBB(); in analyzeBranch()
352 .addMBB(UnCondBrIter->getOperand(0).getMBB()); in analyzeBranch()
366 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
378 if (TBB != I->getOperand(0).getMBB()) { in analyzeBranch()
519 return MI.getOperand(0).getMBB(); in getBranchDestBlock()
522 return MI.getOperand(1).getMBB(); in getBranchDestBlock()
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCEarlyReturn.cpp | 67 if (J->getOperand(0).getMBB() == &ReturnMBB) { in processBlock()
80 if (J->getOperand(2).getMBB() == &ReturnMBB) { in processBlock()
97 if (J->getOperand(1).getMBB() == &ReturnMBB) { in processBlock()
120 J->getOperand(i).getMBB() == &ReturnMBB) in processBlock()
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| H A D | PPCCTRLoops.cpp | 340 assert(ML->contains(BrInstr->getOperand(1).getMBB()) && in expandCTRLoops()
345 assert(!ML->contains(BrInstr->getOperand(1).getMBB()) && in expandCTRLoops()
354 .addMBB(BrInstr->getOperand(1).getMBB()); in expandCTRLoops()
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| H A D | PPCBranchSelector.cpp | 329 Dest = I->getOperand(2).getMBB(); in runOnMachineFunction()
332 Dest = I->getOperand(1).getMBB(); in runOnMachineFunction()
336 Dest = I->getOperand(0).getMBB(); in runOnMachineFunction()
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| H A D | PPCPreEmitPeephole.cpp | 554 MBB.removeSuccessor(Br->getOperand(1).getMBB()); in runOnMachineFunction()
565 if (!MBB.isLayoutSuccessor(Br->getOperand(1).getMBB())) { in runOnMachineFunction()
567 TII->insertBranch(MBB, Br->getOperand(1).getMBB(), nullptr, in runOnMachineFunction()
571 if (Succ != Br->getOperand(1).getMBB()) { in runOnMachineFunction()
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| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.cpp | 114 TBB = MI.getOperand(0).getMBB(); in analyzeBranch()
122 TBB = MI.getOperand(0).getMBB(); in analyzeBranch()
127 TBB = MI.getOperand(0).getMBB(); in analyzeBranch()
129 FBB = MI.getOperand(0).getMBB(); in analyzeBranch()
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| H A D | WebAssemblyFixIrreducibleControlFlow.cpp | 466 if (Op.isMBB() && Indices.count(Op.getMBB())) in makeSingleEntryLoop()
467 Op.setMBB(Map[{Op.getMBB(), PredInLoop}]); in makeSingleEntryLoop()
480 .getMBB()); in makeSingleEntryLoop()
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| /llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 190 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
200 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) { in analyzeBranch()
208 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
222 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
234 if (TBB != I->getOperand(0).getMBB()) in analyzeBranch()
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| /llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.cpp | 204 TBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
215 TBB = LastInst->getOperand(1).getMBB(); in analyzeBranch()
236 TBB = SecondLastInst->getOperand(1).getMBB(); in analyzeBranch()
240 FBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
248 TBB = SecondLastInst->getOperand(0).getMBB(); in analyzeBranch()
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| /llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.cpp | |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | MVETPAndVPTOptimisationsPass.cpp | 123 if (T.getOpcode() == ARM::t2LoopEnd && T.getOperand(1).getMBB() == Header) { in findLoopComponents()
128 T.getOperand(2).getMBB() == Header) { in findLoopComponents()
164 (LoopPhi->getOperand(2).getMBB() != Latch && in findLoopComponents()
165 LoopPhi->getOperand(4).getMBB() != Latch)) { in findLoopComponents()
171 Register StartReg = LoopPhi->getOperand(2).getMBB() == Latch in findLoopComponents()
398 if (LoopPhi->getOperand(2).getMBB() == ML->getLoopLatch()) { in MergeLoopEnd()
495 (Phi->getOperand(2).getMBB() != ML->getLoopLatch() && in ConvertTailPredLoop()
496 Phi->getOperand(4).getMBB() != ML->getLoopLatch())) { in ConvertTailPredLoop()
500 CountReg = Phi->getOperand(2).getMBB() == ML->getLoopLatch() in ConvertTailPredLoop()
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeVGPRLiveRange.cpp | 187 return BR.getOperand(2).getMBB(); in collectElseRegionBlocks()
280 auto *Pred = MI.getOperand(Idx + 1).getMBB(); in collectCandidateRegisters()
320 auto *IncomingMBB = UseMI->getOperand(I.getOperandNo() + 1).getMBB(); in collectCandidateRegisters()
440 PHIIncoming.insert(UseMI->getOperand(I.getOperandNo() + 1).getMBB()); in updateLiveRangeInThenRegion()
685 MachineBasicBlock *IfTarget = MI.getOperand(2).getMBB(); in runOnMachineFunction()
713 auto *LoopHeader = MI.getOperand(0).getMBB();
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| /llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 192 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
202 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) { in analyzeBranch()
210 TBB = I->getOperand(0).getMBB(); in analyzeBranch()
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| H A D | BPFMIPeephole.cpp | 468 JmpBB = UncondJmp->getOperand(0).getMBB(); in adjustBranch()
484 CondTargetBB = CondJmp->getOperand(2).getMBB(); in adjustBranch()
544 CondTargetBB = CondJmp->getOperand(2).getMBB(); in adjustBranch()
545 JmpBB = UncondJmp->getOperand(0).getMBB(); in adjustBranch()
721 if (!MO.isMBB() || MO.getMBB() != Prev_MBB)
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineSSAUpdater.cpp | 98 MachineBasicBlock *SrcBB = I->getOperand(i+1).getMBB(); in LookForIdenticalPHI()
221 return MI->getOperand(i+1).getMBB(); in findCorrespondingPred()
292 return PHI->getOperand(idx+1).getMBB(); in getIncomingBlock()
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| H A D | UnreachableBlockElim.cpp | 130 Phi.getOperand(i).getMBB() == &BB) { in runOnMachineFunction()
159 if (!preds.count(Phi.getOperand(i).getMBB())) { in runOnMachineFunction()
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| /llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCBranchFinalize.cpp | 120 .addMBB(MI->getOperand(0).getMBB()) in replaceWithBRcc()
138 .addMBB(MI->getOperand(0).getMBB()) in replaceWithCmpBcc()
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCFGOptimizer.cpp | 176 CondBranchTarget = MI.getOperand(1).getMBB(); in runOnMachineFunction()
189 LayoutSucc->front().getOperand(0).getMBB(); in runOnMachineFunction()
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| H A D | HexagonEarlyIfConv.cpp | 259 MachineBasicBlock *T1B = T1I->getOperand(1).getMBB(); in matchFlowPattern()
264 : T2I->getOperand(0).getMBB(); in matchFlowPattern()
464 const MachineBasicBlock *BB = MI.getOperand(i+1).getMBB(); in computePhiCost()
739 MachineBasicBlock *TB = MI->getOperand(0).getMBB(); in predicateInstr()
819 if (BO.getMBB() == FP.SplitB) in updatePhiNodes()
821 else if (BO.getMBB() == FP.TrueB) in updatePhiNodes()
823 else if (BO.getMBB() == FP.FalseB) in updatePhiNodes()
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| /llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.cpp | 207 Target = LastInst->getOperand(0).getMBB(); in parseCondBranch()
238 return MI.getOperand(0).getMBB(); in getBranchDestBlock()
261 TBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
285 TBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
301 FBB = LastInst->getOperand(0).getMBB(); in analyzeBranch()
308 TBB = SecondLastInst->getOperand(0).getMBB(); in analyzeBranch()
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RedundantCopyElimination.cpp | 131 MBB == CondBr.getOperand(1).getMBB()) || in knownRegValInBlock()
133 MBB != CondBr.getOperand(1).getMBB())) { in knownRegValInBlock()
148 MachineBasicBlock *BrTarget = CondBr.getOperand(1).getMBB(); in knownRegValInBlock()
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEMIRBuilder.cpp | 25 auto MBBEnd = getMBB().end(); in dominates()
42 MachineBasicBlock *CurMBB = &getMBB(); in getDominatingInstrForID()
114 B.addNodeIDMBB(&getMBB()); in profileEverything()
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| H A D | IRTranslator.cpp | 288 MachineBasicBlock &IRTranslator::getMBB(const BasicBlock &BB) {
289 MachineBasicBlock *MBB = FuncInfo.getMBB(&BB); in getMBB() function in IRTranslator
389 &RI, &MIRBuilder.getMBB(), SwiftError.getFunctionArg()); in emitBranchForMergedCondition()
594 auto &CurMBB = MIRBuilder.getMBB(); in translateBr()
595 auto *Succ0MBB = &getMBB(*BrInst.getSuccessor(0)); in translateBr()
605 CurMBB.addSuccessor(&getMBB(*Succ)); in translateBr()
612 MachineBasicBlock *Succ1MBB = &getMBB(*BrInst.getSuccessor(1)); in translateBr()
714 MachineBasicBlock *Succ = &getMBB(*I.getCaseSuccessor()); in translateSwitch()
723 MachineBasicBlock *DefaultMBB = &getMBB(*SI.getDefaultDest()); in translateSwitch()
730 MachineBasicBlock *SwitchMBB = &getMBB(*S in translateSwitch()
[all...] |