Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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f71cb9db |
| 14-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[PowerPC] Remove unused includes (NFC) (#116163)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
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79d0de2a |
| 09-Jul-2024 |
paperchalice <liujunchang97@outlook.com> |
[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)
- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.
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Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5 |
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f6d431f2 |
| 24-Apr-2024 |
Xu Zhang <simonzgx@gmail.com> |
[CodeGen] Make the parameter TRI required in some functions. (#85968)
Fixes #82659
There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many
[CodeGen] Make the parameter TRI required in some functions. (#85968)
Fixes #82659
There are some functions, such as `findRegisterDefOperandIdx` and `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI parameters, as shown in issue #82411.
Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`, `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.
After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.
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Revision tags: llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7 |
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aee1aded |
| 19-Dec-2022 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC][NFC] add explicit check for ctr loop pseudo expansion.
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dff82271 |
| 02-Dec-2022 |
Chen Zheng <czhengsz@cn.ibm.com> |
Revert "[PowerPC] handle more than two predecessors loop header in ctrloop pass"
This reverts commit df9d60af1f9fa44f411b656bbc691d950c6fc087.
The CTRLoops pass is reordered to front of tail duplic
Revert "[PowerPC] handle more than two predecessors loop header in ctrloop pass"
This reverts commit df9d60af1f9fa44f411b656bbc691d950c6fc087.
The CTRLoops pass is reordered to front of tail duplication pass in D138265.
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Revision tags: llvmorg-15.0.6 |
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f034c98a |
| 17-Nov-2022 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] mark dead def for ctr be clobber.
TLS pseudo ADDIStlsgdHA will have such def. This dead def should also prevent PPC from generating CTR loops.
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Revision tags: llvmorg-15.0.5 |
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7c2b76f7 |
| 07-Nov-2022 |
Kazu Hirata <kazu@google.com> |
[PowerPC] Use llvm::is_contained (NFC)
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Revision tags: llvmorg-15.0.4, llvmorg-15.0.3 |
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df9d60af |
| 13-Oct-2022 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] handle more than two predecessors loop header in ctrloop pass
After ISEL, the "valid" loop header which has two predecessors (one is preheader and the other one is latch) may be transforme
[PowerPC] handle more than two predecessors loop header in ctrloop pass
After ISEL, the "valid" loop header which has two predecessors (one is preheader and the other one is latch) may be transformed to have more than two predecessors by some optimizations, like tail duplicator, if the old header's successor(will be changed to new header) is a sub loop.
The predecessors of the new loop header are preheader, loop latch and the loop latch(es) of the sub loop(old header's successor).
Before the patch, ctrloop pass assumes two predecessors for candidate loop header. This patch fixes this case.
Reviewed By: lkail
Differential Revision: https://reviews.llvm.org/D135846
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Revision tags: working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0 |
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fedc5973 |
| 03-Sep-2022 |
Kazu Hirata <kazu@google.com> |
[llvm] Use range-based for loops (NFC)
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2833760c |
| 29-Aug-2022 |
Kazu Hirata <kazu@google.com> |
[Target] Qualify auto in range-based for loops (NFC)
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Revision tags: llvmorg-15.0.0-rc3 |
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22e475f5 |
| 09-Aug-2022 |
Chen Zheng <czhengsz@cn.ibm.com> |
[NFC] fix warning
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Revision tags: llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
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d9004dfb |
| 08-Apr-2022 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] mapping hardward loop intrinsics to powerpc pseudo
Map hardware loop intrinsics loop_decrement and set_loop_iteration to the new PowerPC pseudo instructions, so that the hardware loop intr
[PowerPC] mapping hardward loop intrinsics to powerpc pseudo
Map hardware loop intrinsics loop_decrement and set_loop_iteration to the new PowerPC pseudo instructions, so that the hardware loop intrinsics will be expanded to normal cmp+branch form or ctrloop form based on the CTR register usage on MIR level.
Reviewed By: lkail
Differential Revision: https://reviews.llvm.org/D123366
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9cfbe7bb |
| 21-Jun-2022 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC][ctrloop] handles calls in preheader before MTCTRloop
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a71fe49b |
| 08-Apr-2022 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] add a new pass to expand ctr loop pseudos
This patch implements a new way to generate the CTR loops. Now the intrinsics inserted in hardware loop pass will be mapped to pseudo instructions
[PowerPC] add a new pass to expand ctr loop pseudos
This patch implements a new way to generate the CTR loops. Now the intrinsics inserted in hardware loop pass will be mapped to pseudo instructions and these pseudo instructions will be expanded to CTR loop or normal compare+branch loop in this post ISEL pass.
Reviewed By: lkail
Differential Revision: https://reviews.llvm.org/D122125
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
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ff649e08 |
| 27-Nov-2021 |
Kazu Hirata <kazu@google.com> |
[Target] Use range-based for loops (NFC)
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Revision tags: llvmorg-13.0.1-rc1 |
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d5b73a70 |
| 23-Nov-2021 |
Kazu Hirata <kazu@google.com> |
[llvm] Use range-based for loops (NFC)
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init |
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05444417 |
| 24-Jan-2021 |
Kazu Hirata <kazu@google.com> |
[Target] Use llvm::append_range (NFC)
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e4847a7f |
| 23-Jan-2021 |
Kazu Hirata <kazu@google.com> |
Revert "[Target] Use llvm::append_range (NFC)"
This reverts commit cc7a23828657f35f706343982cf96bb6583d4d73.
The X86WinEHState.cpp hunk seems to break certain builds.
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cc7a2382 |
| 23-Jan-2021 |
Kazu Hirata <kazu@google.com> |
[Target] Use llvm::append_range (NFC)
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Revision tags: llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2 |
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ab6cb316 |
| 17-Dec-2020 |
Jinsong Ji <jji@us.ibm.com> |
[PowerPC][NFC] Cleanup PPCCTRLoopsVerify pass
The PPCCTRLoop pass has been moved to HardwareLoops, so the comments and some useless code are deprecated now.
Reviewed By: #powerpc, nemanjai
Differe
[PowerPC][NFC] Cleanup PPCCTRLoopsVerify pass
The PPCCTRLoop pass has been moved to HardwareLoops, so the comments and some useless code are deprecated now.
Reviewed By: #powerpc, nemanjai
Differential Revision: https://reviews.llvm.org/D93336
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Revision tags: llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1 |
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a3982491 |
| 26-Apr-2020 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly
Both PassSupport.h and PassAnalysisSupport.h are only supposed to be included via Pass.h.
Differential Revision: https
[Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly
Both PassSupport.h and PassAnalysisSupport.h are only supposed to be included via Pass.h.
Differential Revision: https://reviews.llvm.org/D78815
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Revision tags: llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2, llvmorg-10.0.0-rc1, llvmorg-11-init |
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99f74a64 |
| 04-Jan-2020 |
Florian Hahn <flo@fhahn.com> |
[SCEV] Remove unused ScalarEvolutionExpander.h includes (NFC).
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Revision tags: llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1 |
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05da2fe5 |
| 13-Nov-2019 |
Reid Kleckner <rnk@google.com> |
Sink all InitializePasses.h includes
This file lists every pass in LLVM, and is included by Pass.h, which is very popular. Every time we add, remove, or rename a pass in LLVM, it caused lots of reco
Sink all InitializePasses.h includes
This file lists every pass in LLVM, and is included by Pass.h, which is very popular. Every time we add, remove, or rename a pass in LLVM, it caused lots of recompilation.
I found this fact by looking at this table, which is sorted by the number of times a file was changed over the last 100,000 git commits multiplied by the number of object files that depend on it in the current checkout: recompiles touches affected_files header 342380 95 3604 llvm/include/llvm/ADT/STLExtras.h 314730 234 1345 llvm/include/llvm/InitializePasses.h 307036 118 2602 llvm/include/llvm/ADT/APInt.h 213049 59 3611 llvm/include/llvm/Support/MathExtras.h 170422 47 3626 llvm/include/llvm/Support/Compiler.h 162225 45 3605 llvm/include/llvm/ADT/Optional.h 158319 63 2513 llvm/include/llvm/ADT/Triple.h 140322 39 3598 llvm/include/llvm/ADT/StringRef.h 137647 59 2333 llvm/include/llvm/Support/Error.h 131619 73 1803 llvm/include/llvm/Support/FileSystem.h
Before this change, touching InitializePasses.h would cause 1345 files to recompile. After this change, touching it only causes 550 compiles in an incremental rebuild.
Reviewers: bkramer, asbirlea, bollu, jdoerfert
Differential Revision: https://reviews.llvm.org/D70211
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Revision tags: llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2, llvmorg-9.0.0-rc1, llvmorg-10-init, llvmorg-8.0.1, llvmorg-8.0.1-rc4, llvmorg-8.0.1-rc3, llvmorg-8.0.1-rc2 |
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c5ef502e |
| 07-Jun-2019 |
Sam Parker <sam.parker@arm.com> |
[CodeGen] Generic Hardware Loop Support Patch which introduces a target-independent framework for generating hardware loops at the IR level. Most of the code has been taken from PowerPC CTRLoops
[CodeGen] Generic Hardware Loop Support Patch which introduces a target-independent framework for generating hardware loops at the IR level. Most of the code has been taken from PowerPC CTRLoops and PowerPC has been ported over to use this generic pass. The target dependent parts have been moved into TargetTransformInfo, via isHardwareLoopProfitable, with HardwareLoopInfo introduced to transfer information from the backend. Three generic intrinsics have been introduced: - void @llvm.set_loop_iterations Takes as a single operand, the number of iterations to be executed. - i1 @llvm.loop_decrement(anyint) Takes the maximum number of elements processed in an iteration of the loop body and subtracts this from the total count. Returns false when the loop should exit. - anyint @llvm.loop_decrement_reg(anyint, anyint) Takes the number of elements remaining to be processed as well as the maximum numbe of elements processed in an iteration of the loop body. Returns the updated number of elements remaining.
llvm-svn: 362774
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Revision tags: llvmorg-8.0.1-rc1 |
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f31eba64 |
| 08-May-2019 |
Alina Sbirlea <asbirlea@google.com> |
[MemorySSA] Teach LoopSimplify to preserve MemorySSA.
Summary: Preserve MemorySSA in LoopSimplify, in the old pass manager, if the analysis is available. Do not preserve it in the new pass manager.
[MemorySSA] Teach LoopSimplify to preserve MemorySSA.
Summary: Preserve MemorySSA in LoopSimplify, in the old pass manager, if the analysis is available. Do not preserve it in the new pass manager. Update tests.
Subscribers: nemanjai, jlebar, javed.absar, Prazek, kbarton, zzheng, jsji, llvm-commits, george.burgess.iv, chandlerc
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60833
llvm-svn: 360270
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