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/llvm-project/llvm/test/MC/AMDGPU/
H A Dflat-scratch-gfx940.s4 scratch_load_dword a2, v4, s6
5 // GFX940: scratch_load_dword a2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02]
7 scratch_load_dword a2, v4, s6 offset:16
8 // GFX940: scratch_load_dword a2, v4, s6 offset:16 ; encoding: [0x10,0x60,0x50,0xdc,0x04,0x00,0x86,0x02]
16 scratch_load_dword a2, off, s6
17 // GFX940: scratch_load_dword a2, off, s6 ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x86,0x02]
19 scratch_load_dword a2, off, s6 offset:16
20 // GFX940: scratch_load_dword a2, off, s6 offset:16 ; encoding: [0x10,0x40,0x50,0xdc,0x00,0x00,0x86,0x02]
28 scratch_load_dword v2, v4, s6
29 // GFX940: scratch_load_dword v2, v4, s6 ; encodin
[all...]
H A Dsop2.s51 s_and_b32 s2, s4, s6
52 // SICI: s_and_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x87]
53 // GFX89: s_and_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x86]
54 // GFX10: s_and_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x87]
76 s_or_b32 s2, s4, s6
77 // SICI: s_or_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x88]
78 // GFX89: s_or_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x87]
79 // GFX10: s_or_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x88]
86 s_xor_b32 s2, s4, s6
87 // SICI: s_xor_b32 s2, s4, s6 ; encodin
[all...]
/llvm-project/llvm/test/CodeGen/Thumb2/
H A Dmve-vcmpfr.ll560 ; CHECK-MVE-NEXT: vmovx.f16 s6, s0
562 ; CHECK-MVE-NEXT: vcmp.f16 s6, s4
563 ; CHECK-MVE-NEXT: vmovx.f16 s6, s8
568 ; CHECK-MVE-NEXT: vseleq.f16 s6, s5, s6
574 ; CHECK-MVE-NEXT: vins.f16 s0, s6
575 ; CHECK-MVE-NEXT: vmovx.f16 s6, s1
576 ; CHECK-MVE-NEXT: vcmp.f16 s6, s4
577 ; CHECK-MVE-NEXT: vmovx.f16 s6, s9
582 ; CHECK-MVE-NEXT: vseleq.f16 s6, s
[all...]
/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.image.atomic.dim.ll17 ; GFX6-NEXT: s_mov_b32 s4, s6
19 ; GFX6-NEXT: s_mov_b32 s6, s8
31 ; GFX8-NEXT: s_mov_b32 s4, s6
33 ; GFX8-NEXT: s_mov_b32 s6, s8
45 ; GFX900-NEXT: s_mov_b32 s4, s6
47 ; GFX900-NEXT: s_mov_b32 s6, s8
59 ; GFX90A-NEXT: s_mov_b32 s4, s6
61 ; GFX90A-NEXT: s_mov_b32 s6, s8
74 ; GFX10PLUS-NEXT: s_mov_b32 s4, s6
76 ; GFX10PLUS-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.store.2d.ll15 ; GFX6-NEXT: s_mov_b32 s4, s6
17 ; GFX6-NEXT: s_mov_b32 s6, s8
28 ; GFX8-NEXT: s_mov_b32 s4, s6
30 ; GFX8-NEXT: s_mov_b32 s6, s8
41 ; GFX10-NEXT: s_mov_b32 s4, s6
43 ; GFX10-NEXT: s_mov_b32 s6, s8
54 ; GFX11-NEXT: s_mov_b32 s4, s6
56 ; GFX11-NEXT: s_mov_b32 s6, s8
67 ; GFX12-NEXT: s_mov_b32 s4, s6
69 ; GFX12-NEXT: s_mov_b32 s6, s
[all...]
H A Dllvm.amdgcn.image.load.1d.ll16 ; GFX68-NEXT: s_mov_b32 s4, s6
18 ; GFX68-NEXT: s_mov_b32 s6, s8
30 ; GFX10-NEXT: s_mov_b32 s4, s6
32 ; GFX10-NEXT: s_mov_b32 s6, s8
44 ; NOPRT-NEXT: s_mov_b32 s4, s6
46 ; NOPRT-NEXT: s_mov_b32 s6, s8
58 ; GFX12-NEXT: s_mov_b32 s4, s6
60 ; GFX12-NEXT: s_mov_b32 s6, s8
76 ; GFX68-NEXT: s_mov_b32 s4, s6
78 ; GFX68-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.load.1d.d16.ll16 ; GFX8-UNPACKED-NEXT: s_mov_b32 s4, s6
18 ; GFX8-UNPACKED-NEXT: s_mov_b32 s6, s8
30 ; GFX8-PACKED-NEXT: s_mov_b32 s4, s6
32 ; GFX8-PACKED-NEXT: s_mov_b32 s6, s8
44 ; GFX9-NEXT: s_mov_b32 s4, s6
46 ; GFX9-NEXT: s_mov_b32 s6, s8
58 ; GFX10PLUS-NEXT: s_mov_b32 s4, s6
60 ; GFX10PLUS-NEXT: s_mov_b32 s6, s8
72 ; GFX12-NEXT: s_mov_b32 s4, s6
74 ; GFX12-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.getresinfo.ll15 ; GFX6-NEXT: s_mov_b32 s4, s6
17 ; GFX6-NEXT: s_mov_b32 s6, s8
29 ; GFX8-NEXT: s_mov_b32 s4, s6
31 ; GFX8-NEXT: s_mov_b32 s6, s8
43 ; GFX10-NEXT: s_mov_b32 s4, s6
45 ; GFX10-NEXT: s_mov_b32 s6, s8
57 ; GFX12-NEXT: s_mov_b32 s4, s6
59 ; GFX12-NEXT: s_mov_b32 s6, s8
76 ; GFX6-NEXT: s_mov_b32 s4, s6
78 ; GFX6-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.atomic.dim.a16.ll14 ; GFX9-NEXT: s_mov_b32 s4, s6
16 ; GFX9-NEXT: s_mov_b32 s6, s8
28 ; GFX10-NEXT: s_mov_b32 s4, s6
30 ; GFX10-NEXT: s_mov_b32 s6, s8
42 ; GFX12-NEXT: s_mov_b32 s4, s6
44 ; GFX12-NEXT: s_mov_b32 s6, s8
62 ; GFX9-NEXT: s_mov_b32 s4, s6
64 ; GFX9-NEXT: s_mov_b32 s6, s8
76 ; GFX10-NEXT: s_mov_b32 s4, s6
78 ; GFX10-NEXT: s_mov_b32 s6, s
[all...]
H A Dllvm.amdgcn.image.getresinfo.a16.ll14 ; GFX9-NEXT: s_mov_b32 s4, s6
16 ; GFX9-NEXT: s_mov_b32 s6, s8
28 ; GFX10-NEXT: s_mov_b32 s4, s6
30 ; GFX10-NEXT: s_mov_b32 s6, s8
42 ; GFX12-NEXT: s_mov_b32 s4, s6
44 ; GFX12-NEXT: s_mov_b32 s6, s8
61 ; GFX9-NEXT: s_mov_b32 s4, s6
63 ; GFX9-NEXT: s_mov_b32 s6, s8
75 ; GFX10-NEXT: s_mov_b32 s4, s6
77 ; GFX10-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.gather4.dim.ll15 ; GFX6-NEXT: s_mov_b32 s4, s6
17 ; GFX6-NEXT: s_mov_b32 s6, s8
38 ; GFX10NSA-NEXT: s_mov_b32 s4, s6
40 ; GFX10NSA-NEXT: s_mov_b32 s6, s8
59 ; GFX12-NEXT: s_mov_b32 s4, s6
61 ; GFX12-NEXT: s_mov_b32 s6, s8
83 ; GFX6-NEXT: s_mov_b32 s4, s6
85 ; GFX6-NEXT: s_mov_b32 s6, s8
115 ; GFX10NSA-NEXT: s_mov_b32 s4, s6
117 ; GFX10NSA-NEXT: s_mov_b32 s6, s8
[all …]
H A Dstore-local.96.ll172 ; GFX10-NEXT: s_and_b32 s6, 0xffff, s2
179 ; GFX10-NEXT: s_lshr_b32 s0, s6, 8
216 ; GFX11-NEXT: s_and_b32 s6, 0xffff, s2
223 ; GFX11-NEXT: s_lshr_b32 s0, s6, 8
224 ; GFX11-NEXT: s_lshr_b32 s6, s1, 8
227 ; GFX11-NEXT: v_mov_b32_e32 v12, s6
/llvm-project/clang/test/SemaObjCXX/
H A Dnoescape.mm144 struct S6 {
145 S6(); struct
146 S6(const S6 &) = delete; // expected-note 11 {{'S6' has been explicitly marked deleted here}} argument
154 __block S6 b0;
155 __block S6 b1; // expected-error {{call to deleted constructor of 'S6'}} argument
156 __block S6 b2; // expected-error {{call to deleted constructor of 'S6'}}
147 deleteS6 global() argument
[all...]
/llvm-project/mlir/include/mlir/Dialect/Linalg/IR/
H A DLinalgNamedStructuredOps.yaml1416 shape_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6] -> (s0, s1, s2, s3, s4)>
1421 shape_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6] -> (s0, s5, s2, s6, s4)>
1426 shape_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6] -> (s0, s1, s5, s3, s6)>
1429 - affine_map<(d0, d1, d2, d3, d4, d5, d6)[s0, s1, s2, s3, s4, s5, s6] -> (d0,
1431 - affine_map<(d0, d1, d2, d3, d4, d5, d6)[s0, s1, s2, s3, s4, s5, s6] -> (d0,
1433 - affine_map<(d0, d1, d2, d3, d4, d5, d6)[s0, s1, s2, s3, s4, s5, s6] -> (d0,
2419 shape_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6] -> (s0, s1 * s2 + s3 * s4,
2425 shape_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6]
[all...]
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Didiv-licm.ll9 ; GFX9-NEXT: s_load_dword s6, s[4:5], 0x2c
14 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s6
15 ; GFX9-NEXT: s_sub_i32 s4, 0, s6
28 ; GFX9-NEXT: s_mul_i32 s9, s6, s5
29 ; GFX9-NEXT: s_mul_i32 s10, s6, s10
33 ; GFX9-NEXT: s_cmp_ge_u32 s9, s6
37 ; GFX9-NEXT: s_cmp_ge_u32 s9, s6
56 ; GFX10-NEXT: s_load_dword s6, s[4:5], 0x2c
60 ; GFX10-NEXT: v_cvt_f32_u32_e32 v0, s6
61 ; GFX10-NEXT: s_sub_i32 s2, 0, s6
[all...]
H A Dinsert-delay-alu-bug.ll
H A Dfptrunc.ll21 ; SI-NEXT: s_mov_b32 s6, -1
33 ; VI-SDAG-NEXT: s_mov_b32 s6, -1
107 ; SI-NEXT: s_or_b32 s4, s5, s6
113 ; SI-NEXT: s_sub_i32 s6, 0x3f1, s4
116 ; SI-NEXT: v_med3_i32 v0, s6, 0, 13
119 ; SI-NEXT: v_readfirstlane_b32 s6, v0
121 ; SI-NEXT: s_lshr_b32 s6, s5, s6
122 ; SI-NEXT: v_lshl_b32_e32 v0, s6, v0
126 ; SI-NEXT: s_or_b32 s5, s6, s
[all...]
H A Dselect-phi-s16-fp.ll20 ; CHECK-NEXT: s_mov_b32 s6, 0
21 ; CHECK-NEXT: s_mov_b32 s4, s6
22 ; CHECK-NEXT: s_mov_b32 s5, s6
47 ; CHECK-NEXT: s_mov_b32 s6, 0
48 ; CHECK-NEXT: s_mov_b32 s4, s6
49 ; CHECK-NEXT: s_mov_b32 s5, s6
56 ; CHECK-NEXT: s_mov_b32 s6, 0
57 ; CHECK-NEXT: s_mov_b32 s4, s6
58 ; CHECK-NEXT: s_mov_b32 s5, s6
81 ; CHECK-NEXT: s_mov_b32 s6, 0
[all …]
H A Dfpext.f16.ll13 ; SI-NEXT: s_mov_b32 s6, -1
14 ; SI-NEXT: s_mov_b32 s10, s6
31 ; GFX89-NEXT: s_mov_b32 s6, -1
32 ; GFX89-NEXT: s_mov_b32 s10, s6
48 ; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
50 ; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6
66 ; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1
68 ; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6
94 ; SI-NEXT: s_mov_b32 s6, -1
95 ; SI-NEXT: s_mov_b32 s10, s6
[all...]
H A Dlds-frame-extern.ll43 ; CHECK-NEXT: s_add_u32 s6, s6, llvm.amdgcn.dynlds.offset.table@rel32@lo+4
49 ; CHECK-NEXT: s_add_u32 s4, s4, s6
67 ; CHECK-NEXT: s_add_u32 s6, s6, llvm.amdgcn.dynlds.offset.table@rel32@lo+4
73 ; CHECK-NEXT: s_add_u32 s4, s4, s6
H A Datomic_optimizations_global_pointer.ll30 ; GFX7LESS-NEXT: v_mbcnt_lo_u32_b32_e64 v0, s6, 0
38 ; GFX7LESS-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
39 ; GFX7LESS-NEXT: s_mul_i32 s6, s6, 5
44 ; GFX7LESS-NEXT: v_mov_b32_e32 v1, s6
62 ; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
94 ; GFX9-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
127 ; GFX1064-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0
133 ; GFX1064-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
135 ; GFX1064-NEXT: s_mul_i32 s6, s
[all...]
/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
H A Dgfx10_vopc_sdwa.txt9 # W32: v_cmp_class_f32_sdwa s6, -v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x01,0x86,0x16,0x06]
13 # W32: v_cmp_class_f32_sdwa s6, exec_hi, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x7f,0x86,0x86,0x06]
17 # W32: v_cmp_class_f32_sdwa s6, exec_lo, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x7e,0x86,0x86,0x06]
21 # W32: v_cmp_class_f32_sdwa s6, m0, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x7c,0x86,0x86,0x06]
25 # W32: v_cmp_class_f32_sdwa s6, s1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x01,0x86,0x86,0x06]
29 # W32: v_cmp_class_f32_sdwa s6, s101, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x65,0x86,0x86,0x06]
33 # W32: v_cmp_class_f32_sdwa s6, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x01,0x86,0x06,0x0e]
37 # W32: v_cmp_class_f32_sdwa s6, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x01,0x86,0x00,0x06]
41 # W32: v_cmp_class_f32_sdwa s6, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x01,0x86,0x01,0x06]
45 # W32: v_cmp_class_f32_sdwa s6, v
[all...]
H A Dgfx940_flat.txt3 # GFX940: scratch_load_dword a2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02]
6 # GFX940: scratch_load_dword a2, v4, s6 offset:16 ; encoding: [0x10,0x60,0x50,0xdc,0x04,0x00,0x86,0…
15 # GFX940: scratch_load_dword a2, off, s6 ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x86,0x02]
18 # GFX940: scratch_load_dword a2, off, s6 offset:16 ; encoding: [0x10,0x40,0x50,0xdc,0x00,0x00,0x86,…
27 # GFX940: scratch_load_dword v2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x06,0x02]
30 # GFX940: scratch_load_dword v2, v4, s6 offset:16 ; encoding: [0x10,0x60,0x50,0xdc,0x04,0x00,0x06,0…
39 # GFX940: scratch_load_dword v2, off, s6 ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x06,0x02]
42 # GFX940: scratch_load_dword v2, off, s6 offset:16 ; encoding: [0x10,0x40,0x50,0xdc,0x00,0x00,0x06,…
51 # GFX940: scratch_load_dwordx2 a[2:3], v4, s6 ; encoding: [0x00,0x60,0x54,0xdc,0x04,0x00,0x86,0x02]
54 # GFX940: scratch_load_dwordx2 a[2:3], v4, s6 offset:16 ; encoding: [0x10,0x60,0x54,0xdc,0x04,0x00,…
[all …]
/llvm-project/llvm/test/MC/ARM/
H A Dinvalid-fp-armv8.s10 vsel.f32 s3, s4, s6
12 vselne.f32 s3, s4, s6
14 vselmi.f32 s3, s4, s6
16 vselpl.f32 s3, s4, s6
18 vselvc.f32 s3, s4, s6
20 vselcs.f32 s3, s4, s6
22 vselcc.f32 s3, s4, s6
24 vselhs.f32 s3, s4, s6
26 vsello.f32 s3, s4, s6
28 vselhi.f32 s3, s4, s6
[all …]
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dstorepairsuppress.ll41 ; SUPPRESS-NEXT: fmul s6, s5, s1
43 ; SUPPRESS-NEXT: fnmsub s4, s4, s0, s6
53 ; SUPPRESS-NEXT: ldp s6, s7, [x8, #16]
59 ; SUPPRESS-NEXT: fadd s4, s16, s6
62 ; SUPPRESS-NEXT: fsub s6, s6, s16
64 ; SUPPRESS-NEXT: stp s6, s3, [x8, #24]
83 ; SUPPRESS-NEXT: fnmsub s1, s1, s6, s5
84 ; SUPPRESS-NEXT: fmadd s3, s4, s6, s3
95 ; SUPPRESS-NEXT: fmul s6, s5, s1
97 ; SUPPRESS-NEXT: fnmsub s4, s4, s0, s6
[all …]

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