1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 %s 3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s 4; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s 5; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX12 %s 6 7define amdgpu_ps <4 x float> @getresinfo_1d(<8 x i32> inreg %rsrc, i16 %mip) { 8; GFX9-LABEL: getresinfo_1d: 9; GFX9: ; %bb.0: ; %main_body 10; GFX9-NEXT: s_mov_b32 s0, s2 11; GFX9-NEXT: s_mov_b32 s1, s3 12; GFX9-NEXT: s_mov_b32 s2, s4 13; GFX9-NEXT: s_mov_b32 s3, s5 14; GFX9-NEXT: s_mov_b32 s4, s6 15; GFX9-NEXT: s_mov_b32 s5, s7 16; GFX9-NEXT: s_mov_b32 s6, s8 17; GFX9-NEXT: s_mov_b32 s7, s9 18; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 19; GFX9-NEXT: s_waitcnt vmcnt(0) 20; GFX9-NEXT: ; return to shader part epilog 21; 22; GFX10-LABEL: getresinfo_1d: 23; GFX10: ; %bb.0: ; %main_body 24; GFX10-NEXT: s_mov_b32 s0, s2 25; GFX10-NEXT: s_mov_b32 s1, s3 26; GFX10-NEXT: s_mov_b32 s2, s4 27; GFX10-NEXT: s_mov_b32 s3, s5 28; GFX10-NEXT: s_mov_b32 s4, s6 29; GFX10-NEXT: s_mov_b32 s5, s7 30; GFX10-NEXT: s_mov_b32 s6, s8 31; GFX10-NEXT: s_mov_b32 s7, s9 32; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 33; GFX10-NEXT: s_waitcnt vmcnt(0) 34; GFX10-NEXT: ; return to shader part epilog 35; 36; GFX12-LABEL: getresinfo_1d: 37; GFX12: ; %bb.0: ; %main_body 38; GFX12-NEXT: s_mov_b32 s0, s2 39; GFX12-NEXT: s_mov_b32 s1, s3 40; GFX12-NEXT: s_mov_b32 s2, s4 41; GFX12-NEXT: s_mov_b32 s3, s5 42; GFX12-NEXT: s_mov_b32 s4, s6 43; GFX12-NEXT: s_mov_b32 s5, s7 44; GFX12-NEXT: s_mov_b32 s6, s8 45; GFX12-NEXT: s_mov_b32 s7, s9 46; GFX12-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D a16 47; GFX12-NEXT: s_wait_loadcnt 0x0 48; GFX12-NEXT: ; return to shader part epilog 49main_body: 50 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 51 ret <4 x float> %v 52} 53 54define amdgpu_ps <4 x float> @getresinfo_2d(<8 x i32> inreg %rsrc, i16 %mip) { 55; GFX9-LABEL: getresinfo_2d: 56; GFX9: ; %bb.0: ; %main_body 57; GFX9-NEXT: s_mov_b32 s0, s2 58; GFX9-NEXT: s_mov_b32 s1, s3 59; GFX9-NEXT: s_mov_b32 s2, s4 60; GFX9-NEXT: s_mov_b32 s3, s5 61; GFX9-NEXT: s_mov_b32 s4, s6 62; GFX9-NEXT: s_mov_b32 s5, s7 63; GFX9-NEXT: s_mov_b32 s6, s8 64; GFX9-NEXT: s_mov_b32 s7, s9 65; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 66; GFX9-NEXT: s_waitcnt vmcnt(0) 67; GFX9-NEXT: ; return to shader part epilog 68; 69; GFX10-LABEL: getresinfo_2d: 70; GFX10: ; %bb.0: ; %main_body 71; GFX10-NEXT: s_mov_b32 s0, s2 72; GFX10-NEXT: s_mov_b32 s1, s3 73; GFX10-NEXT: s_mov_b32 s2, s4 74; GFX10-NEXT: s_mov_b32 s3, s5 75; GFX10-NEXT: s_mov_b32 s4, s6 76; GFX10-NEXT: s_mov_b32 s5, s7 77; GFX10-NEXT: s_mov_b32 s6, s8 78; GFX10-NEXT: s_mov_b32 s7, s9 79; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 80; GFX10-NEXT: s_waitcnt vmcnt(0) 81; GFX10-NEXT: ; return to shader part epilog 82; 83; GFX12-LABEL: getresinfo_2d: 84; GFX12: ; %bb.0: ; %main_body 85; GFX12-NEXT: s_mov_b32 s0, s2 86; GFX12-NEXT: s_mov_b32 s1, s3 87; GFX12-NEXT: s_mov_b32 s2, s4 88; GFX12-NEXT: s_mov_b32 s3, s5 89; GFX12-NEXT: s_mov_b32 s4, s6 90; GFX12-NEXT: s_mov_b32 s5, s7 91; GFX12-NEXT: s_mov_b32 s6, s8 92; GFX12-NEXT: s_mov_b32 s7, s9 93; GFX12-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D a16 94; GFX12-NEXT: s_wait_loadcnt 0x0 95; GFX12-NEXT: ; return to shader part epilog 96main_body: 97 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 98 ret <4 x float> %v 99} 100 101define amdgpu_ps <4 x float> @getresinfo_3d(<8 x i32> inreg %rsrc, i16 %mip) { 102; GFX9-LABEL: getresinfo_3d: 103; GFX9: ; %bb.0: ; %main_body 104; GFX9-NEXT: s_mov_b32 s0, s2 105; GFX9-NEXT: s_mov_b32 s1, s3 106; GFX9-NEXT: s_mov_b32 s2, s4 107; GFX9-NEXT: s_mov_b32 s3, s5 108; GFX9-NEXT: s_mov_b32 s4, s6 109; GFX9-NEXT: s_mov_b32 s5, s7 110; GFX9-NEXT: s_mov_b32 s6, s8 111; GFX9-NEXT: s_mov_b32 s7, s9 112; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 113; GFX9-NEXT: s_waitcnt vmcnt(0) 114; GFX9-NEXT: ; return to shader part epilog 115; 116; GFX10-LABEL: getresinfo_3d: 117; GFX10: ; %bb.0: ; %main_body 118; GFX10-NEXT: s_mov_b32 s0, s2 119; GFX10-NEXT: s_mov_b32 s1, s3 120; GFX10-NEXT: s_mov_b32 s2, s4 121; GFX10-NEXT: s_mov_b32 s3, s5 122; GFX10-NEXT: s_mov_b32 s4, s6 123; GFX10-NEXT: s_mov_b32 s5, s7 124; GFX10-NEXT: s_mov_b32 s6, s8 125; GFX10-NEXT: s_mov_b32 s7, s9 126; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 127; GFX10-NEXT: s_waitcnt vmcnt(0) 128; GFX10-NEXT: ; return to shader part epilog 129; 130; GFX12-LABEL: getresinfo_3d: 131; GFX12: ; %bb.0: ; %main_body 132; GFX12-NEXT: s_mov_b32 s0, s2 133; GFX12-NEXT: s_mov_b32 s1, s3 134; GFX12-NEXT: s_mov_b32 s2, s4 135; GFX12-NEXT: s_mov_b32 s3, s5 136; GFX12-NEXT: s_mov_b32 s4, s6 137; GFX12-NEXT: s_mov_b32 s5, s7 138; GFX12-NEXT: s_mov_b32 s6, s8 139; GFX12-NEXT: s_mov_b32 s7, s9 140; GFX12-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D a16 141; GFX12-NEXT: s_wait_loadcnt 0x0 142; GFX12-NEXT: ; return to shader part epilog 143main_body: 144 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 145 ret <4 x float> %v 146} 147 148define amdgpu_ps <4 x float> @getresinfo_cube(<8 x i32> inreg %rsrc, i16 %mip) { 149; GFX9-LABEL: getresinfo_cube: 150; GFX9: ; %bb.0: ; %main_body 151; GFX9-NEXT: s_mov_b32 s0, s2 152; GFX9-NEXT: s_mov_b32 s1, s3 153; GFX9-NEXT: s_mov_b32 s2, s4 154; GFX9-NEXT: s_mov_b32 s3, s5 155; GFX9-NEXT: s_mov_b32 s4, s6 156; GFX9-NEXT: s_mov_b32 s5, s7 157; GFX9-NEXT: s_mov_b32 s6, s8 158; GFX9-NEXT: s_mov_b32 s7, s9 159; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 160; GFX9-NEXT: s_waitcnt vmcnt(0) 161; GFX9-NEXT: ; return to shader part epilog 162; 163; GFX10-LABEL: getresinfo_cube: 164; GFX10: ; %bb.0: ; %main_body 165; GFX10-NEXT: s_mov_b32 s0, s2 166; GFX10-NEXT: s_mov_b32 s1, s3 167; GFX10-NEXT: s_mov_b32 s2, s4 168; GFX10-NEXT: s_mov_b32 s3, s5 169; GFX10-NEXT: s_mov_b32 s4, s6 170; GFX10-NEXT: s_mov_b32 s5, s7 171; GFX10-NEXT: s_mov_b32 s6, s8 172; GFX10-NEXT: s_mov_b32 s7, s9 173; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 174; GFX10-NEXT: s_waitcnt vmcnt(0) 175; GFX10-NEXT: ; return to shader part epilog 176; 177; GFX12-LABEL: getresinfo_cube: 178; GFX12: ; %bb.0: ; %main_body 179; GFX12-NEXT: s_mov_b32 s0, s2 180; GFX12-NEXT: s_mov_b32 s1, s3 181; GFX12-NEXT: s_mov_b32 s2, s4 182; GFX12-NEXT: s_mov_b32 s3, s5 183; GFX12-NEXT: s_mov_b32 s4, s6 184; GFX12-NEXT: s_mov_b32 s5, s7 185; GFX12-NEXT: s_mov_b32 s6, s8 186; GFX12-NEXT: s_mov_b32 s7, s9 187; GFX12-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE a16 188; GFX12-NEXT: s_wait_loadcnt 0x0 189; GFX12-NEXT: ; return to shader part epilog 190main_body: 191 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 192 ret <4 x float> %v 193} 194 195define amdgpu_ps <4 x float> @getresinfo_1darray(<8 x i32> inreg %rsrc, i16 %mip) { 196; GFX9-LABEL: getresinfo_1darray: 197; GFX9: ; %bb.0: ; %main_body 198; GFX9-NEXT: s_mov_b32 s0, s2 199; GFX9-NEXT: s_mov_b32 s1, s3 200; GFX9-NEXT: s_mov_b32 s2, s4 201; GFX9-NEXT: s_mov_b32 s3, s5 202; GFX9-NEXT: s_mov_b32 s4, s6 203; GFX9-NEXT: s_mov_b32 s5, s7 204; GFX9-NEXT: s_mov_b32 s6, s8 205; GFX9-NEXT: s_mov_b32 s7, s9 206; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 207; GFX9-NEXT: s_waitcnt vmcnt(0) 208; GFX9-NEXT: ; return to shader part epilog 209; 210; GFX10-LABEL: getresinfo_1darray: 211; GFX10: ; %bb.0: ; %main_body 212; GFX10-NEXT: s_mov_b32 s0, s2 213; GFX10-NEXT: s_mov_b32 s1, s3 214; GFX10-NEXT: s_mov_b32 s2, s4 215; GFX10-NEXT: s_mov_b32 s3, s5 216; GFX10-NEXT: s_mov_b32 s4, s6 217; GFX10-NEXT: s_mov_b32 s5, s7 218; GFX10-NEXT: s_mov_b32 s6, s8 219; GFX10-NEXT: s_mov_b32 s7, s9 220; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 221; GFX10-NEXT: s_waitcnt vmcnt(0) 222; GFX10-NEXT: ; return to shader part epilog 223; 224; GFX12-LABEL: getresinfo_1darray: 225; GFX12: ; %bb.0: ; %main_body 226; GFX12-NEXT: s_mov_b32 s0, s2 227; GFX12-NEXT: s_mov_b32 s1, s3 228; GFX12-NEXT: s_mov_b32 s2, s4 229; GFX12-NEXT: s_mov_b32 s3, s5 230; GFX12-NEXT: s_mov_b32 s4, s6 231; GFX12-NEXT: s_mov_b32 s5, s7 232; GFX12-NEXT: s_mov_b32 s6, s8 233; GFX12-NEXT: s_mov_b32 s7, s9 234; GFX12-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY a16 235; GFX12-NEXT: s_wait_loadcnt 0x0 236; GFX12-NEXT: ; return to shader part epilog 237main_body: 238 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 239 ret <4 x float> %v 240} 241 242define amdgpu_ps <4 x float> @getresinfo_2darray(<8 x i32> inreg %rsrc, i16 %mip) { 243; GFX9-LABEL: getresinfo_2darray: 244; GFX9: ; %bb.0: ; %main_body 245; GFX9-NEXT: s_mov_b32 s0, s2 246; GFX9-NEXT: s_mov_b32 s1, s3 247; GFX9-NEXT: s_mov_b32 s2, s4 248; GFX9-NEXT: s_mov_b32 s3, s5 249; GFX9-NEXT: s_mov_b32 s4, s6 250; GFX9-NEXT: s_mov_b32 s5, s7 251; GFX9-NEXT: s_mov_b32 s6, s8 252; GFX9-NEXT: s_mov_b32 s7, s9 253; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 254; GFX9-NEXT: s_waitcnt vmcnt(0) 255; GFX9-NEXT: ; return to shader part epilog 256; 257; GFX10-LABEL: getresinfo_2darray: 258; GFX10: ; %bb.0: ; %main_body 259; GFX10-NEXT: s_mov_b32 s0, s2 260; GFX10-NEXT: s_mov_b32 s1, s3 261; GFX10-NEXT: s_mov_b32 s2, s4 262; GFX10-NEXT: s_mov_b32 s3, s5 263; GFX10-NEXT: s_mov_b32 s4, s6 264; GFX10-NEXT: s_mov_b32 s5, s7 265; GFX10-NEXT: s_mov_b32 s6, s8 266; GFX10-NEXT: s_mov_b32 s7, s9 267; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 268; GFX10-NEXT: s_waitcnt vmcnt(0) 269; GFX10-NEXT: ; return to shader part epilog 270; 271; GFX12-LABEL: getresinfo_2darray: 272; GFX12: ; %bb.0: ; %main_body 273; GFX12-NEXT: s_mov_b32 s0, s2 274; GFX12-NEXT: s_mov_b32 s1, s3 275; GFX12-NEXT: s_mov_b32 s2, s4 276; GFX12-NEXT: s_mov_b32 s3, s5 277; GFX12-NEXT: s_mov_b32 s4, s6 278; GFX12-NEXT: s_mov_b32 s5, s7 279; GFX12-NEXT: s_mov_b32 s6, s8 280; GFX12-NEXT: s_mov_b32 s7, s9 281; GFX12-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY a16 282; GFX12-NEXT: s_wait_loadcnt 0x0 283; GFX12-NEXT: ; return to shader part epilog 284main_body: 285 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 286 ret <4 x float> %v 287} 288 289define amdgpu_ps <4 x float> @getresinfo_2dmsaa(<8 x i32> inreg %rsrc, i16 %mip) { 290; GFX9-LABEL: getresinfo_2dmsaa: 291; GFX9: ; %bb.0: ; %main_body 292; GFX9-NEXT: s_mov_b32 s0, s2 293; GFX9-NEXT: s_mov_b32 s1, s3 294; GFX9-NEXT: s_mov_b32 s2, s4 295; GFX9-NEXT: s_mov_b32 s3, s5 296; GFX9-NEXT: s_mov_b32 s4, s6 297; GFX9-NEXT: s_mov_b32 s5, s7 298; GFX9-NEXT: s_mov_b32 s6, s8 299; GFX9-NEXT: s_mov_b32 s7, s9 300; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 301; GFX9-NEXT: s_waitcnt vmcnt(0) 302; GFX9-NEXT: ; return to shader part epilog 303; 304; GFX10-LABEL: getresinfo_2dmsaa: 305; GFX10: ; %bb.0: ; %main_body 306; GFX10-NEXT: s_mov_b32 s0, s2 307; GFX10-NEXT: s_mov_b32 s1, s3 308; GFX10-NEXT: s_mov_b32 s2, s4 309; GFX10-NEXT: s_mov_b32 s3, s5 310; GFX10-NEXT: s_mov_b32 s4, s6 311; GFX10-NEXT: s_mov_b32 s5, s7 312; GFX10-NEXT: s_mov_b32 s6, s8 313; GFX10-NEXT: s_mov_b32 s7, s9 314; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 315; GFX10-NEXT: s_waitcnt vmcnt(0) 316; GFX10-NEXT: ; return to shader part epilog 317; 318; GFX12-LABEL: getresinfo_2dmsaa: 319; GFX12: ; %bb.0: ; %main_body 320; GFX12-NEXT: s_mov_b32 s0, s2 321; GFX12-NEXT: s_mov_b32 s1, s3 322; GFX12-NEXT: s_mov_b32 s2, s4 323; GFX12-NEXT: s_mov_b32 s3, s5 324; GFX12-NEXT: s_mov_b32 s4, s6 325; GFX12-NEXT: s_mov_b32 s5, s7 326; GFX12-NEXT: s_mov_b32 s6, s8 327; GFX12-NEXT: s_mov_b32 s7, s9 328; GFX12-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA a16 329; GFX12-NEXT: s_wait_loadcnt 0x0 330; GFX12-NEXT: ; return to shader part epilog 331main_body: 332 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 333 ret <4 x float> %v 334} 335 336define amdgpu_ps <4 x float> @getresinfo_2darraymsaa(<8 x i32> inreg %rsrc, i16 %mip) { 337; GFX9-LABEL: getresinfo_2darraymsaa: 338; GFX9: ; %bb.0: ; %main_body 339; GFX9-NEXT: s_mov_b32 s0, s2 340; GFX9-NEXT: s_mov_b32 s1, s3 341; GFX9-NEXT: s_mov_b32 s2, s4 342; GFX9-NEXT: s_mov_b32 s3, s5 343; GFX9-NEXT: s_mov_b32 s4, s6 344; GFX9-NEXT: s_mov_b32 s5, s7 345; GFX9-NEXT: s_mov_b32 s6, s8 346; GFX9-NEXT: s_mov_b32 s7, s9 347; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 348; GFX9-NEXT: s_waitcnt vmcnt(0) 349; GFX9-NEXT: ; return to shader part epilog 350; 351; GFX10-LABEL: getresinfo_2darraymsaa: 352; GFX10: ; %bb.0: ; %main_body 353; GFX10-NEXT: s_mov_b32 s0, s2 354; GFX10-NEXT: s_mov_b32 s1, s3 355; GFX10-NEXT: s_mov_b32 s2, s4 356; GFX10-NEXT: s_mov_b32 s3, s5 357; GFX10-NEXT: s_mov_b32 s4, s6 358; GFX10-NEXT: s_mov_b32 s5, s7 359; GFX10-NEXT: s_mov_b32 s6, s8 360; GFX10-NEXT: s_mov_b32 s7, s9 361; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 362; GFX10-NEXT: s_waitcnt vmcnt(0) 363; GFX10-NEXT: ; return to shader part epilog 364; 365; GFX12-LABEL: getresinfo_2darraymsaa: 366; GFX12: ; %bb.0: ; %main_body 367; GFX12-NEXT: s_mov_b32 s0, s2 368; GFX12-NEXT: s_mov_b32 s1, s3 369; GFX12-NEXT: s_mov_b32 s2, s4 370; GFX12-NEXT: s_mov_b32 s3, s5 371; GFX12-NEXT: s_mov_b32 s4, s6 372; GFX12-NEXT: s_mov_b32 s5, s7 373; GFX12-NEXT: s_mov_b32 s6, s8 374; GFX12-NEXT: s_mov_b32 s7, s9 375; GFX12-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY a16 376; GFX12-NEXT: s_wait_loadcnt 0x0 377; GFX12-NEXT: ; return to shader part epilog 378main_body: 379 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 380 ret <4 x float> %v 381} 382 383define amdgpu_ps <4 x float> @getresinfo_dmask0(<8 x i32> inreg %rsrc, <4 x float> %vdata, i16 %mip) { 384; GFX9-LABEL: getresinfo_dmask0: 385; GFX9: ; %bb.0: ; %main_body 386; GFX9-NEXT: ; return to shader part epilog 387; 388; GFX10-LABEL: getresinfo_dmask0: 389; GFX10: ; %bb.0: ; %main_body 390; GFX10-NEXT: ; return to shader part epilog 391; 392; GFX12-LABEL: getresinfo_dmask0: 393; GFX12: ; %bb.0: ; %main_body 394; GFX12-NEXT: ; return to shader part epilog 395main_body: 396 %r = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 0, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 397 ret <4 x float> %r 398} 399 400declare <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 401declare <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 402declare <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 403declare <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 404declare <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 405declare <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 406declare <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 407declare <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 408 409attributes #0 = { nounwind } 410attributes #1 = { nounwind readnone } 411