| /dflybsd-src/sys/dev/drm/radeon/ |
| H A D | kv_dpm.c | 531 u32 index, u32 sclk) in kv_set_divider_value()
2077 u32 sclk, u32 min_sclk_in_sr) in kv_get_sleep_divider_id_from_clock()
2141 u32 sclk, mclk = 0; in kv_apply_state_adjust_rules() local
2613 u32 sclk; in kv_parse_pplib_clock_info() local
2704 u32 sclk; in kv_parse_power_table() local
2803 u32 sclk, tmp; in kv_dpm_debugfs_print_current_performance_level() local
2826 u32 sclk; in kv_dpm_get_current_sclk() local
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| H A D | rs690.c | 267 fixed20_12 sclk; member
279 fixed20_12 sclk, core_bandwidth, max_bandwidth; in rs690_crtc_bandwidth_compute() local
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| H A D | rs780_dpm.c | 752 u32 sclk; in rs780_parse_pplib_clock_info() local
990 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_debugfs_print_current_performance_level() local
1012 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_get_current_sclk() local
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| H A D | radeon_clocks.c | 39 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local
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| H A D | rv515.c | 946 fixed20_12 sclk; member
958 fixed20_12 sclk; in rv515_crtc_bandwidth_compute() local
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| H A D | ci_dpm.c | 836 u32 sclk, mclk; in ci_apply_state_adjust_rules() local
2415 u32 sclk, in ci_populate_phase_value_based_on_sclk()
2487 u32 sclk, u32 min_sclk_in_sr) in ci_get_sleep_divider_id_from_clock()
2557 u32 sclk, in ci_populate_memory_timing_parameters()
3195 SMU7_Discrete_GraphicsLevel *sclk) in ci_calculate_sclk_params()
3895 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table() local
3933 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels() local
5648 u32 sclk, mclk; in ci_parse_power_table() local
5962 u32 sclk = ci_get_average_sclk_freq(rdev); in ci_dpm_debugfs_print_current_performance_level() local
5991 u32 sclk = ci_get_average_sclk_freq(rdev); in ci_dpm_get_current_sclk() local
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| H A D | trinity_dpm.c | 589 u32 index, u32 sclk) in trinity_set_divider_value()
1339 static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk) in trinity_calculate_vce_wm()
1363 u32 sclk, u32 min_sclk_in_sr) in trinity_get_sleep_divider_id_from_clock()
1719 u32 sclk; in trinity_parse_pplib_clock_info() local
1810 u32 sclk; in trinity_parse_power_table() local
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| H A D | rv740_dpm.c | 122 RV770_SMC_SCLK_VALUE *sclk) in rv740_populate_sclk_value()
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| H A D | rv6xx_dpm.h | 80 u32 sclk; member
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| H A D | rv730_dpm.c | 42 RV770_SMC_SCLK_VALUE *sclk) in rv730_populate_sclk_value()
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| H A D | si_dpm.c | 2853 u32 sclk = 0; in si_init_smc_spll_table() local
2973 u32 mclk, sclk; in si_apply_state_adjust_rules() local
4209 u16 voltage, u32 sclk, u32 mclk, in si_populate_phase_shedding_value()
4782 SISLANDS_SMC_SCLK_VALUE *sclk) in si_calculate_sclk_params()
4852 SISLANDS_SMC_SCLK_VALUE *sclk) in si_populate_sclk_value()
6880 u32 sclk, mclk; in si_parse_power_table() local
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| H A D | trinity_dpm.h | 31 u32 sclk; member
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| H A D | radeon_i2c.c | 238 u32 sclk = rdev->pm.current_sclk; in radeon_get_i2c_prescale() local
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| H A D | btc_dpm.c | 1241 u32 *sclk, u32 *mclk) in btc_skip_blacklist_clocks()
2098 u32 mclk, sclk; in btc_apply_state_adjust_rules() local
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| H A D | rv770_smc.h | 108 RV770_SMC_SCLK_VALUE sclk; member
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| H A D | sumo_dpm.h | 32 u32 sclk; member
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| H A D | ni_dpm.c | 1998 NISLANDS_SMC_SCLK_VALUE *sclk) in ni_calculate_sclk_params()
2069 NISLANDS_SMC_SCLK_VALUE *sclk) in ni_populate_sclk_value()
2098 u32 sclk = 0; in ni_init_smc_spll_table() local
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| /dflybsd-src/sys/dev/drm/amd/powerplay/hwmgr/ |
| H A D | smu_helper.c | 414 uint16_t virtual_voltage_id, int32_t *sclk) in phm_get_sclk_for_voltage_evv()
522 uint32_t sclk, uint16_t id, uint16_t *voltage) in phm_get_voltage_evv_on_sclk()
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| H A D | ppatomctrl.c | 644 uint32_t sclk, in atomctrl_calculate_voltage_evv_on_sclk()
1088 uint32_t sclk, uint16_t virtual_voltage_Id, in atomctrl_get_voltage_evv_on_sclk()
1340 uint32_t sclk, uint16_t virtual_voltage_Id, uint32_t *voltage) in atomctrl_get_voltage_evv_on_sclk_ai()
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| H A D | smu7_hwmgr.c | 1704 uint32_t sclk = 0; in smu7_get_evv_voltages() local
2891 uint32_t sclk; in smu7_apply_state_adjust_rules() local
3528 uint32_t sclk, mclk, activity_percent; in smu7_read_sensor() local
3598 uint32_t sclk = smu7_ps->performance_levels in smu7_find_dpm_states_clocks_in_dpm_table() local
3642 uint32_t sclk, max_sclk = 0; in smu7_get_maximum_link_speed() local
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| /dflybsd-src/sys/dev/drm/amd/display/dc/calcs/ |
| H A D | dce_calcs.c | 99 struct bw_fixed sclk[8]; in calculate_bandwidth() local
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| /dflybsd-src/sys/dev/drm/amd/amdgpu/ |
| H A D | amdgpu_dpm.h | 92 u32 sclk; member
98 u32 sclk; member
138 u32 sclk; member
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| H A D | si_dpm.c | 2952 u32 sclk = 0; in si_init_smc_spll_table() local
3432 u32 mclk, sclk; in si_apply_state_adjust_rules() local
4672 u16 voltage, u32 sclk, u32 mclk, in si_populate_phase_shedding_value()
5245 SISLANDS_SMC_SCLK_VALUE *sclk) in si_calculate_sclk_params()
5315 SISLANDS_SMC_SCLK_VALUE *sclk) in si_populate_sclk_value()
7287 u32 sclk, mclk; in si_parse_power_table() local
7987 uint32_t sclk, mclk; in si_dpm_read_sensor() local
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| /dflybsd-src/sys/dev/drm/amd/powerplay/inc/ |
| H A D | power_state.h | 169 unsigned long sclk; member
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| /dflybsd-src/sys/dev/drm/amd/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 796 uint32_t engine_clock, SMU71_Discrete_GraphicsLevel *sclk) in iceland_calculate_sclk_params()
875 uint32_t sclk, uint32_t *p_shed) in iceland_populate_phase_value_based_on_sclk()
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