xref: /dflybsd-src/sys/dev/drm/radeon/trinity_dpm.h (revision 4cd92098975238a3e2cfccf057598cf2a5e54b55)
157e252bfSMichael Neumann /*
257e252bfSMichael Neumann  * Copyright 2012 Advanced Micro Devices, Inc.
357e252bfSMichael Neumann  *
457e252bfSMichael Neumann  * Permission is hereby granted, free of charge, to any person obtaining a
557e252bfSMichael Neumann  * copy of this software and associated documentation files (the "Software"),
657e252bfSMichael Neumann  * to deal in the Software without restriction, including without limitation
757e252bfSMichael Neumann  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
857e252bfSMichael Neumann  * and/or sell copies of the Software, and to permit persons to whom the
957e252bfSMichael Neumann  * Software is furnished to do so, subject to the following conditions:
1057e252bfSMichael Neumann  *
1157e252bfSMichael Neumann  * The above copyright notice and this permission notice shall be included in
1257e252bfSMichael Neumann  * all copies or substantial portions of the Software.
1357e252bfSMichael Neumann  *
1457e252bfSMichael Neumann  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1557e252bfSMichael Neumann  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1657e252bfSMichael Neumann  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1757e252bfSMichael Neumann  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
1857e252bfSMichael Neumann  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
1957e252bfSMichael Neumann  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2057e252bfSMichael Neumann  * OTHER DEALINGS IN THE SOFTWARE.
2157e252bfSMichael Neumann  *
2257e252bfSMichael Neumann  */
2357e252bfSMichael Neumann #ifndef __TRINITY_DPM_H__
2457e252bfSMichael Neumann #define __TRINITY_DPM_H__
2557e252bfSMichael Neumann 
2657e252bfSMichael Neumann #include "sumo_dpm.h"
2757e252bfSMichael Neumann 
2857e252bfSMichael Neumann #define TRINITY_SIZEOF_DPM_STATE_TABLE (SMU_SCLK_DPM_STATE_1_CNTL_0 - SMU_SCLK_DPM_STATE_0_CNTL_0)
2957e252bfSMichael Neumann 
3057e252bfSMichael Neumann struct trinity_pl {
3157e252bfSMichael Neumann 	u32 sclk;
3257e252bfSMichael Neumann 	u8 vddc_index;
3357e252bfSMichael Neumann 	u8 ds_divider_index;
3457e252bfSMichael Neumann 	u8 ss_divider_index;
3557e252bfSMichael Neumann 	u8 allow_gnb_slow;
3657e252bfSMichael Neumann 	u8 force_nbp_state;
3757e252bfSMichael Neumann 	u8 display_wm;
3857e252bfSMichael Neumann 	u8 vce_wm;
3957e252bfSMichael Neumann };
4057e252bfSMichael Neumann 
4157e252bfSMichael Neumann #define TRINITY_POWERSTATE_FLAGS_NBPS_FORCEHIGH  (1 << 0)
4257e252bfSMichael Neumann #define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOHIGH (1 << 1)
4357e252bfSMichael Neumann #define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOLOW  (1 << 2)
4457e252bfSMichael Neumann 
4557e252bfSMichael Neumann #define TRINITY_POWERSTATE_FLAGS_BAPM_DISABLE    (1 << 0)
4657e252bfSMichael Neumann 
4757e252bfSMichael Neumann struct trinity_ps {
4857e252bfSMichael Neumann 	u32 num_levels;
4957e252bfSMichael Neumann 	struct trinity_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS];
5057e252bfSMichael Neumann 
5157e252bfSMichael Neumann 	u32 nbps_flags;
5257e252bfSMichael Neumann 	u32 bapm_flags;
5357e252bfSMichael Neumann 
5457e252bfSMichael Neumann 	u8 Dpm0PgNbPsLo;
5557e252bfSMichael Neumann 	u8 Dpm0PgNbPsHi;
5657e252bfSMichael Neumann 	u8 DpmXNbPsLo;
5757e252bfSMichael Neumann 	u8 DpmXNbPsHi;
5857e252bfSMichael Neumann 
5957e252bfSMichael Neumann 	u32 vclk_low_divider;
6057e252bfSMichael Neumann 	u32 vclk_high_divider;
6157e252bfSMichael Neumann 	u32 dclk_low_divider;
6257e252bfSMichael Neumann 	u32 dclk_high_divider;
6357e252bfSMichael Neumann };
6457e252bfSMichael Neumann 
6557e252bfSMichael Neumann #define TRINITY_NUM_NBPSTATES   4
6657e252bfSMichael Neumann 
6757e252bfSMichael Neumann struct trinity_uvd_clock_table_entry
6857e252bfSMichael Neumann {
6957e252bfSMichael Neumann 	u32 vclk;
7057e252bfSMichael Neumann 	u32 dclk;
7157e252bfSMichael Neumann 	u8 vclk_did;
7257e252bfSMichael Neumann 	u8 dclk_did;
7357e252bfSMichael Neumann 	u8 rsv[2];
7457e252bfSMichael Neumann };
7557e252bfSMichael Neumann 
7657e252bfSMichael Neumann struct trinity_sys_info {
7757e252bfSMichael Neumann 	u32 bootup_uma_clk;
7857e252bfSMichael Neumann 	u32 bootup_sclk;
7957e252bfSMichael Neumann 	u32 min_sclk;
8057e252bfSMichael Neumann 	u32 dentist_vco_freq;
8157e252bfSMichael Neumann 	u32 nb_dpm_enable;
8257e252bfSMichael Neumann 	u32 nbp_mclk[TRINITY_NUM_NBPSTATES];
8357e252bfSMichael Neumann 	u32 nbp_nclk[TRINITY_NUM_NBPSTATES];
8457e252bfSMichael Neumann 	u16 nbp_voltage_index[TRINITY_NUM_NBPSTATES];
8557e252bfSMichael Neumann 	u16 bootup_nb_voltage_index;
8657e252bfSMichael Neumann 	u8 htc_tmp_lmt;
8757e252bfSMichael Neumann 	u8 htc_hyst_lmt;
8857e252bfSMichael Neumann 	struct sumo_sclk_voltage_mapping_table sclk_voltage_mapping_table;
8957e252bfSMichael Neumann 	struct sumo_vid_mapping_table vid_mapping_table;
9057e252bfSMichael Neumann 	u32 uma_channel_number;
9157e252bfSMichael Neumann 	struct trinity_uvd_clock_table_entry uvd_clock_table_entries[4];
9257e252bfSMichael Neumann };
9357e252bfSMichael Neumann 
9457e252bfSMichael Neumann struct trinity_power_info {
9557e252bfSMichael Neumann 	u32 at[SUMO_MAX_HARDWARE_POWERLEVELS];
9657e252bfSMichael Neumann 	u32 dpm_interval;
9757e252bfSMichael Neumann 	u32 thermal_auto_throttling;
9857e252bfSMichael Neumann 	struct trinity_sys_info sys_info;
9957e252bfSMichael Neumann 	struct trinity_pl boot_pl;
10057e252bfSMichael Neumann 	u32 min_sclk_did;
10157e252bfSMichael Neumann 	bool enable_nbps_policy;
10257e252bfSMichael Neumann 	bool voltage_drop_in_dce;
10357e252bfSMichael Neumann 	bool override_dynamic_mgpg;
10457e252bfSMichael Neumann 	bool enable_gfx_clock_gating;
10557e252bfSMichael Neumann 	bool enable_gfx_power_gating;
10657e252bfSMichael Neumann 	bool enable_mg_clock_gating;
10757e252bfSMichael Neumann 	bool enable_gfx_dynamic_mgpg;
10857e252bfSMichael Neumann 	bool enable_auto_thermal_throttling;
10957e252bfSMichael Neumann 	bool enable_dpm;
11057e252bfSMichael Neumann 	bool enable_sclk_ds;
111*4cd92098Szrj 	bool enable_bapm;
11257e252bfSMichael Neumann 	bool uvd_dpm;
11357e252bfSMichael Neumann 	struct radeon_ps current_rps;
11457e252bfSMichael Neumann 	struct trinity_ps current_ps;
11557e252bfSMichael Neumann 	struct radeon_ps requested_rps;
11657e252bfSMichael Neumann 	struct trinity_ps requested_ps;
11757e252bfSMichael Neumann };
11857e252bfSMichael Neumann 
11957e252bfSMichael Neumann #define TRINITY_AT_DFLT            30
12057e252bfSMichael Neumann 
12157e252bfSMichael Neumann /* trinity_smc.c */
122*4cd92098Szrj int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable);
12357e252bfSMichael Neumann int trinity_dpm_config(struct radeon_device *rdev, bool enable);
12457e252bfSMichael Neumann int trinity_uvd_dpm_config(struct radeon_device *rdev);
12557e252bfSMichael Neumann int trinity_dpm_force_state(struct radeon_device *rdev, u32 n);
12657e252bfSMichael Neumann int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n);
12757e252bfSMichael Neumann int trinity_dpm_no_forced_level(struct radeon_device *rdev);
12857e252bfSMichael Neumann int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev,
12957e252bfSMichael Neumann 					  bool enable);
13057e252bfSMichael Neumann int trinity_gfx_dynamic_mgpg_config(struct radeon_device *rdev);
13157e252bfSMichael Neumann void trinity_acquire_mutex(struct radeon_device *rdev);
13257e252bfSMichael Neumann void trinity_release_mutex(struct radeon_device *rdev);
13357e252bfSMichael Neumann 
13457e252bfSMichael Neumann #endif
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