1*57e252bfSMichael Neumann /* 2*57e252bfSMichael Neumann * Copyright 2011 Advanced Micro Devices, Inc. 3*57e252bfSMichael Neumann * 4*57e252bfSMichael Neumann * Permission is hereby granted, free of charge, to any person obtaining a 5*57e252bfSMichael Neumann * copy of this software and associated documentation files (the "Software"), 6*57e252bfSMichael Neumann * to deal in the Software without restriction, including without limitation 7*57e252bfSMichael Neumann * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*57e252bfSMichael Neumann * and/or sell copies of the Software, and to permit persons to whom the 9*57e252bfSMichael Neumann * Software is furnished to do so, subject to the following conditions: 10*57e252bfSMichael Neumann * 11*57e252bfSMichael Neumann * The above copyright notice and this permission notice shall be included in 12*57e252bfSMichael Neumann * all copies or substantial portions of the Software. 13*57e252bfSMichael Neumann * 14*57e252bfSMichael Neumann * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*57e252bfSMichael Neumann * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*57e252bfSMichael Neumann * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*57e252bfSMichael Neumann * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*57e252bfSMichael Neumann * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*57e252bfSMichael Neumann * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*57e252bfSMichael Neumann * OTHER DEALINGS IN THE SOFTWARE. 21*57e252bfSMichael Neumann * 22*57e252bfSMichael Neumann * Authors: Alex Deucher 23*57e252bfSMichael Neumann */ 24*57e252bfSMichael Neumann 25*57e252bfSMichael Neumann #ifndef __RV6XX_DPM_H__ 26*57e252bfSMichael Neumann #define __RV6XX_DPM_H__ 27*57e252bfSMichael Neumann 28*57e252bfSMichael Neumann #include "r600_dpm.h" 29*57e252bfSMichael Neumann 30*57e252bfSMichael Neumann /* Represents a single SCLK step. */ 31*57e252bfSMichael Neumann struct rv6xx_sclk_stepping 32*57e252bfSMichael Neumann { 33*57e252bfSMichael Neumann u32 vco_frequency; 34*57e252bfSMichael Neumann u32 post_divider; 35*57e252bfSMichael Neumann }; 36*57e252bfSMichael Neumann 37*57e252bfSMichael Neumann struct rv6xx_pm_hw_state { 38*57e252bfSMichael Neumann u32 sclks[R600_PM_NUMBER_OF_ACTIVITY_LEVELS]; 39*57e252bfSMichael Neumann u32 mclks[R600_PM_NUMBER_OF_MCLKS]; 40*57e252bfSMichael Neumann u16 vddc[R600_PM_NUMBER_OF_VOLTAGE_LEVELS]; 41*57e252bfSMichael Neumann bool backbias[R600_PM_NUMBER_OF_VOLTAGE_LEVELS]; 42*57e252bfSMichael Neumann bool pcie_gen2[R600_PM_NUMBER_OF_ACTIVITY_LEVELS]; 43*57e252bfSMichael Neumann u8 high_sclk_index; 44*57e252bfSMichael Neumann u8 medium_sclk_index; 45*57e252bfSMichael Neumann u8 low_sclk_index; 46*57e252bfSMichael Neumann u8 high_mclk_index; 47*57e252bfSMichael Neumann u8 medium_mclk_index; 48*57e252bfSMichael Neumann u8 low_mclk_index; 49*57e252bfSMichael Neumann u8 high_vddc_index; 50*57e252bfSMichael Neumann u8 medium_vddc_index; 51*57e252bfSMichael Neumann u8 low_vddc_index; 52*57e252bfSMichael Neumann u8 rp[R600_PM_NUMBER_OF_ACTIVITY_LEVELS]; 53*57e252bfSMichael Neumann u8 lp[R600_PM_NUMBER_OF_ACTIVITY_LEVELS]; 54*57e252bfSMichael Neumann }; 55*57e252bfSMichael Neumann 56*57e252bfSMichael Neumann struct rv6xx_power_info { 57*57e252bfSMichael Neumann /* flags */ 58*57e252bfSMichael Neumann bool voltage_control; 59*57e252bfSMichael Neumann bool sclk_ss; 60*57e252bfSMichael Neumann bool mclk_ss; 61*57e252bfSMichael Neumann bool dynamic_ss; 62*57e252bfSMichael Neumann bool dynamic_pcie_gen2; 63*57e252bfSMichael Neumann bool thermal_protection; 64*57e252bfSMichael Neumann bool display_gap; 65*57e252bfSMichael Neumann bool gfx_clock_gating; 66*57e252bfSMichael Neumann /* clk values */ 67*57e252bfSMichael Neumann u32 fb_div_scale; 68*57e252bfSMichael Neumann u32 spll_ref_div; 69*57e252bfSMichael Neumann u32 mpll_ref_div; 70*57e252bfSMichael Neumann u32 bsu; 71*57e252bfSMichael Neumann u32 bsp; 72*57e252bfSMichael Neumann /* */ 73*57e252bfSMichael Neumann u32 active_auto_throttle_sources; 74*57e252bfSMichael Neumann /* current power state */ 75*57e252bfSMichael Neumann u32 restricted_levels; 76*57e252bfSMichael Neumann struct rv6xx_pm_hw_state hw; 77*57e252bfSMichael Neumann }; 78*57e252bfSMichael Neumann 79*57e252bfSMichael Neumann struct rv6xx_pl { 80*57e252bfSMichael Neumann u32 sclk; 81*57e252bfSMichael Neumann u32 mclk; 82*57e252bfSMichael Neumann u16 vddc; 83*57e252bfSMichael Neumann u32 flags; 84*57e252bfSMichael Neumann }; 85*57e252bfSMichael Neumann 86*57e252bfSMichael Neumann struct rv6xx_ps { 87*57e252bfSMichael Neumann struct rv6xx_pl high; 88*57e252bfSMichael Neumann struct rv6xx_pl medium; 89*57e252bfSMichael Neumann struct rv6xx_pl low; 90*57e252bfSMichael Neumann }; 91*57e252bfSMichael Neumann 92*57e252bfSMichael Neumann #define RV6XX_DEFAULT_VCLK_FREQ 40000 /* 10 khz */ 93*57e252bfSMichael Neumann #define RV6XX_DEFAULT_DCLK_FREQ 30000 /* 10 khz */ 94*57e252bfSMichael Neumann 95*57e252bfSMichael Neumann #endif 96