| /netbsd-src/sys/arch/arm/amlogic/ |
| H A D | meson_clk_pll.c | 46 uint64_t parent_rate, rate; in meson_clk_pll_get_rate() local
104 uint64_t parent_rate, tmp; in meson_clk_pll_set_rate() local
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| H A D | meson_clk_mpll.c | 47 uint64_t parent_rate, sdm, n2; in meson_clk_mpll_get_rate() local
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| H A D | meson_clk_div.c | 85 int parent_rate; in meson_clk_div_set_rate() local
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| H A D | meson8b_clkc.c | 116 const u_int parent_rate = clk_get_rate(clkp_parent); in meson8b_clkc_pll_sys_set_rate() local
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| H A D | mesongx_mmc.c | 482 const u_int parent_rate = clk_get_rate(sc->sc_clk_clkin[sel]); in mesongx_mmc_set_clock() local
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| /netbsd-src/sys/arch/arm/ti/ |
| H A D | ti_dpll_clock.c | 226 uint64_t parent_rate; in ti_dpll_clock_get_rate() local
254 uint64_t parent_rate; in am3_dpll_clock_set_rate() local
296 uint64_t parent_rate; in omap3_dpll_clock_set_rate() local
336 uint64_t parent_rate; in omap3_dpll_core_clock_get_rate() local
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| H A D | ti_div_clock.c | 158 uint64_t parent_rate; in ti_div_clock_get_rate() local
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| /netbsd-src/sys/arch/arm/sunxi/ |
| H A D | sunxi_twi.c | 85 sunxi_twi_calc_rate(u_int parent_rate, u_int n, u_int m) in sunxi_twi_calc_rate()
91 sunxi_twi_set_clock(struct gttwsi_softc *sc, u_int parent_rate, u_int rate) in sunxi_twi_set_clock()
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| H A D | sunxi_ccu_fractional.c | 110 u_int parent_rate, best_rate, best_m; in sunxi_ccu_fractional_set_rate() local
189 u_int parent_rate, best_rate; in sunxi_ccu_fractional_round_rate() local
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| H A D | sunxi_ccu_display.c | 105 int parent_rate, best_parent_rate = 0; in sunxi_ccu_lcdxch1_set_rate() local
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| H A D | sunxi_ccu_nm.c | 107 u_int parent_rate, best_rate, best_n, best_m, best_parent; in sunxi_ccu_nm_set_rate() local
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| H A D | sunxi_ccu_div.c | 139 int parent_rate; in sunxi_ccu_div_set_rate() local
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| H A D | sunxi_hdmiphy.c | 374 const u_int parent_rate = clk_get_rate(sc->sc_clk_pll0); in sunxi_hdmiphy_set_rate() local
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| H A D | sunxi_rtc.c | 525 u_int parent_rate = clk_get_rate(sc->sc_parent_clk); in sunxi_rtc_clk_get_rate() local
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| H A D | sunxi_hdmi.c | 848 int parent_rate; in sunxi_hdmi_set_videomode() local
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| /netbsd-src/sys/arch/arm/rockchip/ |
| H A D | rk_cru_arm.c | 96 const u_int parent_rate = arm_rate->rate / arm_rate->div; in rk_cru_arm_set_rate_rates() local
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| /netbsd-src/sys/arch/arm/nvidia/ |
| H A D | tegra124_car.c | 1216 const u_int parent_rate = tegra124_car_clock_get_rate(sc, clk_parent); in tegra124_car_clock_get_rate_fixed_div() local
1244 const u_int parent_rate = tegra124_car_clock_get_rate(sc, clk_parent); in tegra124_car_clock_get_rate_div() local
1294 const u_int parent_rate = tegra124_car_clock_get_rate(sc, clk_parent); in tegra124_car_clock_set_rate_div() local
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| H A D | tegra210_car.c | 1322 const u_int parent_rate = tegra210_car_clock_get_rate(sc, clk_parent); in tegra210_car_clock_get_rate_fixed_div() local
1340 const u_int parent_rate = tegra210_car_clock_get_rate(sc, clk_parent); in tegra210_car_clock_get_rate_div() local
1398 const u_int parent_rate = tegra210_car_clock_get_rate(sc, clk_parent); in tegra210_car_clock_set_rate_div() local
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| H A D | tegra_drm_mode.c | 638 const u_int parent_rate = clk_get_rate(tegra_crtc->clk_parent); in tegra_crtc_mode_set() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gk20a.h | 122 u32 parent_rate; member
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| H A D | nouveau_nvkm_subdev_clk_gm20b.c | 496 u32 parent_rate = clk->base.parent_rate / KHZ; in gm20b_dvfs_calc_safe_pll() local
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| /netbsd-src/sys/arch/arm/samsung/ |
| H A D | exynos5410_clock.c | 655 const u_int parent_rate = exynos5410_clock_get_rate(sc, clk_parent); in exynos5410_clock_get_rate_div() local
675 const u_int parent_rate = exynos5410_clock_get_rate(sc, clk_parent); in exynos5410_clock_set_rate_div() local
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| H A D | exynos5422_clock.c | 832 const u_int parent_rate = exynos5422_clock_get_rate(sc, clk_parent); in exynos5422_clock_get_rate_div() local
852 const u_int parent_rate = exynos5422_clock_get_rate(sc, clk_parent); in exynos5422_clock_set_rate_div() local
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| /netbsd-src/sys/arch/arm/altera/ |
| H A D | cycv_clkmgr.c | 457 uint32_t parent_rate = 0; in cycv_clkmgr_clock_get_rate() local
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| /netbsd-src/sys/arch/riscv/starfive/ |
| H A D | jh7100_clkc.c | 352 u_int parent_rate = clk_get_rate(clk_parent); jh7100_clkc_div_set_rate() local
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