1 /* $NetBSD: sunxi_twi.c,v 1.17 2021/01/27 03:10:20 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30
31 __KERNEL_RCSID(0, "$NetBSD: sunxi_twi.c,v 1.17 2021/01/27 03:10:20 thorpej Exp $");
32
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/intr.h>
37 #include <sys/systm.h>
38 #include <sys/time.h>
39
40 #include <dev/i2c/i2cvar.h>
41 #include <dev/i2c/gttwsivar.h>
42 #include <dev/i2c/gttwsireg.h>
43
44 #include <dev/fdt/fdtvar.h>
45
46 #define TWI_CCR_REG 0x14
47 #define TWI_CCR_CLK_M __BITS(6,3)
48 #define TWI_CCR_CLK_N __BITS(2,0)
49
50 static const bus_size_t sunxi_twi_regmap[] = {
51 [TWSI_SLAVEADDR] = TWSI_ALLWINNER_SLAVEADDR,
52 [TWSI_EXTEND_SLAVEADDR] = TWSI_ALLWINNER_EXTEND_SLAVEADDR,
53 [TWSI_DATA] = TWSI_ALLWINNER_DATA,
54 [TWSI_CONTROL] = TWSI_ALLWINNER_CONTROL,
55 [TWSI_STATUS] = TWSI_ALLWINNER_STATUS,
56 [TWSI_BAUDRATE] = TWSI_ALLWINNER_BAUDRATE,
57 [TWSI_SOFTRESET] = TWSI_ALLWINNER_SOFTRESET,
58 };
59
60 static int sunxi_twi_match(device_t, cfdata_t, void *);
61 static void sunxi_twi_attach(device_t, device_t, void *);
62
63 struct sunxi_twi_config {
64 bool iflg_rwc;
65 };
66
67 static const struct sunxi_twi_config sun4i_a10_i2c_config = {
68 .iflg_rwc = false,
69 };
70
71 static const struct sunxi_twi_config sun6i_a31_i2c_config = {
72 .iflg_rwc = true,
73 };
74
75 static const struct device_compatible_entry compat_data[] = {
76 { .compat = "allwinner,sun4i-a10-i2c", .data = &sun4i_a10_i2c_config },
77 { .compat = "allwinner,sun6i-a31-i2c", .data = &sun6i_a31_i2c_config },
78 DEVICE_COMPAT_EOL
79 };
80
81 CFATTACH_DECL_NEW(sunxi_twi, sizeof(struct gttwsi_softc),
82 sunxi_twi_match, sunxi_twi_attach, NULL, NULL);
83
84 static u_int
sunxi_twi_calc_rate(u_int parent_rate,u_int n,u_int m)85 sunxi_twi_calc_rate(u_int parent_rate, u_int n, u_int m)
86 {
87 return parent_rate / (10 * (m + 1) * (1 << n));
88 }
89
90 static void
sunxi_twi_set_clock(struct gttwsi_softc * sc,u_int parent_rate,u_int rate)91 sunxi_twi_set_clock(struct gttwsi_softc *sc, u_int parent_rate, u_int rate)
92 {
93 uint32_t baud;
94 u_int n, m, best_rate;
95
96 baud = gttwsi_read_4(sc, TWSI_BAUDRATE);
97
98 for (best_rate = 0, n = 0; n < 8; n++) {
99 for (m = 0; m < 16; m++) {
100 const u_int tmp_rate =
101 sunxi_twi_calc_rate(parent_rate, n, m);
102 if (tmp_rate <= rate && tmp_rate > best_rate) {
103 best_rate = tmp_rate;
104 baud = __SHIFTIN(n, TWI_CCR_CLK_N) |
105 __SHIFTIN(m, TWI_CCR_CLK_M);
106 }
107 }
108 }
109
110 gttwsi_write_4(sc, TWSI_BAUDRATE, baud);
111 delay(10000);
112 }
113
114 static int
sunxi_twi_match(device_t parent,cfdata_t cf,void * aux)115 sunxi_twi_match(device_t parent, cfdata_t cf, void *aux)
116 {
117 struct fdt_attach_args * const faa = aux;
118
119 return of_compatible_match(faa->faa_phandle, compat_data);
120 }
121
122 static void
sunxi_twi_attach(device_t parent,device_t self,void * aux)123 sunxi_twi_attach(device_t parent, device_t self, void *aux)
124 {
125 struct gttwsi_softc * const sc = device_private(self);
126 struct fdt_attach_args * const faa = aux;
127 const struct sunxi_twi_config *conf;
128 const int phandle = faa->faa_phandle;
129 bus_space_tag_t bst = faa->faa_bst;
130 bus_space_handle_t bsh;
131 struct fdtbus_reset *rst;
132 struct clk *clk;
133 char intrstr[128];
134 bus_addr_t addr;
135 bus_size_t size;
136 void *ih;
137
138 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
139 aprint_error(": couldn't get registers\n");
140 return;
141 }
142
143 if (bus_space_map(bst, addr, size, 0, &bsh) != 0) {
144 aprint_error(": couldn't map registers\n");
145 return;
146 }
147
148 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
149 aprint_error(": failed to decode interrupt\n");
150 return;
151 }
152
153 if ((clk = fdtbus_clock_get_index(phandle, 0)) != NULL)
154 if (clk_enable(clk) != 0) {
155 aprint_error(": couldn't enable clock\n");
156 return;
157 }
158 if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL)
159 if (fdtbus_reset_deassert(rst) != 0) {
160 aprint_error(": couldn't de-assert reset\n");
161 return;
162 }
163
164 conf = of_compatible_lookup(phandle, compat_data)->data;
165 prop_dictionary_set_bool(device_properties(self), "iflg-rwc",
166 conf->iflg_rwc);
167
168 /* Attach gttwsi core */
169 gttwsi_attach_subr(self, bst, bsh, sunxi_twi_regmap);
170
171 /*
172 * Set clock rate to 100kHz.
173 */
174 if (clk != NULL)
175 sunxi_twi_set_clock(sc, clk_get_rate(clk), 100000);
176
177 ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0, gttwsi_intr,
178 sc, device_xname(self));
179 if (ih == NULL) {
180 aprint_error_dev(self, "couldn't establish interrupt on %s\n",
181 intrstr);
182 return;
183 }
184 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
185
186 fdtbus_register_i2c_controller(&sc->sc_i2c, phandle);
187
188 fdtbus_attach_i2cbus(self, phandle, &sc->sc_i2c, iicbus_print);
189 }
190