| /llvm-project/flang/runtime/ |
| H A D | environment.h | 32 enum class Convert { Unknown, Native, LittleEndian, BigEndian, Swap }; enumerator
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| /llvm-project/libcxx/benchmarks/ |
| H A D | function.bench.cpp | |
| /llvm-project/clang/include/clang/AST/ |
| H A D | LexicallyOrderedRecursiveASTVisitor.h | 117 bool Swap; in getStmtChildren() local
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| /llvm-project/llvm/include/llvm/DebugInfo/GSYM/ |
| H A D | GsymReader.h | 66 std::unique_ptr<SwappedData> Swap; variable
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| /llvm-project/lldb/source/Core/ |
| H A D | ValueObjectList.cpp | |
| H A D | ModuleList.cpp | 1095 void ModuleList::Swap(ModuleList &other) { Swap() function in ModuleList
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| /llvm-project/compiler-rt/lib/scudo/standalone/ |
| H A D | common.h | 65 template <class T> void Swap(T &A, T &B) { in Swap() function
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| /llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | FunctionSpecialization.cpp | 443 bool Swap = I.getOperand(1) == LastVisited->first; visitCmpInst() local
464 bool Swap = I.getOperand(1) == LastVisited->first; visitBinaryOperator() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 423 bool Swap; shrinkMadFma() local
[all...] |
| H A D | AMDGPUInstCombineIntrinsic.cpp | 787 bool Swap = false; instCombineIntrinsic() local
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| /llvm-project/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_common.h | 491 template<class T> void Swap(T& a, T& b) { Swap() function
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 2291 isXXINSERTWMask(ShuffleVectorSDNode * N,unsigned & ShiftElts,unsigned & InsertAtByte,bool & Swap,bool IsLE) isXXINSERTWMask() argument
2366 isXXSLDWIShuffleMask(ShuffleVectorSDNode * N,unsigned & ShiftElts,bool & Swap,bool IsLE) isXXSLDWIShuffleMask() argument
2465 isXXPERMDIShuffleMask(ShuffleVectorSDNode * N,unsigned & DM,bool & Swap,bool IsLE) isXXPERMDIShuffleMask() argument
3095 bool Swap = false; getPreIndexedAddressParts() local
9840 bool Swap = false; lowerToVINSERTB() local
9946 bool Swap = false; lowerToVINSERTH() local
10172 bool Swap = false; LowerVECTOR_SHUFFLE() local
10331 SDValue Swap = DAG.getNode(PPCISD::SWAP_NO_CHAIN, dl, MVT::v2f64, Conv); LowerVECTOR_SHUFFLE() local
14003 generateEquivalentSub(SDNode * N,int Size,bool Complement,bool Swap,SDLoc & DL,SelectionDAG & DAG) generateEquivalentSub() argument
15278 SDValue Swap = DAG.getNode( expandVSXLoadForLE() local
15346 SDValue Swap = DAG.getNode(PPCISD::XXSWAPD, dl, expandVSXStoreForLE() local
[all...] |
| H A D | PPCISelDAGToDAG.cpp | 4358 bool HasVSX, bool &Swap, bool &Negate) { in getVCmpInst() argument
4575 bool Swap, Negate; trySETCC() local
6033 bool Swap; Select() local
[all...] |
| /llvm-project/polly/lib/Support/ |
| H A D | ISLTools.cpp | 203 isl::map Swap = makeTupleSwapMap(Space1, Space2); in reverseDomain() local
|
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 3152 SDValue Swap = DAG.getAtomicCmpSwap( ExpandNode() local
3162 SDValue Swap = DAG.getAtomic( ExpandNode() local
|
| H A D | LegalizeIntegerTypes.cpp | 5130 SDValue Swap = DAG.getAtomicCmpSwap( ExpandIntRes_ATOMIC_LOAD() local
5647 SDValue Swap = ExpandIntOp_ATOMIC_STORE() local
|
| H A D | DAGCombiner.cpp | 27662 bool Swap = N3C && isNullConstant(N2) && N3C->getAPIntValue().isPowerOf2(); SimplifySelectCC() local
[all...] |
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 3005 bool Swap = false; rewriteHexConstUses() local
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| H A D | HexagonISelLoweringHVX.cpp | 2133 auto Swap = [&](SDValue P) { LowerHvxIntrinsic() local
|
| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 3733 __anon429b8e861302(GetElementPtrInst *Gep, Value *Base, bool Swap) visitSelectInst() argument
[all...] |
| /llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 6810 bool Swap = false; tryConvertingToTwoOperandForm() local
10726 bool Swap = false; processInstruction() local
|
| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2985 bool Swap = false, Invert = false; adjustICmp128() local
|
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 10392 bool Swap = false; LowerSELECT_CC() local
12651 bool Swap = false; GenerateTBL() local
[all...] |
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 23073 bool Swap = false; translateX86FSETCC() local
23591 bool Swap = Cond == ISD::SETLT || Cond == ISD::SETULT || LowerVSETCC() local
31831 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, Node->getMemoryVT(), LowerATOMIC_STORE() local
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6798 bool Swap = false; LowerVSETCC() local
[all...] |