Lines Matching defs:Swap
2299 unsigned &InsertAtByte, bool &Swap, bool IsLE) {
2318 Swap = M0 < 4;
2326 Swap = M1 < 4;
2334 Swap = M2 < 4;
2342 Swap = M3 < 4;
2350 Swap = true;
2374 bool &Swap, bool IsLE) {
2394 Swap = false;
2407 Swap = false;
2413 Swap = true;
2422 Swap = false;
2427 Swap = true;
2464 /// Can node \p N be lowered to an XXPERMDI instruction? If so, set \p Swap
2467 /// Specifically, set \p Swap to true only if \p N can be lowered to XXPERMDI
2473 bool &Swap, bool IsLE) {
2489 Swap = false;
2497 Swap = false;
2501 Swap = true;
2505 // Note: if control flow comes here that means Swap is already set above
2510 Swap = false;
2514 Swap = true;
2518 // Note: if control flow comes here that means Swap is already set above
3102 bool Swap = false;
3105 Swap = true;
3109 Swap = true;
3112 if (Swap)
9978 bool Swap = false;
10036 Swap = false;
10041 Swap = CurrentElement < BytesInVector;
10054 if (Swap)
10084 bool Swap = false;
10129 Swap = false;
10148 Swap = MaskOneElt < NumHalfWords;
10160 if (Swap)
10310 bool Swap = false;
10375 PPC::isXXINSERTWMask(SVOp, ShiftElts, InsertAtByte, Swap,
10379 else if (Swap)
10411 PPC::isXXSLDWIShuffleMask(SVOp, ShiftElts, Swap, isLittleEndian)) {
10412 if (Swap)
10424 PPC::isXXPERMDIShuffleMask(SVOp, ShiftElts, Swap, isLittleEndian)) {
10425 if (Swap)
10469 SDValue Swap = DAG.getNode(PPCISD::SWAP_NO_CHAIN, dl, MVT::v2f64, Conv);
10470 return DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, Swap);
10632 Swap V1 and V2:
14293 bool Swap, SDLoc &DL, SelectionDAG &DAG) {
14303 // Swap if needed. Depends on the condition code.
14304 if (Swap)
15567 SDValue Swap = DAG.getNode(
15569 DCI.AddToWorklist(Swap.getNode());
15573 SDValue N = DAG.getNode(ISD::BITCAST, dl, VecTy, Swap);
15577 N, Swap.getValue(1));
15580 return Swap;
15635 SDValue Swap = DAG.getNode(PPCISD::XXSWAPD, dl,
15637 DCI.AddToWorklist(Swap.getNode());
15638 Chain = Swap.getValue(1);
15639 SDValue StoreOps[] = { Chain, Swap, Base };