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Searched defs:SrcRC (Results 1 – 25 of 33) sorted by relevance

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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp195 const TargetRegisterClass *SrcRC = SrcReg.isVirtual() in getCopyRegClasses() local
209 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC, in isVGPRToSGPRCopy() argument
216 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC, in isSGPRToVGPRCopy() argument
285 const TargetRegisterClass *SrcRC, *DstR in foldVGPRCopyIntoRegSequence() local
313 const TargetRegisterClass *SrcRC = foldVGPRCopyIntoRegSequence() local
632 const TargetRegisterClass *SrcRC, *DstRC; runOnMachineFunction() local
662 const TargetRegisterClass *SrcRC = MRI->getRegClass(MO.getReg()); runOnMachineFunction() local
765 const TargetRegisterClass *SrcRC, *DstRC; runOnMachineFunction() local
856 const TargetRegisterClass *SrcRC = tryMoveVGPRConstToSGPR() local
1065 const TargetRegisterClass *SrcRC = lowerVGPR2SGPRCopies() local
[all...]
H A DAMDGPUInstructionSelector.cpp524 SrcRC in selectG_EXTRACT() local
119 const TargetRegisterClass *SrcRC constrainCopyLikeIntrin() local
152 const TargetRegisterClass *SrcRC selectCOPY() local
570 const TargetRegisterClass *SrcRC selectG_MERGE_VALUES() local
599 const TargetRegisterClass *SrcRC = selectG_UNMERGE_VALUES() local
2270 const TargetRegisterClass *SrcRC = selectG_TRUNC() local
2417 const TargetRegisterClass *SrcRC = selectG_SZA_EXT() local
2461 const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ? selectG_SZA_EXT() local
2989 const TargetRegisterClass *SrcRC = TRI.getRegClassForTypeOnBank(Ty, *SrcRB); selectG_PTRMASK() local
3106 const TargetRegisterClass *SrcRC = selectG_EXTRACT_VECTOR_ELT() local
[all...]
H A DSIRegisterInfo.cpp2919 shouldRewriteCopySrc(const TargetRegisterClass * DefRC,unsigned DefSubReg,const TargetRegisterClass * SrcRC,unsigned SrcSubReg) const shouldRewriteCopySrc() argument
2999 const TargetRegisterClass *SrcRC = getRegClassForReg(MRI, MO.getReg()); getRegClassForOperandReg() local
3019 shouldCoalesce(MachineInstr * MI,const TargetRegisterClass * SrcRC,unsigned SubReg,const TargetRegisterClass * DstRC,unsigned DstSubReg,const TargetRegisterClass * NewRC,LiveIntervals & LIS) const shouldCoalesce() argument
H A DSIFoldOperands.cpp836 const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg); foldOperand() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp286 const TargetRegisterClass *SrcRC = selectCopy() local
324 const TargetRegisterClass *SrcRC = getRegClassFromGRPhysReg(SrcReg); selectCopy() local
734 canTurnIntoCOPY(const TargetRegisterClass * DstRC,const TargetRegisterClass * SrcRC) canTurnIntoCOPY() argument
778 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); selectTruncOrPtrToInt() local
907 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); selectAnyext() local
1268 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI); emitExtractSubreg() local
1306 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI); emitInsertSubreg() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.cpp38 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in copyPhysReg() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXCopy.cpp99 const TargetRegisterClass *SrcRC = &PPC::VSLRCRegClass; in processBlock() local
H A DPPCMIPeephole.cpp1221 const TargetRegisterClass *SrcRC = MRI->getRegClassOrNull(SrcReg); simplifyCode() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostSelectOptimize.cpp129 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); foldSimpleCrossClassCopies() local
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInstructionSelect.cpp246 auto SrcRC = MRI.getRegClass(SrcReg); runOnMachineFunction() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.cpp314 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCombiner.cpp179 auto SrcRC = MRI->getRegClass(Src); isTransientMI() local
188 auto SrcRC = MRI->getRegClass(Src); isTransientMI() local
H A DTargetRegisterInfo.cpp386 shareSameRegisterFile(const TargetRegisterInfo & TRI,const TargetRegisterClass * DefRC,unsigned DefSubReg,const TargetRegisterClass * SrcRC,unsigned SrcSubReg) shareSameRegisterFile() argument
416 shouldRewriteCopySrc(const TargetRegisterClass * DefRC,unsigned DefSubReg,const TargetRegisterClass * SrcRC,unsigned SrcSubReg) const shouldRewriteCopySrc() argument
H A DDetectDeadLanes.cpp73 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in isCrossCopy() local
H A DRegisterCoalescer.cpp492 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); in setRegisters() local
1981 auto SrcRC = MRI->getRegClass(CP.getSrcReg()); in joinCopy() local
H A DPeepholeOptimizer.cpp794 if (!TRI->shouldRewriteCopySrc(DefRC, RegSubReg.SubReg, SrcRC, in findNextSource() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp878 const TargetRegisterClass *SrcRC, in shouldCoalesce() argument
938 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp354 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp380 const TargetRegisterClass *SrcRC, in shouldCoalesce()
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp374 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs() argument
H A DInstrEmitter.cpp154 const TargetRegisterClass *SrcRC = nullptr, *DstRC = nullptr; in EmitCopyFromReg() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.cpp1019 shouldCoalesce(MachineInstr * MI,const TargetRegisterClass * SrcRC,unsigned SubReg,const TargetRegisterClass * DstRC,unsigned DstSubReg,const TargetRegisterClass * NewRC,LiveIntervals & LIS) const shouldCoalesce() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86DomainReassignment.cpp66 static const TargetRegisterClass *getDstRC(const TargetRegisterClass *SrcRC, in getDstRC() argument
H A DX86RegisterInfo.cpp223 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc() argument
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h1087 shouldCoalesce(MachineInstr * MI,const TargetRegisterClass * SrcRC,unsigned SubReg,const TargetRegisterClass * DstRC,unsigned DstSubReg,const TargetRegisterClass * NewRC,LiveIntervals & LIS) shouldCoalesce() argument

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