| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenDAGPatterns.h | 693 MVT::SimpleValueType getSimpleType(unsigned ResNo) cons in getNumTypes() argument
697 getExtType(unsigned ResNo) getExtType() argument
700 getExtType(unsigned ResNo) getExtType() argument
701 setType(unsigned ResNo,const TypeSetByHwMode & T) setType() argument
702 getSimpleType(unsigned ResNo) getSimpleType() argument
706 hasConcreteType(unsigned ResNo) hasConcreteType() argument
709 isTypeCompletelyUnknown(unsigned ResNo,TreePattern & TP) isTypeCompletelyUnknown() argument
714 getResultIndex(unsigned ResNo) getResultIndex() argument
715 setResultIndex(unsigned ResNo,unsigned RI) setResultIndex() argument
982 UpdateNodeType(unsigned ResNo,const TypeSetByHwMode & InTy,TreePattern & TP) UpdateNodeType() argument
990 UpdateNodeType(unsigned ResNo,MVT::SimpleValueType InTy,TreePattern & TP) UpdateNodeType() argument
998 UpdateNodeType(unsigned ResNo,ValueTypeByHwMode InTy,TreePattern & TP) UpdateNodeType() argument
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| H A D | CodeGenDAGPatterns.cpp | 1596 getOperandNum(unsigned OpNo,TreePatternNode & N,const SDNodeInfo & NodeInfo,unsigned & ResNo) getOperandNum() argument
1626 unsigned ResNo = 0; // The result number being referenced. ApplyTypeConstraint() local
1727 UpdateNodeTypeFromInst(unsigned ResNo,Record * Operand,TreePattern & TP) UpdateNodeTypeFromInst() argument
2221 getImplicitType(Record * R,unsigned ResNo,bool NotRegisters,bool Unnamed,TreePattern & TP) getImplicitType() argument
2560 for (unsigned ResNo = 0; ResNo != NumResultsToAdd; ++ResNo) ApplyTypeConstraints() local
2566 unsigned ResNo = NumResultsToAdd; ApplyTypeConstraints() local
[all...] |
| H A D | DAGISelMatcher.h | 521 unsigned ResNo; variable
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SDNodeDbgValue.h | 71 static SDDbgOperand fromNode(SDNode *Node, unsigned ResNo) { in fromNode()
106 unsigned ResNo; ///< Valid for expressions. member
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| H A D | LegalizeTypesGeneric.cpp | 34 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, in ExpandRes_MERGE_VALUES() argument
500 SplitRes_MERGE_VALUES(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitRes_MERGE_VALUES() argument
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| H A D | LegalizeFloatTypes.cpp | 51 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { in SoftenFloatResult() argument
226 SoftenFloatRes_MERGE_VALUES(SDNode * N,unsigned ResNo) SoftenFloatRes_MERGE_VALUES() argument
273 SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode * N,unsigned ResNo) SoftenFloatRes_EXTRACT_VECTOR_ELT() argument
1324 ExpandFloatResult(SDNode * N,unsigned ResNo) ExpandFloatResult() argument
2454 PromoteFloatResult(SDNode * N,unsigned ResNo) PromoteFloatResult() argument
2887 SoftPromoteHalfResult(SDNode * N,unsigned ResNo) SoftPromoteHalfResult() argument
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| H A D | LegalizeIntegerTypes.cpp | 41 void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) { in PromoteIntegerResult() argument
340 PromoteIntRes_MERGE_VALUES(SDNode * N,unsigned ResNo) PromoteIntRes_MERGE_VALUES() argument
404 PromoteIntRes_AtomicCmpSwap(AtomicSDNode * N,unsigned ResNo) PromoteIntRes_AtomicCmpSwap() argument
1262 PromoteIntRes_SADDSUBO(SDNode * N,unsigned ResNo) PromoteIntRes_SADDSUBO() argument
1689 PromoteIntRes_UADDSUBO(SDNode * N,unsigned ResNo) PromoteIntRes_UADDSUBO() argument
1721 PromoteIntRes_UADDSUBO_CARRY(SDNode * N,unsigned ResNo) PromoteIntRes_UADDSUBO_CARRY() argument
1751 PromoteIntRes_SADDSUBO_CARRY(SDNode * N,unsigned ResNo) PromoteIntRes_SADDSUBO_CARRY() argument
1774 PromoteIntRes_XMULO(SDNode * N,unsigned ResNo) PromoteIntRes_XMULO() argument
2719 ExpandIntegerResult(SDNode * N,unsigned ResNo) ExpandIntegerResult() argument
[all...] |
| H A D | LegalizeVectorTypes.cpp | 41 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) { in ScalarizeVectorResult() argument
268 ScalarizeVecRes_FFREXP(SDNode * N,unsigned ResNo) ScalarizeVecRes_FFREXP() argument
335 ScalarizeVecRes_OverflowOp(SDNode * N,unsigned ResNo) ScalarizeVecRes_OverflowOp() argument
373 ScalarizeVecRes_MERGE_VALUES(SDNode * N,unsigned ResNo) ScalarizeVecRes_MERGE_VALUES() argument
1043 SplitVectorResult(SDNode * N,unsigned ResNo) SplitVectorResult() argument
1839 SplitVecRes_OverflowOp(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitVecRes_OverflowOp() argument
2479 SplitVecRes_FFREXP(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitVecRes_FFREXP() argument
4237 WidenVectorResult(SDNode * N,unsigned ResNo) WidenVectorResult() argument
4915 WidenVecRes_OverflowOp(SDNode * N,unsigned ResNo) WidenVecRes_OverflowOp() argument
5272 WidenVecRes_MERGE_VALUES(SDNode * N,unsigned ResNo) WidenVecRes_MERGE_VALUES() argument
[all...] |
| H A D | LegalizeTypes.cpp | 975 DisintegrateMERGE_VALUES(SDNode * N,unsigned ResNo) DisintegrateMERGE_VALUES() argument
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| H A D | ScheduleDAGSDNodes.cpp | 126 unsigned ResNo = User->getOperand(2).getResNo(); in CheckForPhysRegDependency() local
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| H A D | InstrEmitter.cpp | 84 void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, in EmitCopyFromReg() argument
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| H A D | TargetLowering.cpp | 5685 unsigned ResNo = 0; // ResNo - The result number of the next output. ParseConstraints() local
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.cpp | 236 unsigned ResNo = 0; // ResNo - The result number of the next output. in lowerInlineAsm() local
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| /llvm-project/llvm/utils/TableGen/ |
| H A D | DAGISelMatcherGen.cpp | 1065 for (unsigned ResNo = 0; ResNo < Pattern.getDstPattern().getNumResults(); EmitResultCode() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 15551 unsigned ResNo = Op0.getResNo(); PerformExtractEltToVMOVRRD() local
16449 unsigned ResNo = UI.getUse().getResNo(); CombineVLDDUP() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 16485 unsigned ResNo = User->getOperand(Op).getResNo(); checkForPhysRegDependency() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 45253 unsigned ResNo = InputVector.getResNo(); combineExtractVectorElt() local
[all...] |