[TableGen] Add a backend generating SDNode descriptions (#123002)

This patch adds a simplistic backend that gathers all target-specific
SelectionDAG nodes and emits descriptions for most of them.

T

[TableGen] Add a backend generating SDNode descriptions (#123002)

This patch adds a simplistic backend that gathers all target-specific
SelectionDAG nodes and emits descriptions for most of them.

This includes generating node enumeration, node names, and information
about node "prototype" that can be used to verify that a node is valid.

The patch also extends SDNode by adding target-specific flags, which are
also included in the generated tables.

Part of #119709,
[RFC](https://discourse.llvm.org/t/rfc-tablegen-erating-sdnode-descriptions/83627).

Pull Request: https://github.com/llvm/llvm-project/pull/123002

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[TableGen] Use std::pair instead of std::make_pair. NFC. (#123174)

Also use brace initialization and emplace to avoid explicitly
constructing std::pair, and the same for std::tuple.

[TableGen] Avoid repeated hash lookups (NFC) (#120681)

[TableGen] Avoid repeated hash lookups (NFC) (#120619)

[TableGen] Avoid repeated hash lookups (NFC) (#120532)

[TableGen][SystemZ] Correctly check the range of a leaf immediate (#119931)

The "Size >= 32" check probably dates back to when TableGen integers
were 32-bit. Delete it and simplify code by using `is

[TableGen][SystemZ] Correctly check the range of a leaf immediate (#119931)

The "Size >= 32" check probably dates back to when TableGen integers
were 32-bit. Delete it and simplify code by using `isInt`/`isUInt`.

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[TableGen] Add TreePatternNode::children and use it in for loops (NFC) (#119877)

[TableGen] Use `std::move` to avoid copy (#113061)

[SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075)

On loongarch64 with lsx extension, we select `VBITREV_W` for `v4i32 (xor
X, (shl splat(1

[SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075)

On loongarch64 with lsx extension, we select `VBITREV_W` for `v4i32 (xor
X, (shl splat(1), Y))`:

https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td#L1583-L1584

And `vsplat_imm_eq_1` is defined as:

https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td#L77-L87

For the `(bitconvert (v4i32 (build_vector)))` case, the pattern is
expected to be:
```
PATTERN: (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, (shl:{ *:[v4i32] } (bitconvert:{ *:[v4i32] } (build_vector:{ *:[v4i32] }))<<P:Predicate_vsplat_imm_eq_1>>, v4i32:{ *:[v4i32] }:$vk))
RESULT: (VBITREV_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, v4i32:{ *:[v4i32] }:$vk)
```

However, `simplifyTree` drops the `bitconvert` node and its predicates:

https://github.com/llvm/llvm-project/blob/8e6630391699116641cf390a10476295b7d4b95c/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp#L3036-L3062

Then llvm will match `vsplat_imm_eq_1` for any v4i32 splats and cause a
miscompilation:
```
PATTERN: (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, (shl:{ *:[v4i32] } (build_vector:{ *:[v4i32] }), v4i32:{ *:[v4i32] }:$vk))
RESULT: (VBITREV_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vj, v4i32:{ *:[v4i32] }:$vk)
```

This patch adds additional checks for predicates associated with the
trivial bitconvert node. Unused patterns in the LoongArch target are
also removed.

Fixes https://github.com/llvm/llvm-project/issues/116008.

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[TableGen][SelectionDAG] Remove the `implicit` DAG node (#115295)

The node was introduced in 59c39dc1 and was intended to allow writing
patterns like this:
`[(set AL, (mul AL, GR8:$src1)), (implic

[TableGen][SelectionDAG] Remove the `implicit` DAG node (#115295)

The node was introduced in 59c39dc1 and was intended to allow writing
patterns like this:
`[(set AL, (mul AL, GR8:$src1)), (implicit EFLAGS)]`

However, it does not introduce new functionality because the same
pattern can be equivalently expressed as:
`[(set AL, EFLAGS, (mul AL, GR8:$src1))]`

The latter form is also more flexible as it allows reordering output
operands.

In most places uses of `implicit` were redundant -- removing them didn't
change anything in the generated DAG tables. The only three cases where
it did have effect are in X86InstrArithmetic.td and X86InstrSystem.td --
those were rewritten to use `set` node.

Removing `implicit` from some patterns made them importable by GISel,
hence the change in a test.

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[CodeGen] Rename MVT::iPTRAny to MVT::pAny

Whilst in upstream LLVM iPTRAny is only ever an integer, essentially an
alias for iPTR, this is not true in CHERI LLVM, where it gets used to
mean "iPTR or

[CodeGen] Rename MVT::iPTRAny to MVT::pAny

Whilst in upstream LLVM iPTRAny is only ever an integer, essentially an
alias for iPTR, this is not true in CHERI LLVM, where it gets used to
mean "iPTR or cPTR", i.e. either an integer address or a capability
(with cPTR and cN being the capability equivalents of iPTR and iN).
Moreover, iPTRAny is already not itself regarded as an integer (calling
isInteger() will give false), so the "i" prefix is misleading, and it
stands out as different from all the other xAny that have a single
letter prefix denoting their type.

Thus, rename it to pAny, reflecting that it is an overloaded pointer
type, which could end up being specialised to an integer type, but does
not have to be.

This has been verified to have no effect on the generated files for LLVM
itself or any in-tree target beyond the replacement of the identifier
iPTRAny with pAny in GenVT.inc.

Reviewers: arsenm

Reviewed By: arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/113733

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[TableGen] Remove a pointless check for iPTRAny

We've already called EnforceInteger on Types[0], and iPTRAny isn't
regarded as an integer type (note that TableGen special-cases iPTR here
to include

[TableGen] Remove a pointless check for iPTRAny

We've already called EnforceInteger on Types[0], and iPTRAny isn't
regarded as an integer type (note that TableGen special-cases iPTR here
to include that, though), so we cannot possibly still have an iPTRAny by
this point. Delete the check, and let getFixedSizeInBits catch it along
with all the other overloaded types if that ever becomes false. Also
document why we have this check whilst here.

Reviewers: arsenm

Reviewed By: arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/113732

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[LLVM][TableGen] Change all `Init` pointers to const (#112705)

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-

[LLVM][TableGen] Change all `Init` pointers to const (#112705)

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089

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[TableGen] Change `DefInit::Def` to a const Record pointer (#110747)

This change undoes a const_cast<> introduced in an earlier change to
help transition to const pointers. It is a part of effort t

[TableGen] Change `DefInit::Def` to a const Record pointer (#110747)

This change undoes a const_cast<> introduced in an earlier change to
help transition to const pointers. It is a part of effort to have better
const correctness in TableGen backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089

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[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)

Currently, type casts can only be used to pattern match for intrinsics
with a single overloaded return value. For instan

[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)

Currently, type casts can only be used to pattern match for intrinsics
with a single overloaded return value. For instance:
```
def int_foo : Intrinsic<[llvm_anyint_ty], []>;
def : Pat<(i32 (int_foo)), ...>;
```

This patch extends type casts to support matching intrinsics with
multiple overloaded return values. As an example, the following defines
a pattern that matches only if the overloaded intrinsic call returns an
`i16` for the first result and an `i32` for the second result:
```
def int_bar : Intrinsic<[llvm_anyint_ty, llvm_anyint_ty], []>;
def : Pat<([i16, i32] (int_bar)), ...>;
```

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[LLVM][TableGen] Use const record pointers in TableGen/Common files (#109467)

Use const record pointers in TableGen/Common files.

This is a part of effort to have better const correctness in Tabl

[LLVM][TableGen] Use const record pointers in TableGen/Common files (#109467)

Use const record pointers in TableGen/Common files.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089

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[LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (#108762)

Change CodeGenDAGPatterns to use const RecordKeeper.

This is a part of effort to have better const correctness in Ta

[LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (#108762)

Change CodeGenDAGPatterns to use const RecordKeeper.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089

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[TableGen] Change CodeGenInstruction record members to const (#107921)

Change CodeGenInstruction::{TheDef, InfereredFrom} to const pointers.

This is a part of effort to have better const correctn

[TableGen] Change CodeGenInstruction record members to const (#107921)

Change CodeGenInstruction::{TheDef, InfereredFrom} to const pointers.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089

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[TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (#107858)

Change CGIOperandList::OperandInfo::Rec and CGIOperandList::TheDef to
const pointer.

This is a part of effort to hav

[TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (#107858)

Change CGIOperandList::OperandInfo::Rec and CGIOperandList::TheDef to
const pointer.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089

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[NFC][TableGen] Replace DefInit::get() with Record::getDefInit() (#107762)

Eliminate DefInit::get() as its a duplicate of Record::getDefInit().
Use early return in `VarDefInit::instantiate`.

[TableGen] Add PrintError family overload that take a print function (#107333)

Add PrintError and family overload that accepts a print function. This
avoids constructing potentially long strings fo

[TableGen] Add PrintError family overload that take a print function (#107333)

Add PrintError and family overload that accepts a print function. This
avoids constructing potentially long strings for passing into these
print functions.

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[TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (#107100)

- Add class `CodeGenIntrinsicMap` for on-demand creation of
`CodeGenIntrinsic`.
- Add class `CodeGenIntrinsicCo

[TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (#107100)

- Add class `CodeGenIntrinsicMap` for on-demand creation of
`CodeGenIntrinsic`.
- Add class `CodeGenIntrinsicContext` to capture global information
required to build `CodeGenIntrinsic` objects.
- Adopt GlobalISel PatternParser and SearchableTableEmitter to use it.

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[TableGen] Use llvm::unique (NFC) (#94163)

[TableGen] HasOneUse builtin predicate on PatFrags (#91578)

This predicate tells GlobalISelEmitter and DAGISelEmitter to check that
the instruction to emit has only one use of its result. This can

[TableGen] HasOneUse builtin predicate on PatFrags (#91578)

This predicate tells GlobalISelEmitter and DAGISelEmitter to check that
the instruction to emit has only one use of its result. This can be used
on a PatFrag instead of defining custom predicates for both emitters per
record that requires it.

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Revert "[TableGen] Ignore inaccessible memory when checking pattern flags (#90061)"

This reverts commit 6578356a4e3e6acd7983c74feab43ac96925894c.

The patch had no effect due to a silly mistake and

Revert "[TableGen] Ignore inaccessible memory when checking pattern flags (#90061)"

This reverts commit 6578356a4e3e6acd7983c74feab43ac96925894c.

The patch had no effect due to a silly mistake and fixing the mistake
causes other problems.

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