| /llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 32 printRegister(raw_ostream & OS,DIDumpOptions DumpOpts,unsigned RegNum) printRegister() argument
62 createIsRegisterPlusOffset(uint32_t RegNum,int32_t Offset,std::optional<uint32_t> AddrSpace) createIsRegisterPlusOffset() argument
68 createAtRegisterPlusOffset(uint32_t RegNum,int32_t Offset,std::optional<uint32_t> AddrSpace) createAtRegisterPlusOffset() argument
325 auto RegNum = Data.getULEB128(C); parse() local
372 uint64_t RegNum = Data.getULEB128(C); parse() local
572 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
586 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
652 for (uint32_t RegNum = 16; RegNum < 32; ++RegNum) { parseRows() local
670 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
679 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
691 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
704 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
716 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
725 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
734 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
762 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
775 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); parseRows() local
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| H A D | DWARFExpression.cpp | 442 printCompactDWARFExpr(raw_ostream & OS,DWARFExpression::iterator I,const DWARFExpression::iterator E,std::function<StringRef (uint64_t RegNum,bool IsEH)> GetNameForDWARFReg=nullptr) printCompactDWARFExpr() argument
549 printCompact(raw_ostream & OS,std::function<StringRef (uint64_t RegNum,bool IsEH)> GetNameForDWARFReg) printCompact() argument
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.cpp | 103 int RegsLeft = NumArgRegs - RegNum; in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
78 unsigned RegNum = State.getFirstUnallocated(ArgRegs); CC_PPC32_SVR4_Custom_AlignArgRegs() local
129 unsigned RegNum = State.getFirstUnallocated(ArgRegs); CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
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| /llvm-project/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 213 CreateReg(unsigned RegNum,SMLoc S,SMLoc E) CreateReg() argument
224 CreateMemri(unsigned RegNum,const MCExpr * Val,SMLoc S,SMLoc E) CreateMemri() argument
352 int RegNum = matchFn(Name); parseRegisterName() local
369 int RegNum = parseRegisterName(&MatchRegisterName); parseRegisterName() local
378 int RegNum = AVR::NoRegister; parseRegister() local
748 int64_t RegNum = Const->getValue(); validateTargetOperandClass() local
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| /llvm-project/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 144 int64_t MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { in getDwarfRegNum() argument
157 getLLVMRegNum(unsigned RegNum,bool isEH) const getLLVMRegNum() argument
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| /llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 200 CreateReg(unsigned RegNum,SMLoc S,SMLoc E) CreateReg() argument
210 CreateMem(unsigned RegNum,const MCExpr * Val,SMLoc S,SMLoc E) CreateMem() argument
216 CreateIndReg(unsigned RegNum,SMLoc S,SMLoc E) CreateIndReg() argument
221 CreatePostIndReg(unsigned RegNum,SMLoc S,SMLoc E) CreatePostIndReg() argument
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| /llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 89 getPrettyRegisterName(unsigned RegNum,MCRegisterInfo const & MRI) getPrettyRegisterName() argument
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| /llvm-project/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.h | 68 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
192 std::optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) cons argument
204 setRegisterLocation(uint32_t RegNum,const UnwindLocation & Location) setRegisterLocation() argument
212 removeRegisterLocation(uint32_t RegNum) removeRegisterLocation() argument
[all...] |
| /llvm-project/compiler-rt/lib/xray/ |
| H A D | xray_loongarch64.cpp | 21 enum RegNum : uint32_t { enum
[all...] |
| H A D | xray_hexagon.cpp | 37 enum RegNum : uint32_t { enum
|
| H A D | xray_mips.cpp | 33 enum RegNum : uint32_t { enum
[all...] |
| H A D | xray_mips64.cpp | 34 enum RegNum : uint32_t { enum
[all...] |
| /llvm-project/llvm/tools/llvm-dwarfdump/ |
| H A D | llvm-dwarfdump.cpp | 399 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) { in filterByName() argument
430 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) { in filterByName() argument
496 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) { in filterByAccelName() argument
516 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) { in findAllApple() argument
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| /llvm-project/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kMCCodeEmitter.cpp | 205 unsigned RegNum = Op.getReg(); in getMachineOpValue() local
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| /llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 383 unsigned RegNum; global() member
409 unsigned RegNum; global() member
419 unsigned RegNum; global() member
2263 CreateReg(unsigned RegNum,RegKind Kind,SMLoc S,SMLoc E,MCContext & Ctx,RegConstraintEqualityTy EqTy=RegConstraintEqualityTy::EqualsReg,AArch64_AM::ShiftExtendType ExtTy=AArch64_AM::LSL,unsigned ShiftAmount=0,unsigned HasExplicitAmount=false) CreateReg() argument
2282 CreateVectorReg(unsigned RegNum,RegKind Kind,unsigned ElementWidth,SMLoc S,SMLoc E,MCContext & Ctx,AArch64_AM::ShiftExtendType ExtTy=AArch64_AM::LSL,unsigned ShiftAmount=0,unsigned HasExplicitAmount=false) CreateVectorReg() argument
2298 CreateVectorList(unsigned RegNum,unsigned Count,unsigned Stride,unsigned NumElements,unsigned ElementWidth,RegKind RegisterKind,SMLoc S,SMLoc E,MCContext & Ctx) CreateVectorList() argument
2492 CreateMatrixRegister(unsigned RegNum,unsigned ElementWidth,MatrixKind Kind,SMLoc S,SMLoc E,MCContext & Ctx) CreateMatrixRegister() argument
2950 unsigned RegNum = 0; matchRegisterNameAlias() local
2975 if (auto RegNum = StringSwitch<unsigned>(Name.lower()) matchRegisterNameAlias() local
3016 tryParseScalarRegister(MCRegister & RegNum) tryParseScalarRegister() argument
3174 MCRegister RegNum; tryParseSyspXzrPair() local
4181 unsigned RegNum = matchRegisterNameAlias(Head, MatchKind); tryParseVectorRegister() local
4214 MCRegister RegNum; tryParseSVEPredicateVector() local
4375 unsigned RegNum = matchMatrixTileListRegName(Name); tryParseMatrixTileList() local
4606 MCRegister RegNum; tryParseGPR64sp0Operand() local
4637 unsigned RegNum = matchRegisterNameAlias(Name, RegKind::LookupTable); tryParseZTOperand() local
4674 MCRegister RegNum; tryParseGPROperand() local
7209 MCRegister RegNum; parseDirectiveReq() local
7939 MCRegister RegNum; tryParseSVEDataVector() local
[all...] |
| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GIMatchTableExecutorImpl.h | 1119 uint16_t RegNum = readU16(); executeMatchTable() local
1132 uint16_t RegNum = readU16(); executeMatchTable() local
1143 uint16_t RegNum = readU16(); executeMatchTable() local
|
| /llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 208 unsigned RegNum; global() member
1833 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); processInstruction() local
1850 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); processInstruction() local
1867 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); processInstruction() local
1887 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); processInstruction() local
1910 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); processInstruction() local
[all...] |
| /llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 121 unsigned RegNum; global() member
694 unsigned RegNum; parseRegister() local
715 parseRegister(MCRegister & RegNum,SMLoc & StartLoc,SMLoc & EndLoc) parseRegister() argument
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| /llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 599 Op->Reg.RegNum = RegNum; in CreateReg() argument
176 unsigned RegNum; global() member
811 int RegNum = matchFn(Name); parseRegisterName() local
[all...] |
| /llvm-project/llvm/tools/llvm-cfi-verify/lib/ |
| H A D | FileAnalysis.cpp | 347 unsigned RegNum = *RI; in indirectCFOperandClobber() local
|
| /llvm-project/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 89 unsigned RegNum; global() member
|
| /llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 292 Field Value) { in DecodeMoveHRegInstruction()
|
| /llvm-project/llvm/lib/CodeGen/ |
| H A D | StackMaps.cpp | 196 int RegNum; getDwarfRegNum() local
|
| /llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 231 unsigned RegNum; global() member
467 CreateReg(unsigned RegNum,unsigned Kind,SMLoc S,SMLoc E) CreateReg() argument
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| /llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 865 MCRegister RegNum; member
870 MCRegister RegNum; member
899 MCRegister RegNum; member
2535 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; addCondCodeOperands() local
2542 unsigned RegNum = getVPTPred() == ARMVCC::None ? 0: ARM::P0; addVPTPredNOperands() local
2550 unsigned RegNum; addVPTPredROperands() local
3687 CreateCCOut(unsigned RegNum,SMLoc S,ARMAsmParser & Parser) CreateCCOut() argument
3706 CreateReg(unsigned RegNum,SMLoc S,SMLoc E,ARMAsmParser & Parser) CreateReg() argument
3830 CreateVectorList(unsigned RegNum,unsigned Count,bool isDoubleSpaced,SMLoc S,SMLoc E,ARMAsmParser & Parser) CreateVectorList() argument
3842 CreateVectorListAllLanes(unsigned RegNum,unsigned Count,bool isDoubleSpaced,SMLoc S,SMLoc E,ARMAsmParser & Parser) CreateVectorListAllLanes() argument
3854 CreateVectorListIndexed(unsigned RegNum,unsigned Count,unsigned Index,bool isDoubleSpaced,SMLoc S,SMLoc E,ARMAsmParser & Parser) CreateVectorListIndexed() argument
3906 CreatePostIdxReg(unsigned RegNum,bool isAdd,ARM_AM::ShiftOpc ShiftTy,unsigned ShiftImm,SMLoc S,SMLoc E,ARMAsmParser & Parser) CreatePostIdxReg() argument
4227 unsigned RegNum = MatchRegisterName(lowerCase); tryParseRegister() local
[all...] |